Start committing working test cases for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45050 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPU.h b/lib/Target/CellSPU/SPU.h
index aee87fb..4555fda 100644
--- a/lib/Target/CellSPU/SPU.h
+++ b/lib/Target/CellSPU/SPU.h
@@ -25,7 +25,7 @@
FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
FunctionPass *createSPUAsmPrinterPass(std::ostream &o, SPUTargetMachine &tm);
- /* Utility functions/predicates/etc used all over the place: */
+ /*--== Utility functions/predicates/etc used all over the place: --==*/
//! Predicate test for a signed 10-bit value
/*!
\param Value The input value to be tested
@@ -54,6 +54,33 @@
inline bool isS10Constant(uint64_t Value) {
return (Value <= ((1 << 9) - 1));
}
+
+ //! Predicate test for an unsigned 10-bit value
+ /*!
+ \param Value The input value to be tested
+
+ This predicate tests for an unsigned 10-bit value, returning the 10-bit value
+ as a short if true.
+ */
+ inline bool isU10Constant(short Value) {
+ return (Value == (Value & 0x3ff));
+ }
+
+ inline bool isU10Constant(int Value) {
+ return (Value == (Value & 0x3ff));
+ }
+
+ inline bool isU10Constant(uint32_t Value) {
+ return (Value == (Value & 0x3ff));
+ }
+
+ inline bool isU10Constant(int64_t Value) {
+ return (Value == (Value & 0x3ff));
+ }
+
+ inline bool isU10Constant(uint64_t Value) {
+ return (Value == (Value & 0x3ff));
+ }
}
// Defines symbolic names for the SPU instructions.
diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 935064d..ab02a81 100644
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -78,6 +78,21 @@
&& isI16IntS10Immediate(cast<ConstantSDNode>(N)));
}
+ //! ConstantSDNode predicate for i16 unsigned 10-bit immediate values
+ bool
+ isI16IntU10Immediate(ConstantSDNode *CN)
+ {
+ return isU10Constant((short) CN->getValue());
+ }
+
+ //! SDNode predicate for i16 sign-extended, 10-bit immediate values
+ bool
+ isI16IntU10Immediate(SDNode *N)
+ {
+ return (N->getOpcode() == ISD::Constant
+ && isI16IntU10Immediate(cast<ConstantSDNode>(N)));
+ }
+
//! ConstantSDNode predicate for signed 16-bit values
/*!
\arg CN The constant SelectionDAG node holding the value
diff --git a/lib/Target/CellSPU/SPUInstrInfo.td b/lib/Target/CellSPU/SPUInstrInfo.td
index faa6a7c..2ec14d2 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.td
+++ b/lib/Target/CellSPU/SPUInstrInfo.td
@@ -1127,7 +1127,7 @@
def ANDHIr16:
RI10Form<0b10101000, (outs R16C:$rT), (ins R16C:$rA, s10imm:$val),
"andhi\t$rT, $rA, $val", IntegerOp,
- [(set R16C:$rT, (and R16C:$rA, i16ImmSExt10:$val))]>;
+ [(set R16C:$rT, (and R16C:$rA, i16ImmU10:$val))]>;
def ANDIv4i32:
RI10Form<0b00101000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val),
diff --git a/lib/Target/CellSPU/SPUOperands.td b/lib/Target/CellSPU/SPUOperands.td
index 05270dd..70103b8 100644
--- a/lib/Target/CellSPU/SPUOperands.td
+++ b/lib/Target/CellSPU/SPUOperands.td
@@ -99,12 +99,18 @@
return isI32IntS10Immediate(N);
}]>;
-// i16ImmSExt10 predicate - True if the i32 immediate fits in a 10-bit sign
+// i16ImmSExt10 predicate - True if the i16 immediate fits in a 10-bit sign
// extended field. Used by RI10Form instructions like 'ldq'.
def i16ImmSExt10 : PatLeaf<(imm), [{
return isI16IntS10Immediate(N);
}]>;
+// i16ImmU10 predicate - True if the i16 immediate fits into a 10-bit unsigned
+// value. Used by RI10Form instructions.
+def i16ImmU10 : PatLeaf<(imm), [{
+ return isI16IntU10Immediate(N);
+}]>;
+
def immSExt16 : PatLeaf<(imm), [{
// immSExt16 predicate - True if the immediate fits in a 16-bit sign extended
// field.
@@ -206,7 +212,7 @@
}], FPimm_u18>;
//===----------------------------------------------------------------------===//
-// 64-bit operands:
+// 64-bit operands (TODO):
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//