commit ed0dca6a5dfa26e63c5636eb092640159182df89
author Chris Lattner <sabre@nondot.org> Fri Jul 10 05:52:02 2009 +0000
committer Chris Lattner <sabre@nondot.org> Fri Jul 10 05:52:02 2009 +0000
tree 8e6f74214ea929fff770762f9deba1dd85cf5370
parent 754b7650c20a0fa3a9df3f067dc02a0905992325

GVRequiresExtraLoad is now never used for calls, simplify it based on this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75232 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 40cd608..a1bd81b 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4554,7 +4554,7 @@
                                       SelectionDAG &DAG) const {
   bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_;
   bool ExtraLoadRequired =
-    Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false);
+    Subtarget->GVRequiresExtraLoad(GV, getTargetMachine());
 
   // Create the TargetGlobalAddress node, folding in the constant
   // offset if it is legal.
@@ -7075,7 +7075,7 @@
 
   if (AM.BaseGV) {
     // We can only fold this if we don't need an extra load.
-    if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine(), false))
+    if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine()))
       return false;
     // If BaseGV requires a register, we cannot also have a BaseReg.
     if (Subtarget->GVRequiresRegister(AM.BaseGV, getTargetMachine()) &&
@@ -8841,8 +8841,7 @@
     }
     // If we require an extra load to get this address, as in PIC mode, we
     // can't accept it.
-    if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), getTargetMachine(),
-                                       false))
+    if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), getTargetMachine()))
       return;
 
     if (hasMemory)