commit ef3c030e0e08b7d9446445823f4972fcf18c1ce1
author Nicolas Geoffray <nicolas.geoffray@lip6.fr> Tue Apr 03 10:27:07 2007 +0000
committer Nicolas Geoffray <nicolas.geoffray@lip6.fr> Tue Apr 03 10:27:07 2007 +0000
tree d93d882b1743ab69d6d8b077b7c9b4e4c5fb66fb
parent d0b08799491f965582e591c65c33fcefe5e430f9

The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35622 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCInstr64Bit.td

diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td
index 56070b2..e6ede49 100644
--- a/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -91,7 +91,7 @@
 let isCall = 1, noResults = 1, PPC970_Unit = 7, 
   // All calls clobber the PPC64 non-callee saved registers.
   Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,
-          F0,F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,
+          F0,F1,F2,F3,F4,F5,F6,F7,F8,
           V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19,
           LR8,CTR8,
           CR0,CR1,CR5,CR6,CR7] in {