Keep track of *which* input constraint matches an output
constraint. Reject asms where an output has multiple
input constraints tied to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 64192dc..103b5c0 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -4491,7 +4491,7 @@
// If there is an input constraint that matches this, we need to reserve
// the input register so no other inputs allocate to it.
- isInReg = OpInfo.hasMatchingInput;
+ isInReg = OpInfo.hasMatchingInput();
break;
case InlineAsm::isInput:
isInReg = true;
@@ -4562,7 +4562,7 @@
// the constraint, so we have to pick a register to pin the input/output to.
// If it isn't a matched constraint, go ahead and create vreg and let the
// regalloc do its thing.
- if (!OpInfo.hasMatchingInput) {
+ if (!OpInfo.hasMatchingInput()) {
RegVT = *PhysReg.second->vt_begin();
if (OpInfo.ConstraintVT == MVT::Other)
ValueVT = RegVT;
@@ -4863,7 +4863,7 @@
case InlineAsm::isInput: {
SDValue InOperandVal = OpInfo.CallOperand;
- if (OpInfo.isMatchingConstraint()) { // Matching constraint?
+ if (OpInfo.isMatchingInputConstraint()) { // Matching constraint?
// If this is required to match an output register we have already set,
// just use its register.
unsigned OperandNo = OpInfo.getMatchedOperand();