diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 0554121..b7ff749 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -427,10 +427,18 @@
         Opc = X86::MOV64rm;
         RC  = X86::GR64RegisterClass;
       }
+
+      X86AddressMode StubAM;
+      StubAM.Base.Reg = AM.Base.Reg;
+      StubAM.GV = AM.GV;
       unsigned ResultReg = createResultReg(RC);
-      addFullAddress(BuildMI(MBB, TII.get(Opc), ResultReg), AM);
+      addFullAddress(BuildMI(MBB, TII.get(Opc), ResultReg), StubAM);
+
+      // Now construct the final address. Note that the Disp, Scale,
+      // and Index values may already be set here.
       AM.Base.Reg = ResultReg;
       AM.GV = 0;
+
       // Prevent loading GV stub multiple times in same MBB.
       LocalValueMap[V] = AM.Base.Reg;
     }