Add missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37341 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 52ae842..c20d231 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -415,15 +415,16 @@
/// findRegisterUseOperandIdx() - Returns the operand index that is a use of
/// the specific register or -1 if it is not found. It further tightening
/// the search criteria to a use that kills the register if isKill is true.
- int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false);
+ int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
/// the specific register or NULL if it is not found.
MachineOperand *findRegisterDefOperand(unsigned Reg);
- /// findFirstPredOperand() - Find the first operand in the operand list that
- // is used to represent the predicate.
- MachineOperand *findFirstPredOperand();
+ /// findFirstPredOperandIdx() - Find the index of the first operand in the
+ /// operand list that is used to represent the predicate. It returns -1 if
+ /// none is found.
+ int findFirstPredOperandIdx() const;
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index bb1dfd2..5fe9130 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -395,19 +395,21 @@
/// isPredicable - Returns true if the instruction is already predicated.
///
- virtual bool isPredicated(MachineInstr *MI) const {
+ virtual bool isPredicated(const MachineInstr *MI) const {
return false;
}
/// PredicateInstruction - Convert the instruction into a predicated
/// instruction. It returns true if the operation was successful.
- virtual bool PredicateInstruction(MachineInstr *MI,
- std::vector<MachineOperand> &Pred) const;
+ virtual
+ bool PredicateInstruction(MachineInstr *MI,
+ const std::vector<MachineOperand> &Pred) const;
/// SubsumesPredicate - Returns true if the first specified predicated
/// subsumes the second, e.g. GE subsumes GT.
- virtual bool SubsumesPredicate(std::vector<MachineOperand> &Pred1,
- std::vector<MachineOperand> &Pred2) const {
+ virtual
+ bool SubsumesPredicate(const std::vector<MachineOperand> &Pred1,
+ const std::vector<MachineOperand> &Pred2) const {
return false;
}
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index d27cf6a..723296e 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -191,9 +191,9 @@
/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
/// the specific register or -1 if it is not found. It further tightening
/// the search criteria to a use that kills the register if isKill is true.
-int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) {
+int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
- MachineOperand &MO = getOperand(i);
+ const MachineOperand &MO = getOperand(i);
if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
if (!isKill || MO.isKill())
return i;
@@ -212,17 +212,18 @@
return NULL;
}
-/// findFirstPredOperand() - Find the first operand in the operand list that
-// is used to represent the predicate.
-MachineOperand *MachineInstr::findFirstPredOperand() {
+/// findFirstPredOperandIdx() - Find the index of the first operand in the
+/// operand list that is used to represent the predicate. It returns -1 if
+/// none is found.
+int MachineInstr::findFirstPredOperandIdx() const {
const TargetInstrDescriptor *TID = getInstrDescriptor();
if (TID->Flags & M_PREDICABLE) {
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
- return &getOperand(i);
+ return i;
}
- return NULL;
+ return -1;
}
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp
index 54158f7..56ec835 100644
--- a/lib/Target/TargetInstrInfo.cpp
+++ b/lib/Target/TargetInstrInfo.cpp
@@ -61,7 +61,7 @@
}
bool TargetInstrInfo::PredicateInstruction(MachineInstr *MI,
- std::vector<MachineOperand> &Pred) const {
+ const std::vector<MachineOperand> &Pred) const {
bool MadeChange = false;
const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
if (TID->Flags & M_PREDICABLE) {