add a note about a general improvement to the code generator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30642 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/README.txt b/lib/Target/README.txt
index 48298fa..e77573e 100644
--- a/lib/Target/README.txt
+++ b/lib/Target/README.txt
@@ -1,6 +1,20 @@
Target Independent Opportunities:
-===-------------------------------------------------------------------------===
+//===---------------------------------------------------------------------===//
+
+We should make the following changes to clean up MachineInstr:
+
+1. Add an Opcode field to TargetInstrDescriptor, so you can tell the opcode of
+ an instruction with just a TargetInstrDescriptor*.
+2. Remove the Opcode field from MachineInstr, replacing it with a
+ TargetInstrDescriptor*.
+3. Getting information about a machine instr then becomes:
+ MI->getInfo()->isTwoAddress()
+ instead of:
+ const TargetInstrInfo &TII = ...
+ TII.isTwoAddrInstr(MI->getOpcode())
+
+//===---------------------------------------------------------------------===//
FreeBench/mason contains code like this: