Add new function UltraSparcInstrInfo::CreateZeroExtensionInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3581 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index a3dc7c3..1d9641d 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -172,11 +172,27 @@
// Create instruction sequence to produce a sign-extended register value
// from an arbitrary sized value (sized in bits, not bytes).
+ // The generated instructions are appended to `mvec'.
+ // Any temp. registers (TmpInstruction) created are recorded in mcfi.
// Any stack space required is allocated via mcff.
//
virtual void CreateSignExtensionInstructions(const TargetMachine& target,
Function* F,
- Value* unsignedSrcVal,
+ Value* srcVal,
+ unsigned int srcSizeInBits,
+ Value* dest,
+ std::vector<MachineInstr*>& mvec,
+ MachineCodeForInstruction& mcfi) const;
+
+ // Create instruction sequence to produce a zero-extended register value
+ // from an arbitrary sized value (sized in bits, not bytes).
+ // The generated instructions are appended to `mvec'.
+ // Any temp. registers (TmpInstruction) created are recorded in mcfi.
+ // Any stack space required is allocated via mcff.
+ //
+ virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
+ Function* F,
+ Value* srcVal,
unsigned int srcSizeInBits,
Value* dest,
std::vector<MachineInstr*>& mvec,