commit f40de9d287cb57dd0449c46f91fa10c8784427da
author Akira Hatanaka <ahatanak@gmail.com> Mon Sep 26 21:55:17 2011 +0000
committer Akira Hatanaka <ahatanak@gmail.com> Mon Sep 26 21:55:17 2011 +0000
tree f04e8d9da542fed35f6238d0334c65cb2518cbd0
parent 8b4198da9d5884f9e33c54a9537b9a8eed4deff7

Set register class of a register according to value of HasMips64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsISelLowering.cpp

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 6ad7724..4578d22 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2268,7 +2268,7 @@
       else if (RegVT == MVT::f32)
         RC = Mips::FGR32RegisterClass;
       else if (RegVT == MVT::f64)
-        RC = Mips::AFGR64RegisterClass;
+        RC = HasMips64 ? Mips::FGR64RegisterClass : Mips::AFGR64RegisterClass;
       else
         llvm_unreachable("RegVT not supported by FormalArguments Lowering");