Restore this patch now that the latent bug has been fixed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23209 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 5b77784..8490adb 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -613,8 +613,12 @@
std::vector<MVT::ValueType> RetVals;
MVT::ValueType RetTyVT = getValueType(RetTy);
+ MVT::ValueType ActualRetTyVT = RetTyVT;
+ if (RetTyVT >= MVT::i1 && RetTyVT <= MVT::i16)
+ ActualRetTyVT = MVT::i32; // Promote result to i32.
+
if (RetTyVT != MVT::isVoid)
- RetVals.push_back(RetTyVT);
+ RetVals.push_back(ActualRetTyVT);
RetVals.push_back(MVT::Other);
SDOperand TheCall = SDOperand(DAG.getCall(RetVals,
@@ -622,7 +626,17 @@
Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
DAG.getConstant(NumBytes, getPointerTy()));
- return std::make_pair(TheCall, Chain);
+ SDOperand RetVal = TheCall;
+
+ // If the result is a small value, add a note so that we keep track of the
+ // information about whether it is sign or zero extended.
+ if (RetTyVT != ActualRetTyVT) {
+ RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext : ISD::AssertZext,
+ MVT::i32, RetVal, DAG.getValueType(RetTyVT));
+ RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
+ }
+
+ return std::make_pair(RetVal, Chain);
}
SDOperand PPC32TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,