commit | 33819133222397d931404c1bbc4a9488de1c25d7 | [log] [tgz] |
---|---|---|
author | Andrew Lenharth <andrewl@lenharth.org> | Fri Mar 04 20:09:23 2005 +0000 |
committer | Andrew Lenharth <andrewl@lenharth.org> | Fri Mar 04 20:09:23 2005 +0000 |
tree | 6066a48276747dfd628e499d8ba5c73464cf1fa3 | |
parent | 2f3c9b7562bcdc1795b2bd0ca28b283a8e972826 [diff] |
fix FCMOVxx typo, set rem and div to hardcode target reg to be the same as the one the assembler uese, update ISel to put values in regs used by assembler for rem and div git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20434 91177308-0d34-0410-b5e6-96231b3b80d8