For post-regalloc scheduling, remove the instructions from the block
before re-inserting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59281 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
index d60dd49..0c67973 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
@@ -675,6 +675,12 @@
/// EmitSchedule - Emit the machine code in scheduled order.
MachineBasicBlock *ScheduleDAG::EmitSchedule() {
+ // For post-regalloc scheduling, we're rescheduling the instructions in the
+ // block, so start by removing them from the block.
+ if (!DAG)
+ while (!BB->empty())
+ BB->remove(BB->begin());
+
DenseMap<SDValue, unsigned> VRBaseMap;
DenseMap<SUnit*, unsigned> CopyVRBaseMap;
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {