What should be the last unnecessary <iostream>s in the library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 7532127..180e846 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -44,7 +44,6 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
-#include <iostream>
#include <set>
using namespace llvm;
@@ -70,12 +69,12 @@
unsigned StackTop; // The current top of the FP stack.
void dumpStack() const {
- std::cerr << "Stack contents:";
+ cerr << "Stack contents:";
for (unsigned i = 0; i != StackTop; ++i) {
- std::cerr << " FP" << Stack[i];
+ cerr << " FP" << Stack[i];
assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!");
}
- std::cerr << "\n";
+ cerr << "\n";
}
private:
// getSlot - Return the stack slot number a particular register number is
@@ -211,7 +210,7 @@
PrevMI = prior(I);
++NumFP; // Keep track of # of pseudo instrs
- DEBUG(std::cerr << "\nFPInst:\t"; MI->print(std::cerr, &(MF.getTarget())));
+ DOUT << "\nFPInst:\t"; MI->print(*cerr.stream(), &(MF.getTarget()));
// Get dead variables list now because the MI pointer may be deleted as part
// of processing!
@@ -238,7 +237,7 @@
for (unsigned i = 0, e = DeadRegs.size(); i != e; ++i) {
unsigned Reg = DeadRegs[i];
if (Reg >= X86::FP0 && Reg <= X86::FP6) {
- DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
+ DOUT << "Register FP#" << Reg-X86::FP0 << " is dead!\n";
freeStackSlotAfter(I, Reg-X86::FP0);
}
}
@@ -247,13 +246,13 @@
DEBUG(
MachineBasicBlock::iterator PrevI(PrevMI);
if (I == PrevI) {
- std::cerr << "Just deleted pseudo instruction\n";
+ cerr << "Just deleted pseudo instruction\n";
} else {
MachineBasicBlock::iterator Start = I;
// Rewind to first instruction newly inserted.
while (Start != BB.begin() && prior(Start) != PrevI) --Start;
- std::cerr << "Inserted instructions:\n\t";
- Start->print(std::cerr, &MF.getTarget());
+ cerr << "Inserted instructions:\n\t";
+ Start->print(*cerr.stream(), &MF.getTarget());
while (++Start != next(I));
}
dumpStack();
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 4f84327..5c0bd28 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -34,7 +34,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/ADT/Statistic.h"
-#include <iostream>
#include <queue>
#include <set>
using namespace llvm;
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 86b2563..3c882ea 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -32,8 +32,6 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/ADT/STLExtras.h"
-#include <iostream>
-
using namespace llvm;
namespace {
@@ -244,8 +242,8 @@
static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
for (unsigned i = 1; i != NumEntries; ++i)
if (!(Table[i-1] < Table[i])) {
- std::cerr << "Entries out of order " << Table[i-1].from
- << " " << Table[i].from << "\n";
+ cerr << "Entries out of order " << Table[i-1].from
+ << " " << Table[i].from << "\n";
return false;
}
return true;
@@ -845,8 +843,8 @@
// No fusion
if (PrintFailedFusing)
- std::cerr << "We failed to fuse ("
- << ((i == 1) ? "r" : "s") << "): " << *MI;
+ cerr << "We failed to fuse ("
+ << ((i == 1) ? "r" : "s") << "): " << *MI;
return NULL;
}
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index 2459ed1..ff88fdb 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -15,7 +15,6 @@
#include "X86GenSubtarget.inc"
#include "llvm/Module.h"
#include "llvm/Support/CommandLine.h"
-#include <iostream>
using namespace llvm;
cl::opt<X86Subtarget::AsmWriterFlavorTy>
@@ -224,10 +223,10 @@
ParseSubtargetFeatures(FS, CPU);
if (Is64Bit && !HasX86_64)
- std::cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
- "requested.\n";
+ cerr << "Warning: Generation of 64-bit code for a 32-bit processor "
+ << "requested.\n";
if (Is64Bit && X86SSELevel < SSE2)
- std::cerr << "Warning: 64-bit processors all have at least SSE2.\n";
+ cerr << "Warning: 64-bit processors all have at least SSE2.\n";
} else {
// Otherwise, use CPUID to auto-detect feature set.
AutoDetectSubtargetFeatures();