commit f6372aa1cc568df19da7c5023e83c75aa9404a07
author Owen Anderson <resistor@mac.com> Tue Jan 01 21:11:32 2008 +0000
committer Owen Anderson <resistor@mac.com> Tue Jan 01 21:11:32 2008 +0000
tree 9cc85598bdfe4e6af602fffcca57f03c61c0dc3f
parent 80fe5311b5e9e5c4642ff46ba2377173c17797f6

Move some more instruction creation methods from RegisterInfo into InstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/RegAllocBigBlock.cpp

diff --git a/lib/CodeGen/RegAllocBigBlock.cpp b/lib/CodeGen/RegAllocBigBlock.cpp
index 5c89472..4d34a9a 100644
--- a/lib/CodeGen/RegAllocBigBlock.cpp
+++ b/lib/CodeGen/RegAllocBigBlock.cpp
@@ -319,6 +319,9 @@
          " the intended one.");
   DOUT << "  Spilling register " << RegInfo->getName(PhysReg)
        << " containing %reg" << VirtReg;
+  
+  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
+  
   if (!isVirtRegModified(VirtReg))
     DOUT << " which has not been modified, so no store necessary!";
 
@@ -329,7 +332,7 @@
     const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
     int FrameIndex = getStackSpaceFor(VirtReg, RC);
     DOUT << " to stack slot #" << FrameIndex;
-    RegInfo->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
+    TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
     ++NumStores;   // Update statistics
   }
 
@@ -542,7 +545,8 @@
        << RegInfo->getName(PhysReg) << "\n";
 
   // Add move instruction(s)
-  RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
+  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
+  TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
   ++NumLoads;    // Update statistics
 
   MF->getRegInfo().setPhysRegUsed(PhysReg);