Don't use implicit register operands to calculate L-bit for AVX instructions. Needed because super reg defs and kills are added as implicit operands on 128-bit instructions. Fixes PR13349. Patch by Jose Fonseca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160543 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 977cc50..d705049 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -927,6 +927,8 @@
for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
if (!MI.getOperand(i).isReg())
continue;
+ if (MI.getOperand(i).isImplicit())
+ continue;
unsigned SrcReg = MI.getOperand(i).getReg();
if (SrcReg >= X86::YMM0 && SrcReg <= X86::YMM15)
VEX_L = 1;