* fp to sint patterns.
* fiadd, fisub, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25189 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 4ac574f..9c546a7 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -320,46 +320,58 @@
// concrete X86 instruction which uses the register stack.
//
static const TableEntry OpcodeTable[] = {
- { X86::FpABS , X86::FABS },
- { X86::FpADD32m , X86::FADD32m },
- { X86::FpADD64m , X86::FADD64m },
- { X86::FpCHS , X86::FCHS },
- { X86::FpCMOVA , X86::FCMOVA },
- { X86::FpCMOVAE , X86::FCMOVAE },
- { X86::FpCMOVB , X86::FCMOVB },
- { X86::FpCMOVBE , X86::FCMOVBE },
- { X86::FpCMOVE , X86::FCMOVE },
- { X86::FpCMOVNE , X86::FCMOVNE },
- { X86::FpCMOVNP , X86::FCMOVNP },
- { X86::FpCMOVP , X86::FCMOVP },
- { X86::FpCOS , X86::FCOS },
- { X86::FpDIV32m , X86::FDIV32m },
- { X86::FpDIV64m , X86::FDIV64m },
- { X86::FpDIVR32m, X86::FDIVR32m },
- { X86::FpDIVR64m, X86::FDIVR64m },
- { X86::FpILD16m , X86::FILD16m },
- { X86::FpILD32m , X86::FILD32m },
- { X86::FpILD64m , X86::FILD64m },
- { X86::FpIST16m , X86::FIST16m },
- { X86::FpIST32m , X86::FIST32m },
- { X86::FpIST64m , X86::FISTP64m },
- { X86::FpLD0 , X86::FLD0 },
- { X86::FpLD1 , X86::FLD1 },
- { X86::FpLD32m , X86::FLD32m },
- { X86::FpLD64m , X86::FLD64m },
- { X86::FpMUL32m , X86::FMUL32m },
- { X86::FpMUL64m , X86::FMUL64m },
- { X86::FpSIN , X86::FSIN },
- { X86::FpSQRT , X86::FSQRT },
- { X86::FpST32m , X86::FST32m },
- { X86::FpST64m , X86::FST64m },
- { X86::FpSUB32m , X86::FSUB32m },
- { X86::FpSUB64m , X86::FSUB64m },
- { X86::FpSUBR32m, X86::FSUBR32m },
- { X86::FpSUBR64m, X86::FSUBR64m },
- { X86::FpTST , X86::FTST },
- { X86::FpUCOMIr , X86::FUCOMIr },
- { X86::FpUCOMr , X86::FUCOMr },
+ { X86::FpABS , X86::FABS },
+ { X86::FpADD32m , X86::FADD32m },
+ { X86::FpADD64m , X86::FADD64m },
+ { X86::FpCHS , X86::FCHS },
+ { X86::FpCMOVA , X86::FCMOVA },
+ { X86::FpCMOVAE , X86::FCMOVAE },
+ { X86::FpCMOVB , X86::FCMOVB },
+ { X86::FpCMOVBE , X86::FCMOVBE },
+ { X86::FpCMOVE , X86::FCMOVE },
+ { X86::FpCMOVNE , X86::FCMOVNE },
+ { X86::FpCMOVNP , X86::FCMOVNP },
+ { X86::FpCMOVP , X86::FCMOVP },
+ { X86::FpCOS , X86::FCOS },
+ { X86::FpDIV32m , X86::FDIV32m },
+ { X86::FpDIV64m , X86::FDIV64m },
+ { X86::FpDIVR32m , X86::FDIVR32m },
+ { X86::FpDIVR64m , X86::FDIVR64m },
+ { X86::FpIADD16m , X86::FIADD16m },
+ { X86::FpIADD32m , X86::FIADD32m },
+ { X86::FpIDIV16m , X86::FIDIV16m },
+ { X86::FpIDIV32m , X86::FIDIV32m },
+ { X86::FpIDIVR16m, X86::FIDIVR16m},
+ { X86::FpIDIVR32m, X86::FIDIVR32m},
+ { X86::FpILD16m , X86::FILD16m },
+ { X86::FpILD32m , X86::FILD32m },
+ { X86::FpILD64m , X86::FILD64m },
+ { X86::FpIMUL16m , X86::FIMUL16m },
+ { X86::FpIMUL32m , X86::FIMUL32m },
+ { X86::FpIST16m , X86::FIST16m },
+ { X86::FpIST32m , X86::FIST32m },
+ { X86::FpIST64m , X86::FISTP64m },
+ { X86::FpISUB16m , X86::FISUB16m },
+ { X86::FpISUB32m , X86::FISUB32m },
+ { X86::FpISUBR16m, X86::FISUBR16m},
+ { X86::FpISUBR32m, X86::FISUBR32m},
+ { X86::FpLD0 , X86::FLD0 },
+ { X86::FpLD1 , X86::FLD1 },
+ { X86::FpLD32m , X86::FLD32m },
+ { X86::FpLD64m , X86::FLD64m },
+ { X86::FpMUL32m , X86::FMUL32m },
+ { X86::FpMUL64m , X86::FMUL64m },
+ { X86::FpSIN , X86::FSIN },
+ { X86::FpSQRT , X86::FSQRT },
+ { X86::FpST32m , X86::FST32m },
+ { X86::FpST64m , X86::FST64m },
+ { X86::FpSUB32m , X86::FSUB32m },
+ { X86::FpSUB64m , X86::FSUB64m },
+ { X86::FpSUBR32m , X86::FSUBR32m },
+ { X86::FpSUBR64m , X86::FSUBR64m },
+ { X86::FpTST , X86::FTST },
+ { X86::FpUCOMIr , X86::FUCOMIr },
+ { X86::FpUCOMr , X86::FUCOMr },
};
static unsigned getConcreteOpcode(unsigned Opcode) {