| commit | f71df33671d7db53f6b1d1a6cb2e4d0062076a3b | [log] [tgz] |
|---|---|---|
| author | Andrew Lenharth <andrewl@lenharth.org> | Sun Sep 04 06:12:19 2005 +0000 |
| committer | Andrew Lenharth <andrewl@lenharth.org> | Sun Sep 04 06:12:19 2005 +0000 |
| tree | 58f9a307de1ab93f4daf275d8529f05077f471fe | |
| parent | e147ceb2fa377edb14c7977f16c92e2815ff25aa [diff] [blame] |
revert part of the last change, should fix regressions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23241 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 2af3e9b..cc0392b 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1733,6 +1733,11 @@ BuildMI(BB, Opc, 1, Result).addReg(Alpha::F31).addReg(Tmp2); return Result; } + + case ISD::AssertSext: + case ISD::AssertZext: + return SelectExpr(N.getOperand(0)); + } return 0;