diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 2c5b9da..31e2947 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3384,21 +3384,6 @@
     }
     break;
   }
-  case ISD::ADJUST_TRAMP: {
-    Tmp1 = LegalizeOp(Node->getOperand(0));
-    switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
-    default: assert(0 && "This action is not supported yet!");
-    case TargetLowering::Custom:
-      Result = DAG.UpdateNodeOperands(Result, Tmp1);
-      Result = TLI.LowerOperation(Result, DAG);
-      if (Result.Val) break;
-      // FALL THROUGH
-    case TargetLowering::Expand:
-      Result = Tmp1;
-      break;
-    }
-    break;
-  }
   case ISD::TRAMPOLINE: {
     SDOperand Ops[6];
     for (unsigned i = 0; i != 6; ++i)
@@ -3407,7 +3392,14 @@
     // The only option for this node is to custom lower it.
     Result = TLI.LowerOperation(Result, DAG);
     assert(Result.Val && "Should always custom lower!");
-    break;
+
+    // Since trampoline produces two values, make sure to remember that we
+    // legalized both of them.
+    Tmp1 = LegalizeOp(Result.getValue(1));
+    Result = LegalizeOp(Result);
+    AddLegalizedOperand(SDOperand(Node, 0), Result);
+    AddLegalizedOperand(SDOperand(Node, 1), Tmp1);
+    return Op.ResNo ? Tmp1 : Result;
   }
   }
   
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 05d5ec0..01ec5c9 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3643,8 +3643,7 @@
   case ISD::DEBUG_LOC: return "debug_loc";
 
   // Trampolines
-  case ISD::ADJUST_TRAMP: return "adjust_tramp";
-  case ISD::TRAMPOLINE:   return "trampoline";
+  case ISD::TRAMPOLINE: return "trampoline";
 
   case ISD::CONDCODE:
     switch (cast<CondCodeSDNode>(this)->get()) {
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 60b5290..561b303 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2881,12 +2881,6 @@
     // Discard annotate attributes
     return 0;
 
-  case Intrinsic::adjust_trampoline: {
-    SDOperand Arg = getValue(I.getOperand(1));
-    setValue(&I, DAG.getNode(ISD::ADJUST_TRAMP, TLI.getPointerTy(), Arg));
-    return 0;
-  }
-
   case Intrinsic::init_trampoline: {
     const Function *F =
       cast<Function>(IntrinsicInst::StripPointerCasts(I.getOperand(2)));
@@ -2899,7 +2893,13 @@
     Ops[4] = DAG.getSrcValue(I.getOperand(1));
     Ops[5] = DAG.getSrcValue(F);
 
-    DAG.setRoot(DAG.getNode(ISD::TRAMPOLINE, MVT::Other, Ops, 6));
+    SDOperand Tmp = DAG.getNode(ISD::TRAMPOLINE,
+                                DAG.getNodeValueTypes(TLI.getPointerTy(),
+                                                      MVT::Other), 2,
+                                Ops, 6);
+
+    setValue(&I, Tmp);
+    DAG.setRoot(Tmp.getValue(1));
     return 0;
   }
   }
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index d6ca1481..c41bb2e 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -191,11 +191,6 @@
   setOperationAction(ISD::MEMCPY          , MVT::Other, Custom);
   setOperationAction(ISD::MEMMOVE         , MVT::Other, Expand);
 
-  if (Subtarget->isThumb())
-    setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Custom);
-  else
-    setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Expand);
-
   // Use the default implementation.
   setOperationAction(ISD::VASTART           , MVT::Other, Expand);
   setOperationAction(ISD::VAARG             , MVT::Other, Expand);
@@ -1418,14 +1413,6 @@
   return Chain;
 }
 
-SDOperand ARMTargetLowering::LowerADJUST_TRAMP(SDOperand Op,
-                                                    SelectionDAG &DAG) {
-  // Thumb trampolines should be entered in thumb mode, so set the bottom bit
-  // of the address.
-  return DAG.getNode(ISD::OR, MVT::i32, Op.getOperand(0),
-                     DAG.getConstant(1, MVT::i32));
-}
-
 SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
   switch (Op.getOpcode()) {
   default: assert(0 && "Don't know how to custom lower this!"); abort();
@@ -1457,7 +1444,6 @@
   case ISD::FRAMEADDR:     break;
   case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG);
   case ISD::MEMCPY:        return LowerMEMCPY(Op, DAG);
-  case ISD::ADJUST_TRAMP:  return LowerADJUST_TRAMP(Op, DAG);
   }
   return SDOperand();
 }
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index aba6ab3..ea2ab74 100644
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -138,7 +138,6 @@
     SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerBR_JT(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerMEMCPY(SDOperand Op, SelectionDAG &DAG);
-    SDOperand LowerADJUST_TRAMP(SDOperand Op, SelectionDAG &DAG);
   };
 }
 
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index faeb791..a3654af 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -124,9 +124,6 @@
   setOperationAction(ISD::ExternalSymbol, MVT::i64, Custom);
   setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
 
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Expand);
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i64, Expand);
-
   setOperationAction(ISD::VASTART, MVT::Other, Custom);
   setOperationAction(ISD::VAEND,   MVT::Other, Expand);
   setOperationAction(ISD::VACOPY,  MVT::Other, Custom);
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 8f62c1f..f1bd5ba 100644
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -97,8 +97,6 @@
       setOperationAction(ISD::ROTR , MVT::i64  , Expand);
       setOperationAction(ISD::BSWAP, MVT::i64  , Expand);  // mux @rev
 
-      setOperationAction(ISD::ADJUST_TRAMP, MVT::i64, Expand);
-
       // VASTART needs to be custom lowered to use the VarArgsFrameIndex
       setOperationAction(ISD::VAARG             , MVT::Other, Custom);
       setOperationAction(ISD::VASTART           , MVT::Other, Custom);
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 9f5f7f9..a63da4c 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -105,8 +105,6 @@
   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
   setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
 
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Expand);
-
   setStackPointerRegisterToSaveRestore(Mips::SP);
   computeRegisterProperties();
 }
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 8c76776..cfebef1 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -171,9 +171,6 @@
   // RET must be custom lowered, to meet ABI requirements
   setOperationAction(ISD::RET               , MVT::Other, Custom);
 
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Expand);
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i64, Expand);
-
   // VASTART needs to be custom lowered to use the VarArgsFrameIndex
   setOperationAction(ISD::VASTART           , MVT::Other, Custom);
   
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 536abc1..e1628b9 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -216,8 +216,6 @@
   // RET must be custom lowered, to meet ABI requirements
   setOperationAction(ISD::RET               , MVT::Other, Custom);
 
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Expand);
-
   // VASTART needs to be custom lowered to use the VarArgsFrameIndex.
   setOperationAction(ISD::VASTART           , MVT::Other, Custom);
   // VAARG needs to be lowered to not do unaligned accesses for doubles.
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 22b282b..6d3bcf7 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -246,9 +246,7 @@
   }
   setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom);
   
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i32,   Expand);
-  setOperationAction(ISD::ADJUST_TRAMP, MVT::i64,   Expand);
-  setOperationAction(ISD::TRAMPOLINE,   MVT::Other, Custom);
+  setOperationAction(ISD::TRAMPOLINE, MVT::Other, Custom);
 
   // VASTART needs to be custom lowered to use the VarArgsFrameIndex
   setOperationAction(ISD::VASTART           , MVT::Other, Custom);
@@ -4406,7 +4404,9 @@
     OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpSV->getValue(),
                                 TrmpSV->getOffset() + 6, false, 1);
 
-    return DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 4);
+    SDOperand Ops[] =
+      { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 4) };
+    return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), Ops, 2);
   }
 }