diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 0e7f0d9..be3dd55 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -1213,7 +1213,7 @@
       assert(KillMI && "Last use disappeared?");
       int KillOp = KillMI->findRegisterUseOperandIdx(li.reg, true);
       assert(KillOp != -1 && "Last use disappeared?");
-      KillMI->getOperand(KillOp).unsetIsKill();
+      KillMI->getOperand(KillOp).setIsKill(false);
     }
     vrm.removeKillPoint(li.reg);
     bool DefIsReMat = vrm.isReMaterialized(li.reg);
diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp
index ca3a0512..772843a 100644
--- a/lib/CodeGen/LiveVariables.cpp
+++ b/lib/CodeGen/LiveVariables.cpp
@@ -608,7 +608,7 @@
       VarInfo &VI = getVarInfo(Reg);
       if (MO.isDef()) {
         if (MO.isDead()) {
-          MO.unsetIsDead();
+          MO.setIsDead(false);
           addVirtualRegisterDead(Reg, NewMI);
         }
         // Update the defining instruction.
@@ -616,7 +616,7 @@
           VI.DefInst = NewMI;
       }
       if (MO.isKill()) {
-        MO.unsetIsKill();
+        MO.setIsKill(false);
         addVirtualRegisterKilled(Reg, NewMI);
       }
       // If this is a kill of the value, update the VI kills list.
@@ -640,12 +640,12 @@
       unsigned Reg = MO.getReg();
       if (MO.isDef()) {
         if (MO.isDead()) {
-          MO.unsetIsDead();
+          MO.setIsDead(false);
           addRegisterDead(Reg, NewMI, RegInfo);
         }
       }
       if (MO.isKill()) {
-        MO.unsetIsKill();
+        MO.setIsKill(false);
         addRegisterKilled(Reg, NewMI, RegInfo);
       }
     }
@@ -659,7 +659,7 @@
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = MI->getOperand(i);
     if (MO.isRegister() && MO.isKill()) {
-      MO.unsetIsKill();
+      MO.setIsKill(false);
       unsigned Reg = MO.getReg();
       if (MRegisterInfo::isVirtualRegister(Reg)) {
         bool removed = getVarInfo(Reg).removeKill(MI);
@@ -675,7 +675,7 @@
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = MI->getOperand(i);
     if (MO.isRegister() && MO.isDead()) {
-      MO.unsetIsDead();
+      MO.setIsDead(false);
       unsigned Reg = MO.getReg();
       if (MRegisterInfo::isVirtualRegister(Reg)) {
         bool removed = getVarInfo(Reg).removeKill(MI);
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index affde0e..85012da 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -21,6 +21,118 @@
 #include <ostream>
 using namespace llvm;
 
+//===----------------------------------------------------------------------===//
+// MachineOperand Implementation
+//===----------------------------------------------------------------------===//
+
+/// isIdenticalTo - Return true if this operand is identical to the specified
+/// operand.
+bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
+  if (getType() != Other.getType()) return false;
+  
+  switch (getType()) {
+  default: assert(0 && "Unrecognized operand type");
+  case MachineOperand::MO_Register:
+    return getReg() == Other.getReg() && isDef() == Other.isDef() &&
+           getSubReg() == Other.getSubReg();
+  case MachineOperand::MO_Immediate:
+    return getImm() == Other.getImm();
+  case MachineOperand::MO_MachineBasicBlock:
+    return getMBB() == Other.getMBB();
+  case MachineOperand::MO_FrameIndex:
+    return getFrameIndex() == Other.getFrameIndex();
+  case MachineOperand::MO_ConstantPoolIndex:
+    return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
+           getOffset() == Other.getOffset();
+  case MachineOperand::MO_JumpTableIndex:
+    return getJumpTableIndex() == Other.getJumpTableIndex();
+  case MachineOperand::MO_GlobalAddress:
+    return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
+  case MachineOperand::MO_ExternalSymbol:
+    return !strcmp(getSymbolName(), Other.getSymbolName()) &&
+           getOffset() == Other.getOffset();
+  }
+}
+
+/// print - Print the specified machine operand.
+///
+void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
+  switch (getType()) {
+  case MachineOperand::MO_Register:
+    if (getReg() == 0 || MRegisterInfo::isVirtualRegister(getReg())) {
+      OS << "%reg" << getReg();
+    } else {
+      // If the instruction is embedded into a basic block, we can find the
+      // target
+      // info for the instruction.
+      if (TM == 0)
+        if (const MachineInstr *MI = getParent())
+          if (const MachineBasicBlock *MBB = MI->getParent())
+            if (const MachineFunction *MF = MBB->getParent())
+              TM = &MF->getTarget();
+      
+      if (TM)
+        OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
+      else
+        OS << "%mreg" << getReg();
+    }
+      
+    if (isDef() || isKill() || isDead() || isImplicit()) {
+      OS << "<";
+      bool NeedComma = false;
+      if (isImplicit()) {
+        OS << (isDef() ? "imp-def" : "imp-use");
+        NeedComma = true;
+      } else if (isDef()) {
+        OS << "def";
+        NeedComma = true;
+      }
+      if (isKill() || isDead()) {
+        if (NeedComma)    OS << ",";
+        if (isKill()) OS << "kill";
+        if (isDead()) OS << "dead";
+      }
+      OS << ">";
+    }
+    break;
+  case MachineOperand::MO_Immediate:
+    OS << getImm();
+    break;
+  case MachineOperand::MO_MachineBasicBlock:
+    OS << "mbb<"
+       << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
+       << "," << (void*)getMachineBasicBlock() << ">";
+    break;
+  case MachineOperand::MO_FrameIndex:
+    OS << "<fi#" << getFrameIndex() << ">";
+    break;
+  case MachineOperand::MO_ConstantPoolIndex:
+    OS << "<cp#" << getConstantPoolIndex();
+    if (getOffset()) OS << "+" << getOffset();
+    OS << ">";
+    break;
+  case MachineOperand::MO_JumpTableIndex:
+    OS << "<jt#" << getJumpTableIndex() << ">";
+    break;
+  case MachineOperand::MO_GlobalAddress:
+    OS << "<ga:" << ((Value*)getGlobal())->getName();
+    if (getOffset()) OS << "+" << getOffset();
+    OS << ">";
+    break;
+  case MachineOperand::MO_ExternalSymbol:
+    OS << "<es:" << getSymbolName();
+    if (getOffset()) OS << "+" << getOffset();
+    OS << ">";
+    break;
+  default:
+    assert(0 && "Unrecognized operand type");
+  }
+}
+
+//===----------------------------------------------------------------------===//
+// MachineInstr Implementation
+//===----------------------------------------------------------------------===//
+
 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
 /// TID NULL and no operands.
 MachineInstr::MachineInstr()
@@ -145,34 +257,6 @@
   return NumOperands;
 }
 
-/// isIdenticalTo - Return true if this operand is identical to the specified
-/// operand.
-bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
-  if (getType() != Other.getType()) return false;
-  
-  switch (getType()) {
-  default: assert(0 && "Unrecognized operand type");
-  case MachineOperand::MO_Register:
-    return getReg() == Other.getReg() && isDef() == Other.isDef() &&
-           getSubReg() == Other.getSubReg();
-  case MachineOperand::MO_Immediate:
-    return getImm() == Other.getImm();
-  case MachineOperand::MO_MachineBasicBlock:
-    return getMBB() == Other.getMBB();
-  case MachineOperand::MO_FrameIndex:
-    return getFrameIndex() == Other.getFrameIndex();
-  case MachineOperand::MO_ConstantPoolIndex:
-    return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
-           getOffset() == Other.getOffset();
-  case MachineOperand::MO_JumpTableIndex:
-    return getJumpTableIndex() == Other.getJumpTableIndex();
-  case MachineOperand::MO_GlobalAddress:
-    return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
-  case MachineOperand::MO_ExternalSymbol:
-    return !strcmp(getSymbolName(), Other.getSymbolName()) &&
-           getOffset() == Other.getOffset();
-  }
-}
 
 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
 /// the specific register or -1 if it is not found. It further tightening
@@ -267,87 +351,11 @@
   cerr << "  " << *this;
 }
 
-/// print - Print the specified machine operand.
-///
-static void print(const MachineOperand &MO, std::ostream &OS,
-                  const TargetMachine *TM) {
-  switch (MO.getType()) {
-  case MachineOperand::MO_Register:
-    if (MO.getReg() == 0 || MRegisterInfo::isVirtualRegister(MO.getReg()))
-      OS << "%reg" << MO.getReg();
-    else {
-      // If the instruction is embedded into a basic block, we can find the
-      // target
-      // info for the instruction.
-      if (TM == 0)
-        if (const MachineInstr *MI = MO.getParent())
-          if (const MachineBasicBlock *MBB = MI->getParent())
-            if (const MachineFunction *MF = MBB->getParent())
-              TM = &MF->getTarget();
-      
-      if (TM)
-        OS << "%" << TM->getRegisterInfo()->get(MO.getReg()).Name;
-      else
-        OS << "%mreg" << MO.getReg();
-    }
-      
-    if (MO.isDef() || MO.isKill() || MO.isDead() || MO.isImplicit()) {
-      OS << "<";
-      bool NeedComma = false;
-      if (MO.isImplicit()) {
-        OS << (MO.isDef() ? "imp-def" : "imp-use");
-        NeedComma = true;
-      } else if (MO.isDef()) {
-        OS << "def";
-        NeedComma = true;
-      }
-      if (MO.isKill() || MO.isDead()) {
-        if (NeedComma)    OS << ",";
-        if (MO.isKill()) OS << "kill";
-        if (MO.isDead()) OS << "dead";
-      }
-      OS << ">";
-    }
-    break;
-  case MachineOperand::MO_Immediate:
-    OS << MO.getImm();
-    break;
-  case MachineOperand::MO_MachineBasicBlock:
-    OS << "mbb<"
-       << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
-       << "," << (void*)MO.getMachineBasicBlock() << ">";
-    break;
-  case MachineOperand::MO_FrameIndex:
-    OS << "<fi#" << MO.getFrameIndex() << ">";
-    break;
-  case MachineOperand::MO_ConstantPoolIndex:
-    OS << "<cp#" << MO.getConstantPoolIndex();
-    if (MO.getOffset()) OS << "+" << MO.getOffset();
-    OS << ">";
-    break;
-  case MachineOperand::MO_JumpTableIndex:
-    OS << "<jt#" << MO.getJumpTableIndex() << ">";
-    break;
-  case MachineOperand::MO_GlobalAddress:
-    OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
-    if (MO.getOffset()) OS << "+" << MO.getOffset();
-    OS << ">";
-    break;
-  case MachineOperand::MO_ExternalSymbol:
-    OS << "<es:" << MO.getSymbolName();
-    if (MO.getOffset()) OS << "+" << MO.getOffset();
-    OS << ">";
-    break;
-  default:
-    assert(0 && "Unrecognized operand type");
-  }
-}
-
 void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
   // Specialize printing if op#0 is definition
   unsigned StartOp = 0;
   if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) {
-    ::print(getOperand(0), OS, TM);
+    getOperand(0).print(OS, TM);
     OS << " = ";
     ++StartOp;   // Don't print this operand again!
   }
@@ -358,13 +366,9 @@
     if (i != StartOp)
       OS << ",";
     OS << " ";
-    ::print(getOperand(i), OS, TM);
+    getOperand(i).print(OS, TM);
   }
 
   OS << "\n";
 }
 
-void MachineOperand::print(std::ostream &OS) const {
-  ::print(*this, OS, 0);
-}
-
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index a560fae..e4a8b94 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -185,7 +185,7 @@
   // merge, unset the isKill marker given the live range has been extended.
   int UIdx = ValLREndInst->findRegisterUseOperandIdx(IntB.reg, true);
   if (UIdx != -1)
-    ValLREndInst->getOperand(UIdx).unsetIsKill();
+    ValLREndInst->getOperand(UIdx).setIsKill(false);
   
   ++numPeep;
   return true;
@@ -1303,7 +1303,7 @@
     MachineOperand &MO = MI->getOperand(i);
     if (MO.isRegister() && MO.isKill() && MO.getReg() &&
         mri_->regsOverlap(rep(MO.getReg()), Reg))
-      MO.unsetIsKill();
+      MO.setIsKill(false);
   }
 }
 
@@ -1327,7 +1327,7 @@
       MachineOperand &MO = MI->getOperand(i);
       if (MO.isRegister() && MO.isKill() && MO.getReg() &&
           mri_->regsOverlap(rep(MO.getReg()), Reg)) {
-        MO.unsetIsKill();
+        MO.setIsKill(false);
       }
     }
 
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 825deb2..80fa71a 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -479,7 +479,7 @@
 static void InvalidateKill(unsigned Reg, BitVector &RegKills,
                            std::vector<MachineOperand*> &KillOps) {
   if (RegKills[Reg]) {
-    KillOps[Reg]->unsetIsKill();
+    KillOps[Reg]->setIsKill(false);
     KillOps[Reg] = NULL;
     RegKills.reset(Reg);
   }
@@ -547,7 +547,7 @@
     if (RegKills[Reg]) {
       // That can't be right. Register is killed but not re-defined and it's
       // being reused. Let's fix that.
-      KillOps[Reg]->unsetIsKill();
+      KillOps[Reg]->setIsKill(false);
       KillOps[Reg] = NULL;
       RegKills.reset(Reg);
       if (i < TID->numOperands &&
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index b20943e..4bac10d 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -152,14 +152,8 @@
   bool Reg2IsKill = MI->getOperand(2).isKill();
   MI->getOperand(2).setReg(Reg1);
   MI->getOperand(1).setReg(Reg2);
-  if (Reg1IsKill)
-    MI->getOperand(2).setIsKill();
-  else
-    MI->getOperand(2).unsetIsKill();
-  if (Reg2IsKill)
-    MI->getOperand(1).setIsKill();
-  else
-    MI->getOperand(1).unsetIsKill();
+  MI->getOperand(2).setIsKill(Reg1IsKill);
+  MI->getOperand(1).setIsKill(Reg2IsKill);
   
   // Swap the mask around.
   unsigned MB = MI->getOperand(4).getImm();
diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp
index 530f878..0ee8916 100644
--- a/lib/Target/TargetInstrInfo.cpp
+++ b/lib/Target/TargetInstrInfo.cpp
@@ -49,14 +49,8 @@
   bool Reg2IsKill = MI->getOperand(2).isKill();
   MI->getOperand(2).setReg(Reg1);
   MI->getOperand(1).setReg(Reg2);
-  if (Reg1IsKill)
-    MI->getOperand(2).setIsKill();
-  else
-    MI->getOperand(2).unsetIsKill();
-  if (Reg2IsKill)
-    MI->getOperand(1).setIsKill();
-  else
-    MI->getOperand(1).unsetIsKill();
+  MI->getOperand(2).setIsKill(Reg1IsKill);
+  MI->getOperand(1).setIsKill(Reg2IsKill);
   return MI;
 }
 
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 532581e..e57bc03 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -1302,7 +1302,7 @@
       for (unsigned i = 1; i != 5; ++i) {
         MachineOperand &MO = NewMIs[0]->getOperand(i);
         if (MO.isRegister())
-          MO.unsetIsKill();
+          MO.setIsKill(false);
       }
     }
   }