Move FCTIWZ handling out of the instruction selectors and into legalization,
getting them out of the business of making stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23180 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index eba1419..8c4b2b6 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -22,7 +22,6 @@
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/SSARegMap.h"
@@ -818,6 +817,10 @@
Tmp3 = SelectExpr(N.getOperand(2));
BuildMI(BB, PPC::FSEL, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
return Result;
+ case PPCISD::FCTIWZ:
+ Tmp1 = SelectExpr(N.getOperand(0));
+ BuildMI(BB, PPC::FCTIWZ, 1, Result).addReg(Tmp1);
+ return Result;
case ISD::UNDEF:
if (Node->getValueType(0) == MVT::i32)
BuildMI(BB, PPC::IMPLICIT_DEF_GPR, 0, Result);
@@ -1436,16 +1439,6 @@
return Result+N.ResNo;
}
- case ISD::FP_TO_SINT: {
- Tmp1 = SelectExpr(N.getOperand(0));
- Tmp2 = MakeFPReg();
- BuildMI(BB, PPC::FCTIWZ, 1, Tmp2).addReg(Tmp1);
- int FrameIdx = BB->getParent()->getFrameInfo()->CreateStackObject(8, 8);
- addFrameReference(BuildMI(BB, PPC::STFD, 3).addReg(Tmp2), FrameIdx);
- addFrameReference(BuildMI(BB, PPC::LWZ, 2, Result), FrameIdx, 4);
- return Result;
- }
-
case ISD::SETCC: {
ISD::CondCode CC = cast<CondCodeSDNode>(Node->getOperand(2))->get();
if (isIntImmediate(Node->getOperand(1), Tmp3)) {