Undo spill weight tweak. Need to investigate the performance regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52572 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 84c6d67..473cc8e 100644
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -121,12 +121,8 @@
return getBaseIndex(index) + InstrSlots::STORE;
}
- static float getSpillWeight(bool isDef, bool isUse, bool isMem,
- unsigned loopDepth) {
- float Weight = isDef;
- if (isUse)
- Weight += isMem ? 1.2f : 1.0f;
- return Weight * powf(10.0F, (float)loopDepth);
+ static float getSpillWeight(bool isDef, bool isUse, unsigned loopDepth) {
+ return (isDef + isUse) * powf(10.0F, (float)loopDepth);
}
typedef Reg2IntervalMap::iterator iterator;
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 2a10cad..83df4d1 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -979,7 +979,6 @@
unsigned loopDepth = loopInfo->getLoopDepth(MBB);
bool CanFold = false;
RestartInstruction:
- bool isMem = MI->getDesc().mayLoad() || MI->getDesc().mayStore();
for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
MachineOperand& mop = MI->getOperand(i);
if (!mop.isRegister())
@@ -1047,7 +1046,7 @@
}
// Update stack slot spill weight if we are splitting.
- float Weight = getSpillWeight(HasDef, HasUse, isMem, loopDepth);
+ float Weight = getSpillWeight(HasDef, HasUse, loopDepth);
if (!TrySplit)
SSWeight += Weight;
@@ -1240,7 +1239,6 @@
bool MIHasUse = rwi.HasUse;
bool MIHasDef = rwi.HasDef;
MachineInstr *MI = rwi.MI;
- bool isMem = MI->getDesc().mayLoad() || MI->getDesc().mayStore();
// If MI def and/or use the same register multiple times, then there
// are multiple entries.
unsigned NumUses = MIHasUse;
@@ -1388,7 +1386,7 @@
// Update spill weight.
unsigned loopDepth = loopInfo->getLoopDepth(MBB);
- nI.weight += getSpillWeight(HasDef, HasUse, isMem, loopDepth);
+ nI.weight += getSpillWeight(HasDef, HasUse, loopDepth);
}
if (NewVReg && TrySplit && AllCanFold) {
@@ -1630,7 +1628,6 @@
LiveInterval &nI = getOrCreateInterval(VReg);
bool isReMat = vrm.isReMaterialized(VReg);
MachineInstr *MI = getInstructionFromIndex(index);
- bool isMem = MI->getDesc().mayLoad() || MI->getDesc().mayStore();
bool CanFold = false;
bool FoundUse = false;
Ops.clear();
@@ -1683,7 +1680,7 @@
// Update spill slot weight.
if (!isReMat)
- SSWeight += getSpillWeight(true, false, isMem, loopDepth);
+ SSWeight += getSpillWeight(true, false, loopDepth);
}
Id = SpillMBBs.find_next(Id);
}
@@ -1703,7 +1700,6 @@
LiveInterval &nI = getOrCreateInterval(VReg);
bool isReMat = vrm.isReMaterialized(VReg);
MachineInstr *MI = getInstructionFromIndex(index);
- bool isMem = MI->getDesc().mayLoad() || MI->getDesc().mayStore();
bool CanFold = false;
Ops.clear();
if (restores[i].canFold) {
@@ -1757,7 +1753,7 @@
// Update spill slot weight.
if (!isReMat)
- SSWeight += getSpillWeight(false, true, isMem, loopDepth);
+ SSWeight += getSpillWeight(false, true, loopDepth);
}
Id = RestoreMBBs.find_next(Id);
}
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 24e7fde..ed295ac 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -2145,7 +2145,6 @@
mii = mbbi->erase(mii);
++numPeep;
} else if (!isMove || !TurnCopyIntoImpDef(mii, mbb, DstReg, SrcReg)) {
- bool isMem = mii->getDesc().mayLoad() || mii->getDesc().mayStore();
SmallSet<unsigned, 4> UniqueUses;
for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
const MachineOperand &mop = mii->getOperand(i);
@@ -2158,7 +2157,7 @@
continue;
LiveInterval &RegInt = li_->getInterval(reg);
RegInt.weight +=
- li_->getSpillWeight(mop.isDef(), mop.isUse(), isMem, loopDepth);
+ li_->getSpillWeight(mop.isDef(), mop.isUse(), loopDepth);
UniqueUses.insert(reg);
}
}
diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll
index 774e724..9d1d324 100644
--- a/test/CodeGen/X86/2006-05-11-InstrSched.ll
+++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\
-; RUN: grep {asm-printer} | grep 31
+; RUN: grep {asm-printer} | grep 32
target datalayout = "e-p:32:32"
define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
diff --git a/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll b/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
index 5a8e4e4..07e926a 100644
--- a/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
+++ b/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep movl | count 4
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep movl | count 2
%struct.double_int = type { i64, i64 }
%struct.tree_common = type <{ i8, [3 x i8] }>
diff --git a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
index 1e88789..c3b4a25 100644
--- a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
+++ b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 2
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1
%struct..0objc_object = type opaque
%struct.OhBoy = type { }