Add MVT::is128BitVector and is64BitVector. Shrink
unaligned load/store code using them. Per review
of unaligned load/store vector patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 2acb1e3..bd9e230 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -574,15 +574,9 @@
// Expand to a bitconvert of the value to the integer type of the
// same size, then a (misaligned) int store.
MVT::ValueType intVT;
- if (VT == MVT::v8i16 || VT == MVT::v4i32 ||
- VT == MVT::v2i64 || VT == MVT::v2f64 ||
- VT == MVT::v4f32 || VT == MVT::v16i8 ||
- VT == MVT::ppcf128)
+ if (MVT::is128BitVector(VT) || VT == MVT::ppcf128 || VT == MVT::f128)
intVT = MVT::i128;
- else if (VT==MVT::f64 ||
- VT == MVT::v8i8 || VT == MVT::v4i16 ||
- VT == MVT::v2i32 || VT == MVT::v1i64 ||
- VT == MVT::v2f32)
+ else if (MVT::is64BitVector(VT) || VT==MVT::f64)
intVT = MVT::i64;
else if (VT==MVT::f32)
intVT = MVT::i32;
@@ -634,15 +628,10 @@
// Expand to a (misaligned) integer load of the same size,
// then bitconvert to floating point or vector.
MVT::ValueType intVT;
- if (LoadedVT == MVT::v8i16 || LoadedVT == MVT::v4i32 ||
- LoadedVT == MVT::v2i64 || LoadedVT == MVT::v2f64 ||
- LoadedVT == MVT::v4f32 || LoadedVT == MVT::v16i8 ||
- LoadedVT == MVT::ppcf128)
+ if (MVT::is128BitVector(LoadedVT) ||
+ LoadedVT == MVT::ppcf128 || LoadedVT == MVT::f128)
intVT = MVT::i128;
- else if (LoadedVT == MVT::f64 ||
- LoadedVT == MVT::v8i8 || LoadedVT == MVT::v4i16 ||
- LoadedVT == MVT::v2i32 || LoadedVT == MVT::v1i64 ||
- LoadedVT == MVT::v2f32)
+ else if (MVT::is64BitVector(LoadedVT) || LoadedVT == MVT::f64)
intVT = MVT::i64;
else if (LoadedVT == MVT::f32)
intVT = MVT::i32;