Switch loads over to use memri as the operand instead of a reg/imm operand
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31749 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index 32ef68a..cdecc03 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -234,14 +234,14 @@
unsigned ThisStoreSize;
switch (Opcode) {
default: assert(0 && "Unknown store instruction!");
- case PPC::STB:
+ case PPC::STB: case PPC::STBU:
case PPC::STBX:
case PPC::STB8:
case PPC::STBX8:
case PPC::STVEBX:
ThisStoreSize = 1;
break;
- case PPC::STH:
+ case PPC::STH: case PPC::STHU:
case PPC::STHX:
case PPC::STH8:
case PPC::STHX8:
@@ -249,12 +249,11 @@
case PPC::STHBRX:
ThisStoreSize = 2;
break;
- case PPC::STFS:
+ case PPC::STFS: case PPC::STFSU:
case PPC::STFSX:
- case PPC::STWU:
case PPC::STWX:
case PPC::STWUX:
- case PPC::STW:
+ case PPC::STW: case PPC::STWU:
case PPC::STW8:
case PPC::STWX8:
case PPC::STVEWX:
@@ -264,7 +263,7 @@
break;
case PPC::STD_32:
case PPC::STDX_32:
- case PPC::STD:
+ case PPC::STD: case PPC::STDU:
case PPC::STFD:
case PPC::STFDX:
case PPC::STDX: