commit f990b571c5c4828206b4e14ae7f95d36739b4336
author Dan Gohman <gohman@apple.com> Wed Aug 20 21:10:53 2008 +0000
committer Dan Gohman <gohman@apple.com> Wed Aug 20 21:10:53 2008 +0000
tree 181001aab696ebf463aa8de2d713b646115741ed
parent bb466331e7e50d03497ce40ee344870236fd9c32

Simplify the BuildMI calls even more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55077 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/FastISel.cpp

diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 70e0248..b8e5d2c 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -155,8 +155,7 @@
   unsigned ResultReg = MRI.createVirtualRegister(RC);
   const TargetInstrDesc &II = TII.get(MachineInstOpcode);
 
-  MachineInstr *MI = BuildMI(MF, II, ResultReg);
-  MBB->push_back(MI);
+  MachineInstr *MI = BuildMI(MBB, II, ResultReg);
   return ResultReg;
 }
 
@@ -166,8 +165,7 @@
   unsigned ResultReg = MRI.createVirtualRegister(RC);
   const TargetInstrDesc &II = TII.get(MachineInstOpcode);
 
-  MachineInstr *MI = BuildMI(MF, II, ResultReg).addReg(Op0);
-  MBB->push_back(MI);
+  MachineInstr *MI = BuildMI(MBB, II, ResultReg).addReg(Op0);
   return ResultReg;
 }
 
@@ -177,7 +175,6 @@
   unsigned ResultReg = MRI.createVirtualRegister(RC);
   const TargetInstrDesc &II = TII.get(MachineInstOpcode);
 
-  MachineInstr *MI = BuildMI(MF, II, ResultReg).addReg(Op0).addReg(Op1);
-  MBB->push_back(MI);
+  MachineInstr *MI = BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1);
   return ResultReg;
 }