commit fa226bccaa90c520cac154df74069bbabb976eab
author Jakob Stoklund Olesen <stoklund@2pi.dk> Thu Jun 02 05:43:46 2011 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Thu Jun 02 05:43:46 2011 +0000
tree 9354e2526b44ac981889e85e45a356a9e535b8eb
parent ac925653847294a7076060e3dcd4d491e83c711a

Use TRI::has{Sub,Super}ClassEq() where possible.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132455 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/TargetInstrInfoImpl.cpp

diff --git a/lib/CodeGen/TargetInstrInfoImpl.cpp b/lib/CodeGen/TargetInstrInfoImpl.cpp
index b9fcd38..34e2b33 100644
--- a/lib/CodeGen/TargetInstrInfoImpl.cpp
+++ b/lib/CodeGen/TargetInstrInfoImpl.cpp
@@ -212,8 +212,7 @@
   if (TargetRegisterInfo::isPhysicalRegister(LiveOp.getReg()))
     return RC->contains(LiveOp.getReg()) ? RC : 0;
 
-  const TargetRegisterClass *LiveRC = MRI.getRegClass(LiveReg);
-  if (RC == LiveRC || RC->hasSubClass(LiveRC))
+  if (RC->hasSubClassEq(MRI.getRegClass(LiveReg)))
     return RC;
 
   // FIXME: Allow folding when register classes are memory compatible.