Fix assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147966 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 801c663..c368e25 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -2275,9 +2275,9 @@
bool RV;
unsigned ResultReg;
RV = ARMEmitLoad(VT, ResultReg, Src);
- assert (RV = true && "Should be able to handle this load.");
+ assert (RV == true && "Should be able to handle this load.");
RV = ARMEmitStore(VT, ResultReg, Dest);
- assert (RV = true && "Should be able to handle this store.");
+ assert (RV == true && "Should be able to handle this store.");
unsigned Size = VT.getSizeInBits()/8;
Len -= Size;