Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183567 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SystemZ/SystemZLongBranch.cpp b/lib/Target/SystemZ/SystemZLongBranch.cpp
index 24afb07..2cb5823 100644
--- a/lib/Target/SystemZ/SystemZLongBranch.cpp
+++ b/lib/Target/SystemZ/SystemZLongBranch.cpp
@@ -133,8 +133,7 @@
public:
static char ID;
SystemZLongBranch(const SystemZTargetMachine &tm)
- : MachineFunctionPass(ID),
- TII(static_cast<const SystemZInstrInfo *>(tm.getInstrInfo())) {}
+ : MachineFunctionPass(ID), TII(0) {}
virtual const char *getPassName() const {
return "SystemZ Long Branch";
@@ -402,6 +401,7 @@
}
bool SystemZLongBranch::runOnMachineFunction(MachineFunction &F) {
+ TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo());
MF = &F;
uint64_t Size = initMBBInfo();
if (Size <= MaxForwardRange || !mustRelaxABranch())