commit fcba5e6b645df89ae6b93911fe0f80b08fa6b44c
author Jim Grosbach <grosbach@apple.com> Wed Aug 11 15:44:15 2010 +0000
committer Jim Grosbach <grosbach@apple.com> Wed Aug 11 15:44:15 2010 +0000
tree 1fc917344b0ac16a11ad95e1b8f6b476fb7867f8
parent f63fed141ec2402a7f028498b07ca7d49113b61c

cortex m4 has floating point support, but only single precision.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110810 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMISelLowering.cpp

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index e4b5562..073528a 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -266,7 +266,8 @@
     addRegisterClass(MVT::i32, ARM::GPRRegisterClass);
   if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb1Only()) {
     addRegisterClass(MVT::f32, ARM::SPRRegisterClass);
-    addRegisterClass(MVT::f64, ARM::DPRRegisterClass);
+    if (!Subtarget->isFPOnlySP())
+      addRegisterClass(MVT::f64, ARM::DPRRegisterClass);
 
     setTruncStoreAction(MVT::f64, MVT::f32, Expand);
   }