Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and MachineLICM don't touch it.
I already had the necessary things in place for IR-level passes but missed the machine passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160137 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index c242aaa..19cf5bf 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -9823,8 +9823,8 @@
case Intrinsic::x86_rdrand_32:
case Intrinsic::x86_rdrand_64: {
// Emit the node with the right value type.
- SDValue Result = DAG.getNode(X86ISD::RDRAND, dl,
- DAG.getVTList(Op->getValueType(0), MVT::Glue));
+ SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Glue, MVT::Other);
+ SDValue Result = DAG.getNode(X86ISD::RDRAND, dl, VTs, Op.getOperand(0));
// If the value returned by RDRAND was valid (CF=1), return 1. Otherwise
// return the value from Rand, which is always 0, casted to i32.
@@ -9838,7 +9838,7 @@
// Return { result, isValid, chain }.
return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), Result, isValid,
- Op.getOperand(0));
+ SDValue(Result.getNode(), 2));
}
}
}
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index dc26d4c..2c4e393 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -139,7 +139,8 @@
def X86sahf : SDNode<"X86ISD::SAHF", SDTX86sahf>;
-def X86rdrand : SDNode<"X86ISD::RDRAND", SDTX86rdrand>;
+def X86rdrand : SDNode<"X86ISD::RDRAND", SDTX86rdrand,
+ [SDNPHasChain, SDNPSideEffect]>;
def X86cas : SDNode<"X86ISD::LCMPXCHG_DAG", SDTX86cas,
[SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore,