commit febb0bd0b9b75923dea4c34f22be7e4c7b6b501e
author Jakob Stoklund Olesen <stoklund@2pi.dk> Fri Feb 18 00:32:47 2011 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Fri Feb 18 00:32:47 2011 +0000
tree 2044670f330f330e9d59988717924a14d72b2e67
parent 97755a063eb65705e928550b048ecb921c83545c

Trim debugging output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125802 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/RegAllocBasic.cpp

diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp
index c0d4d81..18a5a45 100644
--- a/lib/CodeGen/RegAllocBasic.cpp
+++ b/lib/CodeGen/RegAllocBasic.cpp
@@ -244,6 +244,8 @@
 }
 
 void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) {
+  DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
+               << " to " << PrintReg(PhysReg, TRI) << '\n');
   assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
   VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
   PhysReg2LiveUnion[PhysReg].unify(VirtReg);
@@ -251,6 +253,8 @@
 }
 
 void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) {
+  DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
+               << " from " << PrintReg(PhysReg, TRI) << '\n');
   assert(VRM->getPhys(VirtReg.reg) == PhysReg && "Inconsistent unassign");
   PhysReg2LiveUnion[PhysReg].extract(VirtReg);
   VRM->clearVirt(VirtReg.reg);
@@ -280,11 +284,9 @@
     VirtRegVec SplitVRegs;
     unsigned AvailablePhysReg = selectOrSplit(VirtReg, SplitVRegs);
 
-    if (AvailablePhysReg) {
-      DEBUG(dbgs() << "allocating: " << TRI->getName(AvailablePhysReg)
-                   << " for " << VirtReg << '\n');
+    if (AvailablePhysReg)
       assign(VirtReg, AvailablePhysReg);
-    }
+
     for (VirtRegVec::iterator I = SplitVRegs.begin(), E = SplitVRegs.end();
          I != E; ++I) {
       LiveInterval* SplitVirtReg = *I;