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5 <title>Writing an LLVM backend</title>
6 <link rel="stylesheet" href="llvm.css" type="text/css">
7</head>
8
9<body>
10
11<div class="doc_title">
12 Writing an LLVM backend
13</div>
14
15<ol>
16 <li><a href="#intro">Introduction</a>
17 <li><a href="#backends">Writing a backend</a>
18 <ol>
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]19 <li><a href="#machine">Machine backends</a>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]20 <ol>
21 <li><a href="#machineTOC">Outline</a></li>
22 <li><a href="#machineDetails">Implementation details</a></li>
23 </ol></li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]24 <li><a href="#lang">Language backends</a></li>
25 </ol></li>
26 <li><a href="#related">Related reading material</a>
27</ol>
28
29<div class="doc_author">
30 <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a></p>
31</div>
32
33<!-- *********************************************************************** -->
34<div class="doc_section">
35 <a name="intro">Introduction</a>
36</div>
37<!-- *********************************************************************** -->
38
39<div class="doc_text">
40
41<p>This document describes techniques for writing backends for LLVM which
42convert the LLVM representation to machine assembly code or other languages.</p>
43
44</div>
45
46<!-- *********************************************************************** -->
47<div class="doc_section">
48 <a name="backends">Writing a backend</a>
49</div>
50<!-- *********************************************************************** -->
51
52<!-- ======================================================================= -->
53<div class="doc_subsection">
54 <a name="machine">Machine backends</a>
55</div>
56
57<!-- _______________________________________________________________________ -->
58<div class="doc_subsubsection">
59 <a name="machineTOC">Outline</a>
60</div>
61
62<div class="doc_text">
63
64<p>In general, you want to follow the format of X86 or PowerPC (in
65<tt>lib/Target</tt>).</p>
66
67<p>To create a static compiler (one that emits text assembly), you need to
68implement the following:</p>
69
70<ul>
Chris Lattnerc3b05402005-10-16 17:03:22 +0000[diff] [blame]71<li>Describe the register set.
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]72 <ul>
73 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
74 the register set and register classes</li>
75 <li>Implement a subclass of <tt><a
76 href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li>
77 </ul></li>
Chris Lattnerc3b05402005-10-16 17:03:22 +0000[diff] [blame]78<li>Describe the instruction set.
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]79 <ul>
80 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
81 the instruction set</li>
82 <li>Implement a subclass of <tt><a
83 href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li>
84 </ul></li>
Chris Lattnerc3b05402005-10-16 17:03:22 +0000[diff] [blame]85<li>Describe the target machine.
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]86 <ul>
87 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
88 the target that describes the pointer size and references the instruction
89 set</li>
90 <li>Implement a subclass of <tt><a
91 href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which
92 configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt>
93 correctly</li>
Misha Brukman93d416f2004-12-27 19:05:16 +0000[diff] [blame]94 <li>Register your new target using the <tt>RegisterTarget</tt>
95 template:<br><br>
96<div class="doc_code"><pre>
97RegisterTarget&lt;<em>MyTargetMachine</em>&gt; M("short_name", " Target name");
98</pre></div>
99 <br>Here, <em>MyTargetMachine</em> is the name of your implemented
100 subclass of <tt><a
101 href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>,
102 <em>short_name</em> is the option that will be active following
103 <tt>-march=</tt> to select a target in llc and lli, and the last string
104 is the description of your target to appear in <tt>-help</tt>
105 listing.</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]106 </ul></li>
Chris Lattnerc3b05402005-10-16 17:03:22 +0000[diff] [blame]107<li>Implement the assembly printer for the architecture.
108 <ul>
109 <li>Define all of the assembly strings for your target, adding them to the
110 instructions in your *InstrInfo.td file.</li>
111 <li>Implement the <tt>llvm::AsmPrinter</tt> interface.</li>
112 </ul>
113</li>
114<li>Implement an instruction selector for the architecture.
115 <ul>
116 <li>The recommended method is the <a href="CodeGenerator.html#instselect">
117 pattern-matching DAG-to-DAG instruction selector</a> (for example, see
118 the PowerPC backend in PPCISelDAGtoDAG.cpp). Parts of instruction
119 selector creation can be performed by adding patterns to the instructions
120 in your <tt>.td</tt> file.</li>
121 </ul>
122</li>
123<li>Optionally, add subtarget support.
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]124<ul>
Chris Lattnerc3b05402005-10-16 17:03:22 +0000[diff] [blame]125 <li>If your target has multiple subtargets (e.g. variants with different
126 capabilities), implement the <tt>llvm::TargetSubtarget</tt> interface
127 for your architecture. This allows you to add <tt>-mcpu=</tt> and
128 <tt>-mattr=</tt> options.</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]129</ul>
Chris Lattnerc3b05402005-10-16 17:03:22 +0000[diff] [blame]130<li>Optionally, add JIT support.
131 <ul>
132 <li>Create a subclass of <tt><a
133 href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li>
134 <li>Create a machine code emitter that will be used to emit binary code
135 directly into memory, given <tt>MachineInstr</tt>s</li>
136 </ul>
137</ul>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]138</div>
139
140<!-- _______________________________________________________________________ -->
141<div class="doc_subsubsection">
142 <a name="machineDetails">Implementation details</a>
143</div>
144
145<div class="doc_text">
146
147<ul>
148
149<li><p><b>TableGen register info description</b> - describe a class which
150will store the register's number in the binary encoding of the instruction
151(e.g., for JIT purposes).</p>
152
153<p>You also need to define register classes to contain these registers, such as
154the integer register class and floating-point register class, so that you can
155allocate virtual registers to instructions from these sets, and let the
156target-independent register allocator automatically choose the actual
157architected registers.</p>
158
159<div class="doc_code">
160<pre>
161// class Register is defined in Target.td
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]162<b>class</b> <em>Target</em>Reg&lt;string name&gt; : Register&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]163 <b>let</b> Namespace = "<em>Target</em>";
164}
165
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]166<b>class</b> IntReg&lt;<b>bits</b>&lt;5&gt; num, string name&gt; : <em>Target</em>Reg&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]167 <b>field</b> <b>bits</b>&lt;5&gt; Num = num;
168}
169
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]170<b>def</b> R0 : IntReg&lt;0, "%R0"&gt;;
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]171...
172
173// class RegisterClass is defined in Target.td
174<b>def</b> IReg : RegisterClass&lt;i64, 64, [R0, ... ]&gt;;
175</pre>
176</div>
177</li>
178
179<li><p><b>TableGen instruction info description</b> - break up instructions into
180classes, usually that's already done by the manufacturer (see instruction
181manual). Define a class for each instruction category. Define each opcode as a
182subclass of the category, with appropriate parameters such as the fixed binary
183encoding of opcodes and extended opcodes, and map the register bits to the bits
184of the instruction which they are encoded in (for the JIT). Also specify how
185the instruction should be printed so it can use the automatic assembly printer,
186e.g.:</p>
187
188<div class="doc_code">
189<pre>
190// class Instruction is defined in Target.td
191<b>class</b> Form&lt;<b>bits</b>&lt;6&gt; opcode, <b>dag</b> OL, <b>string</b> asmstr&gt; : Instruction {
192 <b>field</b> <b>bits</b>&lt;42&gt; Inst;
193
194 <b>let</b> Namespace = "<em>Target</em>";
195 <b>let</b> Inst{0-6} = opcode;
196 <b>let</b> OperandList = OL;
197 <b>let</b> AsmString = asmstr;
198}
199
200<b>def</b> ADD : Form&lt;42, (ops IReg:$rD, IReg:$rA, IReg:$rB), "add $rD, $rA, $rB"&gt;;
201</pre>
202</div>
203</li>
204
205</ul>
206
207</div>
208
209<!-- ======================================================================= -->
210<div class="doc_subsection">
211 <a name="lang">Language backends</a>
212</div>
213
214<div class="doc_text">
215
216<p>For now, just take a look at <tt>lib/Target/CBackend</tt> for an example of
217how the C backend is written.</p>
218
219</div>
220
221<!-- *********************************************************************** -->
222<div class="doc_section">
223 <a name="related">Related reading material</a>
224</div>
225<!-- *********************************************************************** -->
226
227<div class="doc_text">
228
229<ul>
230<li><a href="CodeGenerator.html">Code generator</a> -
231 describes some of the classes in code generation at a high level, but
Misha Brukmana3bfc6f2005-05-17 02:12:32 +0000[diff] [blame]232 it is not (yet) complete</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]233<li><a href="TableGenFundamentals.html">TableGen fundamentals</a> -
Misha Brukmana3bfc6f2005-05-17 02:12:32 +0000[diff] [blame]234 describes how to use TableGen to describe your target information
235 succinctly</li>
236<li><a href="HowToSubmitABug.html#codegen">Debugging code generation with
237 bugpoint</a> - shows bugpoint usage scenarios to simplify backend
238 development</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]239</ul>
240
241</div>
242
243<!-- *********************************************************************** -->
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