Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 1 | //=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Nate Begeman and is distributed under the |
| 6 | // University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file declares the X86 specific subclass of TargetSubtarget. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef X86SUBTARGET_H |
| 15 | #define X86SUBTARGET_H |
| 16 | |
| 17 | #include "llvm/Target/TargetSubtarget.h" |
| 18 | |
| 19 | #include <string> |
| 20 | |
| 21 | namespace llvm { |
| 22 | class Module; |
| 23 | class GlobalValue; |
| 24 | class TargetMachine; |
| 25 | |
| 26 | namespace PICStyle { |
| 27 | enum Style { |
| 28 | Stub, GOT, RIPRel, WinPIC, None |
| 29 | }; |
| 30 | } |
| 31 | |
| 32 | class X86Subtarget : public TargetSubtarget { |
| 33 | public: |
| 34 | enum AsmWriterFlavorTy { |
| 35 | // Note: This numbering has to match the GCC assembler dialects for inline |
| 36 | // asm alternatives to work right. |
| 37 | ATT = 0, Intel = 1, Unset |
| 38 | }; |
| 39 | protected: |
| 40 | enum X86SSEEnum { |
| 41 | NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3 |
| 42 | }; |
| 43 | |
| 44 | enum X863DNowEnum { |
| 45 | NoThreeDNow, ThreeDNow, ThreeDNowA |
| 46 | }; |
| 47 | |
| 48 | /// AsmFlavor - Which x86 asm dialect to use. |
| 49 | AsmWriterFlavorTy AsmFlavor; |
| 50 | |
| 51 | /// PICStyle - Which PIC style to use |
| 52 | PICStyle::Style PICStyle; |
| 53 | |
| 54 | /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, or none supported. |
| 55 | X86SSEEnum X86SSELevel; |
| 56 | |
| 57 | /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported. |
| 58 | X863DNowEnum X863DNowLevel; |
| 59 | |
| 60 | /// HasX86_64 - True if the processor supports X86-64 instructions. |
| 61 | bool HasX86_64; |
| 62 | |
| 63 | /// stackAlignment - The minimum alignment known to hold of the stack frame on |
| 64 | /// entry to the function and which must be maintained by every function. |
| 65 | unsigned stackAlignment; |
| 66 | |
| 67 | /// Min. memset / memcpy size that is turned into rep/movs, rep/stos ops. |
| 68 | unsigned MinRepStrSizeThreshold; |
| 69 | |
| 70 | private: |
| 71 | /// Is64Bit - True if the processor supports 64-bit instructions and module |
| 72 | /// pointer size is 64 bit. |
| 73 | bool Is64Bit; |
| 74 | |
| 75 | public: |
| 76 | enum { |
| 77 | isELF, isCygwin, isDarwin, isWindows, isMingw |
| 78 | } TargetType; |
| 79 | |
| 80 | /// This constructor initializes the data members to match that |
| 81 | /// of the specified module. |
| 82 | /// |
| 83 | X86Subtarget(const Module &M, const std::string &FS, bool is64Bit); |
| 84 | |
| 85 | /// getStackAlignment - Returns the minimum alignment known to hold of the |
| 86 | /// stack frame on entry to the function and which must be maintained by every |
| 87 | /// function for this subtarget. |
| 88 | unsigned getStackAlignment() const { return stackAlignment; } |
| 89 | |
| 90 | /// getMinRepStrSizeThreshold - Returns the minimum memset / memcpy size |
| 91 | /// required to turn the operation into a X86 rep/movs or rep/stos |
| 92 | /// instruction. This is only used if the src / dst alignment is not DWORD |
| 93 | /// aligned. |
| 94 | unsigned getMinRepStrSizeThreshold() const { return MinRepStrSizeThreshold; } |
| 95 | |
| 96 | /// ParseSubtargetFeatures - Parses features string setting specified |
| 97 | /// subtarget options. Definition of function is auto generated by tblgen. |
| 98 | void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU); |
| 99 | |
| 100 | /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID |
| 101 | /// instruction. |
| 102 | void AutoDetectSubtargetFeatures(); |
| 103 | |
| 104 | bool is64Bit() const { return Is64Bit; } |
| 105 | |
| 106 | PICStyle::Style getPICStyle() const { return PICStyle; } |
| 107 | void setPICStyle(PICStyle::Style Style) { PICStyle = Style; } |
| 108 | |
| 109 | bool hasMMX() const { return X86SSELevel >= MMX; } |
| 110 | bool hasSSE1() const { return X86SSELevel >= SSE1; } |
| 111 | bool hasSSE2() const { return X86SSELevel >= SSE2; } |
| 112 | bool hasSSE3() const { return X86SSELevel >= SSE3; } |
| 113 | bool hasSSSE3() const { return X86SSELevel >= SSSE3; } |
| 114 | bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } |
| 115 | bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } |
| 116 | |
| 117 | unsigned getAsmFlavor() const { |
| 118 | return AsmFlavor != Unset ? unsigned(AsmFlavor) : 0; |
| 119 | } |
| 120 | |
| 121 | bool isFlavorAtt() const { return AsmFlavor == ATT; } |
| 122 | bool isFlavorIntel() const { return AsmFlavor == Intel; } |
| 123 | |
| 124 | bool isTargetDarwin() const { return TargetType == isDarwin; } |
| 125 | bool isTargetELF() const { return TargetType == isELF; } |
| 126 | bool isTargetWindows() const { return TargetType == isWindows; } |
| 127 | bool isTargetMingw() const { return TargetType == isMingw; } |
| 128 | bool isTargetCygMing() const { return (TargetType == isMingw || |
| 129 | TargetType == isCygwin); } |
| 130 | bool isTargetCygwin() const { return TargetType == isCygwin; } |
| 131 | |
| 132 | bool isPICStyleSet() const { return PICStyle != PICStyle::None; } |
| 133 | bool isPICStyleGOT() const { return PICStyle == PICStyle::GOT; } |
| 134 | bool isPICStyleStub() const { return PICStyle == PICStyle::Stub; } |
| 135 | bool isPICStyleRIPRel() const { return PICStyle == PICStyle::RIPRel; } |
| 136 | bool isPICStyleWinPIC() const { return PICStyle == PICStyle:: WinPIC; } |
| 137 | |
| 138 | /// True if accessing the GV requires an extra load. For Windows, dllimported |
| 139 | /// symbols are indirect, loading the value at address GV rather then the |
| 140 | /// value of GV itself. This means that the GlobalAddress must be in the base |
| 141 | /// or index register of the address, not the GV offset field. |
| 142 | bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine& TM, |
| 143 | bool isDirectCall) const; |
| 144 | |
| 145 | }; |
| 146 | |
| 147 | namespace X86 { |
| 148 | /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in |
| 149 | /// the specified arguments. If we can't run cpuid on the host, return true. |
| 150 | bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, |
| 151 | unsigned *rECX, unsigned *rEDX); |
| 152 | } |
| 153 | |
| 154 | } // End llvm namespace |
| 155 | |
| 156 | #endif |