Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 1 | //===---- IA64ISelDAGToDAG.cpp - IA64 pattern matching inst selector ------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Duraid Madina and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines a pattern matching instruction selector for IA64, |
| 11 | // converting a legalized dag to an IA64 dag. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #include "IA64.h" |
| 16 | #include "IA64TargetMachine.h" |
| 17 | #include "IA64ISelLowering.h" |
| 18 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 19 | #include "llvm/CodeGen/MachineFunction.h" |
| 20 | #include "llvm/CodeGen/SSARegMap.h" |
| 21 | #include "llvm/CodeGen/SelectionDAG.h" |
| 22 | #include "llvm/CodeGen/SelectionDAGISel.h" |
| 23 | #include "llvm/Target/TargetOptions.h" |
| 24 | #include "llvm/ADT/Statistic.h" |
| 25 | #include "llvm/Constants.h" |
| 26 | #include "llvm/GlobalValue.h" |
Chris Lattner | 420736d | 2006-03-25 06:47:10 +0000 | [diff] [blame] | 27 | #include "llvm/Intrinsics.h" |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 28 | #include "llvm/Support/Debug.h" |
| 29 | #include "llvm/Support/MathExtras.h" |
Chris Lattner | 2c2c6c6 | 2006-01-22 23:41:00 +0000 | [diff] [blame] | 30 | #include <iostream> |
Evan Cheng | 2ef88a0 | 2006-08-07 22:28:20 +0000 | [diff] [blame] | 31 | #include <queue> |
Evan Cheng | ba2f0a9 | 2006-02-05 06:46:41 +0000 | [diff] [blame] | 32 | #include <set> |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 33 | using namespace llvm; |
| 34 | |
| 35 | namespace { |
| 36 | Statistic<> FusedFP ("ia64-codegen", "Number of fused fp operations"); |
| 37 | Statistic<> FrameOff("ia64-codegen", "Number of frame idx offsets collapsed"); |
| 38 | |
| 39 | //===--------------------------------------------------------------------===// |
| 40 | /// IA64DAGToDAGISel - IA64 specific code to select IA64 machine |
| 41 | /// instructions for SelectionDAG operations. |
| 42 | /// |
| 43 | class IA64DAGToDAGISel : public SelectionDAGISel { |
| 44 | IA64TargetLowering IA64Lowering; |
| 45 | unsigned GlobalBaseReg; |
| 46 | public: |
Evan Cheng | c4c6257 | 2006-03-13 23:20:37 +0000 | [diff] [blame] | 47 | IA64DAGToDAGISel(IA64TargetMachine &TM) |
| 48 | : SelectionDAGISel(IA64Lowering), IA64Lowering(*TM.getTargetLowering()) {} |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 49 | |
| 50 | virtual bool runOnFunction(Function &Fn) { |
| 51 | // Make sure we re-emit a set of the global base reg if necessary |
| 52 | GlobalBaseReg = 0; |
| 53 | return SelectionDAGISel::runOnFunction(Fn); |
| 54 | } |
| 55 | |
| 56 | /// getI64Imm - Return a target constant with the specified value, of type |
| 57 | /// i64. |
| 58 | inline SDOperand getI64Imm(uint64_t Imm) { |
| 59 | return CurDAG->getTargetConstant(Imm, MVT::i64); |
| 60 | } |
| 61 | |
| 62 | /// getGlobalBaseReg - insert code into the entry mbb to materialize the PIC |
| 63 | /// base register. Return the virtual register that holds this value. |
| 64 | // SDOperand getGlobalBaseReg(); TODO: hmm |
| 65 | |
| 66 | // Select - Convert the specified operand from a target-independent to a |
| 67 | // target-specific node if it hasn't already been changed. |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 68 | SDNode *Select(SDOperand N); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 69 | |
| 70 | SDNode *SelectIntImmediateExpr(SDOperand LHS, SDOperand RHS, |
| 71 | unsigned OCHi, unsigned OCLo, |
| 72 | bool IsArithmetic = false, |
| 73 | bool Negate = false); |
| 74 | SDNode *SelectBitfieldInsert(SDNode *N); |
| 75 | |
| 76 | /// SelectCC - Select a comparison of the specified values with the |
| 77 | /// specified condition code, returning the CR# of the expression. |
| 78 | SDOperand SelectCC(SDOperand LHS, SDOperand RHS, ISD::CondCode CC); |
| 79 | |
| 80 | /// SelectAddr - Given the specified address, return the two operands for a |
| 81 | /// load/store instruction, and return true if it should be an indexed [r+r] |
| 82 | /// operation. |
| 83 | bool SelectAddr(SDOperand Addr, SDOperand &Op1, SDOperand &Op2); |
| 84 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 85 | /// InstructionSelectBasicBlock - This callback is invoked by |
| 86 | /// SelectionDAGISel when it has created a SelectionDAG for us to codegen. |
| 87 | virtual void InstructionSelectBasicBlock(SelectionDAG &DAG); |
| 88 | |
| 89 | virtual const char *getPassName() const { |
| 90 | return "IA64 (Itanium) DAG->DAG Instruction Selector"; |
| 91 | } |
| 92 | |
| 93 | // Include the pieces autogenerated from the target description. |
| 94 | #include "IA64GenDAGISel.inc" |
| 95 | |
| 96 | private: |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 97 | SDNode *SelectDIV(SDOperand Op); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 98 | }; |
| 99 | } |
| 100 | |
| 101 | /// InstructionSelectBasicBlock - This callback is invoked by |
| 102 | /// SelectionDAGISel when it has created a SelectionDAG for us to codegen. |
| 103 | void IA64DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) { |
| 104 | DEBUG(BB->dump()); |
Evan Cheng | 33e9ad9 | 2006-07-27 06:40:15 +0000 | [diff] [blame] | 105 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 106 | // Select target instructions for the DAG. |
Evan Cheng | ba2f0a9 | 2006-02-05 06:46:41 +0000 | [diff] [blame] | 107 | DAG.setRoot(SelectRoot(DAG.getRoot())); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 108 | DAG.RemoveDeadNodes(); |
| 109 | |
| 110 | // Emit machine code to BB. |
| 111 | ScheduleAndEmitDAG(DAG); |
| 112 | } |
| 113 | |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 114 | SDNode *IA64DAGToDAGISel::SelectDIV(SDOperand Op) { |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 115 | SDNode *N = Op.Val; |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 116 | SDOperand Chain = N->getOperand(0); |
| 117 | SDOperand Tmp1 = N->getOperand(0); |
| 118 | SDOperand Tmp2 = N->getOperand(1); |
| 119 | AddToISelQueue(Chain); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 120 | |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 121 | AddToISelQueue(Tmp1); |
| 122 | AddToISelQueue(Tmp2); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 123 | |
| 124 | bool isFP=false; |
| 125 | |
| 126 | if(MVT::isFloatingPoint(Tmp1.getValueType())) |
| 127 | isFP=true; |
| 128 | |
| 129 | bool isModulus=false; // is it a division or a modulus? |
| 130 | bool isSigned=false; |
| 131 | |
| 132 | switch(N->getOpcode()) { |
| 133 | case ISD::FDIV: |
| 134 | case ISD::SDIV: isModulus=false; isSigned=true; break; |
| 135 | case ISD::UDIV: isModulus=false; isSigned=false; break; |
| 136 | case ISD::FREM: |
| 137 | case ISD::SREM: isModulus=true; isSigned=true; break; |
| 138 | case ISD::UREM: isModulus=true; isSigned=false; break; |
| 139 | } |
| 140 | |
| 141 | // TODO: check for integer divides by powers of 2 (or other simple patterns?) |
| 142 | |
| 143 | SDOperand TmpPR, TmpPR2; |
| 144 | SDOperand TmpF1, TmpF2, TmpF3, TmpF4, TmpF5, TmpF6, TmpF7, TmpF8; |
| 145 | SDOperand TmpF9, TmpF10,TmpF11,TmpF12,TmpF13,TmpF14,TmpF15; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 146 | SDNode *Result; |
Duraid Madina | 76bb6ae | 2006-01-16 14:33:04 +0000 | [diff] [blame] | 147 | |
| 148 | // we'll need copies of F0 and F1 |
| 149 | SDOperand F0 = CurDAG->getRegister(IA64::F0, MVT::f64); |
| 150 | SDOperand F1 = CurDAG->getRegister(IA64::F1, MVT::f64); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 151 | |
| 152 | // OK, emit some code: |
| 153 | |
| 154 | if(!isFP) { |
| 155 | // first, load the inputs into FP regs. |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 156 | TmpF1 = |
| 157 | SDOperand(CurDAG->getTargetNode(IA64::SETFSIG, MVT::f64, Tmp1), 0); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 158 | Chain = TmpF1.getValue(1); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 159 | TmpF2 = |
| 160 | SDOperand(CurDAG->getTargetNode(IA64::SETFSIG, MVT::f64, Tmp2), 0); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 161 | Chain = TmpF2.getValue(1); |
| 162 | |
| 163 | // next, convert the inputs to FP |
| 164 | if(isSigned) { |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 165 | TmpF3 = |
| 166 | SDOperand(CurDAG->getTargetNode(IA64::FCVTXF, MVT::f64, TmpF1), 0); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 167 | Chain = TmpF3.getValue(1); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 168 | TmpF4 = |
| 169 | SDOperand(CurDAG->getTargetNode(IA64::FCVTXF, MVT::f64, TmpF2), 0); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 170 | Chain = TmpF4.getValue(1); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 171 | } else { // is unsigned |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 172 | TmpF3 = |
| 173 | SDOperand(CurDAG->getTargetNode(IA64::FCVTXUFS1, MVT::f64, TmpF1), 0); |
Duraid Madina | 76bb6ae | 2006-01-16 14:33:04 +0000 | [diff] [blame] | 174 | Chain = TmpF3.getValue(1); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 175 | TmpF4 = |
| 176 | SDOperand(CurDAG->getTargetNode(IA64::FCVTXUFS1, MVT::f64, TmpF2), 0); |
Duraid Madina | 76bb6ae | 2006-01-16 14:33:04 +0000 | [diff] [blame] | 177 | Chain = TmpF4.getValue(1); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 178 | } |
| 179 | |
| 180 | } else { // this is an FP divide/remainder, so we 'leak' some temp |
| 181 | // regs and assign TmpF3=Tmp1, TmpF4=Tmp2 |
| 182 | TmpF3=Tmp1; |
| 183 | TmpF4=Tmp2; |
| 184 | } |
| 185 | |
| 186 | // we start by computing an approximate reciprocal (good to 9 bits?) |
| 187 | // note, this instruction writes _both_ TmpF5 (answer) and TmpPR (predicate) |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 188 | if(isFP) |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 189 | TmpF5 = SDOperand(CurDAG->getTargetNode(IA64::FRCPAS0, MVT::f64, MVT::i1, |
| 190 | TmpF3, TmpF4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 191 | else |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 192 | TmpF5 = SDOperand(CurDAG->getTargetNode(IA64::FRCPAS1, MVT::f64, MVT::i1, |
| 193 | TmpF3, TmpF4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 194 | |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 195 | TmpPR = TmpF5.getValue(1); |
| 196 | Chain = TmpF5.getValue(2); |
| 197 | |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 198 | SDOperand minusB; |
| 199 | if(isModulus) { // for remainders, it'll be handy to have |
| 200 | // copies of -input_b |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 201 | minusB = SDOperand(CurDAG->getTargetNode(IA64::SUB, MVT::i64, |
| 202 | CurDAG->getRegister(IA64::r0, MVT::i64), Tmp2), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 203 | Chain = minusB.getValue(1); |
| 204 | } |
| 205 | |
| 206 | SDOperand TmpE0, TmpY1, TmpE1, TmpY2; |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 207 | |
| 208 | SDOperand OpsE0[] = { TmpF4, TmpF5, F1, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 209 | TmpE0 = SDOperand(CurDAG->getTargetNode(IA64::CFNMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 210 | OpsE0, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 211 | Chain = TmpE0.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 212 | SDOperand OpsY1[] = { TmpF5, TmpE0, TmpF5, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 213 | TmpY1 = SDOperand(CurDAG->getTargetNode(IA64::CFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 214 | OpsY1, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 215 | Chain = TmpY1.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 216 | SDOperand OpsE1[] = { TmpE0, TmpE0, F0, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 217 | TmpE1 = SDOperand(CurDAG->getTargetNode(IA64::CFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 218 | OpsE1, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 219 | Chain = TmpE1.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 220 | SDOperand OpsY2[] = { TmpY1, TmpE1, TmpY1, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 221 | TmpY2 = SDOperand(CurDAG->getTargetNode(IA64::CFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 222 | OpsY2, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 223 | Chain = TmpY2.getValue(1); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 224 | |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 225 | if(isFP) { // if this is an FP divide, we finish up here and exit early |
| 226 | if(isModulus) |
| 227 | assert(0 && "Sorry, try another FORTRAN compiler."); |
| 228 | |
| 229 | SDOperand TmpE2, TmpY3, TmpQ0, TmpR0; |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 230 | |
| 231 | SDOperand OpsE2[] = { TmpE1, TmpE1, F0, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 232 | TmpE2 = SDOperand(CurDAG->getTargetNode(IA64::CFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 233 | OpsE2, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 234 | Chain = TmpE2.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 235 | SDOperand OpsY3[] = { TmpY2, TmpE2, TmpY2, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 236 | TmpY3 = SDOperand(CurDAG->getTargetNode(IA64::CFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 237 | OpsY3, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 238 | Chain = TmpY3.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 239 | SDOperand OpsQ0[] = { Tmp1, TmpY3, F0, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 240 | TmpQ0 = |
| 241 | SDOperand(CurDAG->getTargetNode(IA64::CFMADS1, MVT::f64, // double prec! |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 242 | OpsQ0, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 243 | Chain = TmpQ0.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 244 | SDOperand OpsR0[] = { Tmp2, TmpQ0, Tmp1, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 245 | TmpR0 = |
| 246 | SDOperand(CurDAG->getTargetNode(IA64::CFNMADS1, MVT::f64, // double prec! |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 247 | OpsR0, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 248 | Chain = TmpR0.getValue(1); |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 249 | |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 250 | // we want Result to have the same target register as the frcpa, so |
| 251 | // we two-address hack it. See the comment "for this to work..." on |
| 252 | // page 48 of Intel application note #245415 |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 253 | SDOperand Ops[] = { TmpF5, TmpY3, TmpR0, TmpQ0, TmpPR }; |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 254 | Result = CurDAG->getTargetNode(IA64::TCFMADS0, MVT::f64, // d.p. s0 rndg! |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 255 | Ops, 5); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 256 | Chain = SDOperand(Result, 1); |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 257 | return Result; // XXX: early exit! |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 258 | } else { // this is *not* an FP divide, so there's a bit left to do: |
| 259 | |
| 260 | SDOperand TmpQ2, TmpR2, TmpQ3, TmpQ; |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 261 | |
| 262 | SDOperand OpsQ2[] = { TmpF3, TmpY2, F0, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 263 | TmpQ2 = SDOperand(CurDAG->getTargetNode(IA64::CFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 264 | OpsQ2, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 265 | Chain = TmpQ2.getValue(1); |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 266 | SDOperand OpsR2[] = { TmpF4, TmpQ2, TmpF3, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 267 | TmpR2 = SDOperand(CurDAG->getTargetNode(IA64::CFNMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 268 | OpsR2, 4), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 269 | Chain = TmpR2.getValue(1); |
Duraid Madina | ae6dcdd | 2006-01-17 01:19:49 +0000 | [diff] [blame] | 270 | |
Duraid Madina | 76bb6ae | 2006-01-16 14:33:04 +0000 | [diff] [blame] | 271 | // we want TmpQ3 to have the same target register as the frcpa? maybe we |
| 272 | // should two-address hack it. See the comment "for this to work..." on page |
| 273 | // 48 of Intel application note #245415 |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 274 | SDOperand OpsQ3[] = { TmpF5, TmpR2, TmpY2, TmpQ2, TmpPR }; |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 275 | TmpQ3 = SDOperand(CurDAG->getTargetNode(IA64::TCFMAS1, MVT::f64, |
Evan Cheng | 0b828e0 | 2006-08-27 08:14:06 +0000 | [diff] [blame^] | 276 | OpsQ3, 5), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 277 | Chain = TmpQ3.getValue(1); |
Duraid Madina | 76bb6ae | 2006-01-16 14:33:04 +0000 | [diff] [blame] | 278 | |
Duraid Madina | ae6dcdd | 2006-01-17 01:19:49 +0000 | [diff] [blame] | 279 | // STORY: without these two-address instructions (TCFMAS1 and TCFMADS0) |
| 280 | // the FPSWA won't be able to help out in the case of large/tiny |
| 281 | // arguments. Other fun bugs may also appear, e.g. 0/x = x, not 0. |
| 282 | |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 283 | if(isSigned) |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 284 | TmpQ = SDOperand(CurDAG->getTargetNode(IA64::FCVTFXTRUNCS1, |
| 285 | MVT::f64, TmpQ3), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 286 | else |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 287 | TmpQ = SDOperand(CurDAG->getTargetNode(IA64::FCVTFXUTRUNCS1, |
| 288 | MVT::f64, TmpQ3), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 289 | |
| 290 | Chain = TmpQ.getValue(1); |
| 291 | |
| 292 | if(isModulus) { |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 293 | SDOperand FPminusB = |
| 294 | SDOperand(CurDAG->getTargetNode(IA64::SETFSIG, MVT::f64, minusB), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 295 | Chain = FPminusB.getValue(1); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 296 | SDOperand Remainder = |
| 297 | SDOperand(CurDAG->getTargetNode(IA64::XMAL, MVT::f64, |
| 298 | TmpQ, FPminusB, TmpF1), 0); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 299 | Chain = Remainder.getValue(1); |
| 300 | Result = CurDAG->getTargetNode(IA64::GETFSIG, MVT::i64, Remainder); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 301 | Chain = SDOperand(Result, 1); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 302 | } else { // just an integer divide |
| 303 | Result = CurDAG->getTargetNode(IA64::GETFSIG, MVT::i64, TmpQ); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 304 | Chain = SDOperand(Result, 1); |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 305 | } |
| 306 | |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 307 | return Result; |
Duraid Madina | 0c81dc8 | 2006-01-16 06:33:38 +0000 | [diff] [blame] | 308 | } // wasn't an FP divide |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 309 | } |
| 310 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 311 | // Select - Convert the specified operand from a target-independent to a |
| 312 | // target-specific node if it hasn't already been changed. |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 313 | SDNode *IA64DAGToDAGISel::Select(SDOperand Op) { |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 314 | SDNode *N = Op.Val; |
| 315 | if (N->getOpcode() >= ISD::BUILTIN_OP_END && |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 316 | N->getOpcode() < IA64ISD::FIRST_NUMBER) |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 317 | return NULL; // Already selected. |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 318 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 319 | switch (N->getOpcode()) { |
| 320 | default: break; |
| 321 | |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 322 | case IA64ISD::BRCALL: { // XXX: this is also a hack! |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 323 | SDOperand Chain = N->getOperand(0); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 324 | SDOperand InFlag; // Null incoming flag value. |
| 325 | |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 326 | AddToISelQueue(Chain); |
| 327 | if(N->getNumOperands()==3) { // we have an incoming chain, callee and flag |
| 328 | InFlag = N->getOperand(2); |
| 329 | AddToISelQueue(InFlag); |
| 330 | } |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 331 | |
| 332 | unsigned CallOpcode; |
| 333 | SDOperand CallOperand; |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 334 | |
| 335 | // if we can call directly, do so |
| 336 | if (GlobalAddressSDNode *GASD = |
| 337 | dyn_cast<GlobalAddressSDNode>(N->getOperand(1))) { |
| 338 | CallOpcode = IA64::BRCALL_IPREL_GA; |
| 339 | CallOperand = CurDAG->getTargetGlobalAddress(GASD->getGlobal(), MVT::i64); |
| 340 | } else if (ExternalSymbolSDNode *ESSDN = // FIXME: we currently NEED this |
| 341 | // case for correctness, to avoid |
| 342 | // "non-pic code with imm reloc.n |
| 343 | // against dynamic symbol" errors |
| 344 | dyn_cast<ExternalSymbolSDNode>(N->getOperand(1))) { |
| 345 | CallOpcode = IA64::BRCALL_IPREL_ES; |
| 346 | CallOperand = N->getOperand(1); |
| 347 | } else { |
| 348 | // otherwise we need to load the function descriptor, |
| 349 | // load the branch target (function)'s entry point and GP, |
| 350 | // branch (call) then restore the GP |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 351 | SDOperand FnDescriptor = N->getOperand(1); |
| 352 | AddToISelQueue(FnDescriptor); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 353 | |
| 354 | // load the branch target's entry point [mem] and |
| 355 | // GP value [mem+8] |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 356 | SDOperand targetEntryPoint= |
| 357 | SDOperand(CurDAG->getTargetNode(IA64::LD8, MVT::i64, FnDescriptor), 0); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 358 | Chain = targetEntryPoint.getValue(1); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 359 | SDOperand targetGPAddr= |
| 360 | SDOperand(CurDAG->getTargetNode(IA64::ADDS, MVT::i64, |
| 361 | FnDescriptor, CurDAG->getConstant(8, MVT::i64)), 0); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 362 | Chain = targetGPAddr.getValue(1); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 363 | SDOperand targetGP= |
| 364 | SDOperand(CurDAG->getTargetNode(IA64::LD8, MVT::i64, targetGPAddr), 0); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 365 | Chain = targetGP.getValue(1); |
| 366 | |
| 367 | Chain = CurDAG->getCopyToReg(Chain, IA64::r1, targetGP, InFlag); |
| 368 | InFlag = Chain.getValue(1); |
| 369 | Chain = CurDAG->getCopyToReg(Chain, IA64::B6, targetEntryPoint, InFlag); // FLAG these? |
| 370 | InFlag = Chain.getValue(1); |
| 371 | |
| 372 | CallOperand = CurDAG->getRegister(IA64::B6, MVT::i64); |
| 373 | CallOpcode = IA64::BRCALL_INDIRECT; |
| 374 | } |
| 375 | |
| 376 | // Finally, once everything is setup, emit the call itself |
| 377 | if(InFlag.Val) |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 378 | Chain = SDOperand(CurDAG->getTargetNode(CallOpcode, MVT::Other, MVT::Flag, |
| 379 | CallOperand, InFlag), 0); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 380 | else // there might be no arguments |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 381 | Chain = SDOperand(CurDAG->getTargetNode(CallOpcode, MVT::Other, MVT::Flag, |
| 382 | CallOperand, Chain), 0); |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 383 | InFlag = Chain.getValue(1); |
| 384 | |
| 385 | std::vector<SDOperand> CallResults; |
| 386 | |
| 387 | CallResults.push_back(Chain); |
| 388 | CallResults.push_back(InFlag); |
| 389 | |
| 390 | for (unsigned i = 0, e = CallResults.size(); i != e; ++i) |
Evan Cheng | 2ef88a0 | 2006-08-07 22:28:20 +0000 | [diff] [blame] | 391 | ReplaceUses(Op.getValue(i), CallResults[i]); |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 392 | return NULL; |
Duraid Madina | 64aa0ea | 2005-12-22 13:29:14 +0000 | [diff] [blame] | 393 | } |
Duraid Madina | a36153a | 2005-12-22 03:58:17 +0000 | [diff] [blame] | 394 | |
Duraid Madina | 8617f3c | 2005-12-22 07:14:45 +0000 | [diff] [blame] | 395 | case IA64ISD::GETFD: { |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 396 | SDOperand Input = N->getOperand(0); |
| 397 | AddToISelQueue(Input); |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 398 | return CurDAG->getTargetNode(IA64::GETFD, MVT::i64, Input); |
Duraid Madina | 8617f3c | 2005-12-22 07:14:45 +0000 | [diff] [blame] | 399 | } |
| 400 | |
Duraid Madina | b6f023a | 2005-11-21 14:14:54 +0000 | [diff] [blame] | 401 | case ISD::FDIV: |
| 402 | case ISD::SDIV: |
| 403 | case ISD::UDIV: |
| 404 | case ISD::SREM: |
Evan Cheng | 3416721 | 2006-02-09 00:37:58 +0000 | [diff] [blame] | 405 | case ISD::UREM: |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 406 | return SelectDIV(Op); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 407 | |
Chris Lattner | a54aa94 | 2006-01-29 06:26:08 +0000 | [diff] [blame] | 408 | case ISD::TargetConstantFP: { |
Duraid Madina | 056728f | 2005-11-02 07:32:59 +0000 | [diff] [blame] | 409 | SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so.. |
| 410 | |
Evan Cheng | 3416721 | 2006-02-09 00:37:58 +0000 | [diff] [blame] | 411 | if (cast<ConstantFPSDNode>(N)->isExactlyValue(+0.0)) { |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 412 | return CurDAG->getCopyFromReg(Chain, IA64::F0, MVT::f64).Val; |
Evan Cheng | 3416721 | 2006-02-09 00:37:58 +0000 | [diff] [blame] | 413 | } else if (cast<ConstantFPSDNode>(N)->isExactlyValue(+1.0)) { |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 414 | return CurDAG->getCopyFromReg(Chain, IA64::F1, MVT::f64).Val; |
Evan Cheng | 3416721 | 2006-02-09 00:37:58 +0000 | [diff] [blame] | 415 | } else |
Duraid Madina | 9385680 | 2005-11-02 02:35:04 +0000 | [diff] [blame] | 416 | assert(0 && "Unexpected FP constant!"); |
| 417 | } |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 418 | |
| 419 | case ISD::FrameIndex: { // TODO: reduce creepyness |
| 420 | int FI = cast<FrameIndexSDNode>(N)->getIndex(); |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 421 | if (N->hasOneUse()) |
| 422 | return CurDAG->SelectNodeTo(N, IA64::MOV, MVT::i64, |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 423 | CurDAG->getTargetFrameIndex(FI, MVT::i64)); |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 424 | else |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 425 | return CurDAG->getTargetNode(IA64::MOV, MVT::i64, |
| 426 | CurDAG->getTargetFrameIndex(FI, MVT::i64)); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 427 | } |
| 428 | |
Duraid Madina | 2e0348e | 2006-01-15 09:45:23 +0000 | [diff] [blame] | 429 | case ISD::ConstantPool: { // TODO: nuke the constant pool |
| 430 | // (ia64 doesn't need one) |
Evan Cheng | b8973bd | 2006-01-31 22:23:14 +0000 | [diff] [blame] | 431 | ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); |
| 432 | Constant *C = CP->get(); |
| 433 | SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64, |
| 434 | CP->getAlignment()); |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 435 | return CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, // ? |
| 436 | CurDAG->getRegister(IA64::r1, MVT::i64), CPI); |
Duraid Madina | 25d0a88 | 2005-10-29 16:08:30 +0000 | [diff] [blame] | 437 | } |
| 438 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 439 | case ISD::GlobalAddress: { |
| 440 | GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal(); |
| 441 | SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i64); |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 442 | SDOperand Tmp = SDOperand(CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, |
| 443 | CurDAG->getRegister(IA64::r1, MVT::i64), GA), 0); |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 444 | return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 445 | } |
Duraid Madina | a36153a | 2005-12-22 03:58:17 +0000 | [diff] [blame] | 446 | |
| 447 | /* XXX case ISD::ExternalSymbol: { |
| 448 | SDOperand EA = CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>(N)->getSymbol(), |
| 449 | MVT::i64); |
| 450 | SDOperand Tmp = CurDAG->getTargetNode(IA64::ADDL_EA, MVT::i64, |
| 451 | CurDAG->getRegister(IA64::r1, MVT::i64), EA); |
| 452 | return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp); |
| 453 | } |
| 454 | */ |
| 455 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 456 | case ISD::LOAD: |
Duraid Madina | ecc1a1b | 2006-01-20 16:10:05 +0000 | [diff] [blame] | 457 | case ISD::EXTLOAD: // FIXME: load -1, not 1, for bools? |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 458 | case ISD::ZEXTLOAD: { |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 459 | SDOperand Chain = N->getOperand(0); |
| 460 | SDOperand Address = N->getOperand(1); |
| 461 | AddToISelQueue(Chain); |
| 462 | AddToISelQueue(Address); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 463 | |
| 464 | MVT::ValueType TypeBeingLoaded = (N->getOpcode() == ISD::LOAD) ? |
| 465 | N->getValueType(0) : cast<VTSDNode>(N->getOperand(3))->getVT(); |
| 466 | unsigned Opc; |
| 467 | switch (TypeBeingLoaded) { |
Jim Laskey | 16d42c6 | 2006-07-11 18:25:13 +0000 | [diff] [blame] | 468 | default: |
| 469 | #ifndef NDEBUG |
| 470 | N->dump(); |
| 471 | #endif |
| 472 | assert(0 && "Cannot load this type!"); |
Duraid Madina | 9f72906 | 2005-11-04 09:59:06 +0000 | [diff] [blame] | 473 | case MVT::i1: { // this is a bool |
| 474 | Opc = IA64::LD1; // first we load a byte, then compare for != 0 |
Evan Cheng | 3416721 | 2006-02-09 00:37:58 +0000 | [diff] [blame] | 475 | if(N->getValueType(0) == MVT::i1) { // XXX: early exit! |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 476 | return CurDAG->SelectNodeTo(N, IA64::CMPNE, MVT::i1, MVT::Other, |
Evan Cheng | 7e9b26f | 2006-02-09 07:17:49 +0000 | [diff] [blame] | 477 | SDOperand(CurDAG->getTargetNode(Opc, MVT::i64, Address), 0), |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 478 | CurDAG->getRegister(IA64::r0, MVT::i64), |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 479 | Chain); |
Evan Cheng | 3416721 | 2006-02-09 00:37:58 +0000 | [diff] [blame] | 480 | } |
Duraid Madina | a36153a | 2005-12-22 03:58:17 +0000 | [diff] [blame] | 481 | /* otherwise, we want to load a bool into something bigger: LD1 |
| 482 | will do that for us, so we just fall through */ |
Chris Lattner | b19b899 | 2005-11-30 23:02:08 +0000 | [diff] [blame] | 483 | } |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 484 | case MVT::i8: Opc = IA64::LD1; break; |
| 485 | case MVT::i16: Opc = IA64::LD2; break; |
| 486 | case MVT::i32: Opc = IA64::LD4; break; |
| 487 | case MVT::i64: Opc = IA64::LD8; break; |
| 488 | |
| 489 | case MVT::f32: Opc = IA64::LDF4; break; |
| 490 | case MVT::f64: Opc = IA64::LDF8; break; |
| 491 | } |
| 492 | |
Chris Lattner | b19b899 | 2005-11-30 23:02:08 +0000 | [diff] [blame] | 493 | // TODO: comment this |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 494 | return CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), MVT::Other, |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 495 | Address, Chain); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 496 | } |
| 497 | |
| 498 | case ISD::TRUNCSTORE: |
| 499 | case ISD::STORE: { |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 500 | SDOperand Address = N->getOperand(2); |
| 501 | SDOperand Chain = N->getOperand(0); |
| 502 | AddToISelQueue(Address); |
| 503 | AddToISelQueue(Chain); |
Duraid Madina | d525df3 | 2005-11-07 03:11:02 +0000 | [diff] [blame] | 504 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 505 | unsigned Opc; |
| 506 | if (N->getOpcode() == ISD::STORE) { |
| 507 | switch (N->getOperand(1).getValueType()) { |
Duraid Madina | d525df3 | 2005-11-07 03:11:02 +0000 | [diff] [blame] | 508 | default: assert(0 && "unknown type in store"); |
| 509 | case MVT::i1: { // this is a bool |
| 510 | Opc = IA64::ST1; // we store either 0 or 1 as a byte |
Duraid Madina | 544cbbd | 2006-01-13 10:28:25 +0000 | [diff] [blame] | 511 | // first load zero! |
| 512 | SDOperand Initial = CurDAG->getCopyFromReg(Chain, IA64::r0, MVT::i64); |
| 513 | Chain = Initial.getValue(1); |
Duraid Madina | a7fb5be | 2006-01-20 03:40:25 +0000 | [diff] [blame] | 514 | // then load 1 into the same reg iff the predicate to store is 1 |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 515 | SDOperand Tmp = N->getOperand(1); |
| 516 | AddToISelQueue(Tmp); |
Duraid Madina | b20f979 | 2006-02-11 07:33:17 +0000 | [diff] [blame] | 517 | Tmp = SDOperand(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial, |
| 518 | CurDAG->getConstant(1, MVT::i64), |
| 519 | Tmp), 0); |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 520 | return CurDAG->SelectNodeTo(N, Opc, MVT::Other, Address, Tmp, Chain); |
Chris Lattner | b19b899 | 2005-11-30 23:02:08 +0000 | [diff] [blame] | 521 | } |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 522 | case MVT::i64: Opc = IA64::ST8; break; |
| 523 | case MVT::f64: Opc = IA64::STF8; break; |
Duraid Madina | d525df3 | 2005-11-07 03:11:02 +0000 | [diff] [blame] | 524 | } |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 525 | } else { //ISD::TRUNCSTORE |
| 526 | switch(cast<VTSDNode>(N->getOperand(4))->getVT()) { |
Duraid Madina | d525df3 | 2005-11-07 03:11:02 +0000 | [diff] [blame] | 527 | default: assert(0 && "unknown type in truncstore"); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 528 | case MVT::i8: Opc = IA64::ST1; break; |
| 529 | case MVT::i16: Opc = IA64::ST2; break; |
| 530 | case MVT::i32: Opc = IA64::ST4; break; |
| 531 | case MVT::f32: Opc = IA64::STF4; break; |
| 532 | } |
| 533 | } |
| 534 | |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 535 | SDOperand N1 = N->getOperand(1); |
| 536 | SDOperand N2 = N->getOperand(2); |
| 537 | AddToISelQueue(N1); |
| 538 | AddToISelQueue(N2); |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 539 | return CurDAG->SelectNodeTo(N, Opc, MVT::Other, N2, N1, Chain); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | case ISD::BRCOND: { |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 543 | SDOperand Chain = N->getOperand(0); |
| 544 | SDOperand CC = N->getOperand(1); |
| 545 | AddToISelQueue(Chain); |
| 546 | AddToISelQueue(CC); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 547 | MachineBasicBlock *Dest = |
| 548 | cast<BasicBlockSDNode>(N->getOperand(2))->getBasicBlock(); |
| 549 | //FIXME - we do NOT need long branches all the time |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 550 | return CurDAG->SelectNodeTo(N, IA64::BRLCOND_NOTCALL, MVT::Other, CC, |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 551 | CurDAG->getBasicBlock(Dest), Chain); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 552 | } |
| 553 | |
| 554 | case ISD::CALLSEQ_START: |
| 555 | case ISD::CALLSEQ_END: { |
| 556 | int64_t Amt = cast<ConstantSDNode>(N->getOperand(1))->getValue(); |
| 557 | unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ? |
| 558 | IA64::ADJUSTCALLSTACKDOWN : IA64::ADJUSTCALLSTACKUP; |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 559 | SDOperand N0 = N->getOperand(0); |
| 560 | AddToISelQueue(N0); |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 561 | return CurDAG->SelectNodeTo(N, Opc, MVT::Other, getI64Imm(Amt), N0); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 562 | } |
| 563 | |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 564 | case ISD::BR: |
| 565 | // FIXME: we don't need long branches all the time! |
Evan Cheng | 6da2f32 | 2006-08-26 01:07:58 +0000 | [diff] [blame] | 566 | SDOperand N0 = N->getOperand(0); |
| 567 | AddToISelQueue(N0); |
Evan Cheng | 23329f5 | 2006-08-16 07:30:09 +0000 | [diff] [blame] | 568 | return CurDAG->SelectNodeTo(N, IA64::BRL_NOTCALL, MVT::Other, |
Evan Cheng | 95514ba | 2006-08-26 08:00:10 +0000 | [diff] [blame] | 569 | N->getOperand(1), N0); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 570 | } |
| 571 | |
Evan Cheng | 9ade218 | 2006-08-26 05:34:46 +0000 | [diff] [blame] | 572 | return SelectCode(Op); |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 573 | } |
| 574 | |
| 575 | |
| 576 | /// createIA64DAGToDAGInstructionSelector - This pass converts a legalized DAG |
| 577 | /// into an IA64-specific DAG, ready for instruction scheduling. |
| 578 | /// |
Evan Cheng | c4c6257 | 2006-03-13 23:20:37 +0000 | [diff] [blame] | 579 | FunctionPass |
| 580 | *llvm::createIA64DAGToDAGInstructionSelector(IA64TargetMachine &TM) { |
Duraid Madina | f2db9b8 | 2005-10-28 17:46:35 +0000 | [diff] [blame] | 581 | return new IA64DAGToDAGISel(TM); |
| 582 | } |
| 583 | |