Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 1 | //===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===// |
| 2 | // |
Chris Lattner | 33f53b5 | 2002-10-29 20:48:56 +0000 | [diff] [blame] | 3 | // This file contains the X86 implementation of the MachineInstrInfo class. |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 4 | // |
| 5 | //===----------------------------------------------------------------------===// |
| 6 | |
| 7 | #ifndef X86INSTRUCTIONINFO_H |
| 8 | #define X86INSTRUCTIONINFO_H |
| 9 | |
Chris Lattner | 9bbf439 | 2002-10-29 17:43:19 +0000 | [diff] [blame] | 10 | #include "llvm/Target/MachineInstrInfo.h" |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 11 | #include "X86RegisterInfo.h" |
| 12 | |
Chris Lattner | 9d17740 | 2002-10-30 01:09:34 +0000 | [diff] [blame] | 13 | /// X86II - This namespace holds all of the target specific flags that |
| 14 | /// instruction info tracks. |
| 15 | /// |
| 16 | namespace X86II { |
| 17 | enum { |
Chris Lattner | 6aab9cf | 2002-11-18 05:37:11 +0000 | [diff] [blame] | 18 | //===------------------------------------------------------------------===// |
| 19 | // Instruction types. These are the standard/most common forms for X86 |
| 20 | // instructions. |
| 21 | // |
| 22 | |
| 23 | /// Other - An instruction gets this form if it doesn't fit any of the |
| 24 | /// catagories below. |
| 25 | OtherFrm = 0, |
| 26 | |
| 27 | /// Raw - This form is for instructions that don't have any operands, so |
| 28 | /// they are just a fixed opcode value, like 'leave'. |
| 29 | RawFrm = 1, |
| 30 | |
| 31 | /// AddRegFrm - This form is used for instructions like 'push r32' that have |
| 32 | /// their one register operand added to their opcode. |
| 33 | AddRegFrm = 2, |
| 34 | |
| 35 | /// MRMDestReg - This form is used for instructions that use the Mod/RM byte |
| 36 | /// to specify a destination, which in this case is a register. |
| 37 | /// |
| 38 | MRMDestReg = 3, |
| 39 | |
| 40 | /// MRMDestMem - This form is used for instructions that use the Mod/RM byte |
| 41 | /// to specify a destination, which in this case is memory. |
| 42 | /// |
| 43 | MRMDestMem = 4, |
| 44 | |
| 45 | /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte |
| 46 | /// to specify a source, which in this case is a register. |
| 47 | /// |
| 48 | MRMSrcReg = 5, |
| 49 | |
| 50 | /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte |
| 51 | /// to specify a source, which in this case is memory. |
| 52 | /// |
| 53 | MRMSrcMem = 6, |
| 54 | |
| 55 | /// TODO: Mod/RM that uses a fixed opcode extension, like /0 |
| 56 | |
Chris Lattner | f21dfcd | 2002-11-18 06:56:24 +0000 | [diff] [blame] | 57 | FormMask = 7, |
Chris Lattner | 6aab9cf | 2002-11-18 05:37:11 +0000 | [diff] [blame] | 58 | |
| 59 | //===------------------------------------------------------------------===// |
| 60 | // Actual flags... |
| 61 | |
Chris Lattner | 239dcfd | 2002-11-18 01:59:28 +0000 | [diff] [blame] | 62 | /// Void - Set if this instruction produces no value |
Chris Lattner | 6aab9cf | 2002-11-18 05:37:11 +0000 | [diff] [blame] | 63 | Void = 1 << 3, |
Chris Lattner | 239dcfd | 2002-11-18 01:59:28 +0000 | [diff] [blame] | 64 | |
| 65 | // TB - TwoByte - Set if this instruction has a two byte opcode, which |
| 66 | // starts with a 0x0F byte before the real opcode. |
Chris Lattner | 6aab9cf | 2002-11-18 05:37:11 +0000 | [diff] [blame] | 67 | TB = 1 << 4, |
Chris Lattner | 11e53e3 | 2002-11-21 01:32:55 +0000 | [diff] [blame^] | 68 | |
| 69 | // OpSize - Set if this instruction requires an operand size prefix (0x66), |
| 70 | // which most often indicates that the instruction operates on 16 bit data |
| 71 | // instead of 32 bit data. |
| 72 | OpSize = 1 << 5, |
Chris Lattner | 9d17740 | 2002-10-30 01:09:34 +0000 | [diff] [blame] | 73 | }; |
| 74 | } |
| 75 | |
Chris Lattner | 055c965 | 2002-10-29 21:05:24 +0000 | [diff] [blame] | 76 | class X86InstrInfo : public MachineInstrInfo { |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 77 | const X86RegisterInfo RI; |
| 78 | public: |
Chris Lattner | 055c965 | 2002-10-29 21:05:24 +0000 | [diff] [blame] | 79 | X86InstrInfo(); |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 80 | |
Chris Lattner | 33f53b5 | 2002-10-29 20:48:56 +0000 | [diff] [blame] | 81 | /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info. As |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 82 | /// such, whenever a client has an instance of instruction info, it should |
| 83 | /// always be able to get register info as well (through this method). |
| 84 | /// |
| 85 | virtual const MRegisterInfo &getRegisterInfo() const { return RI; } |
| 86 | |
Chris Lattner | dbb61c6 | 2002-11-17 22:53:13 +0000 | [diff] [blame] | 87 | /// print - Print out an x86 instruction in intel syntax |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 88 | /// |
Chris Lattner | 927dd09 | 2002-11-17 23:20:37 +0000 | [diff] [blame] | 89 | virtual void print(const MachineInstr *MI, std::ostream &O, |
| 90 | const TargetMachine &TM) const; |
Chris Lattner | 9bbf439 | 2002-10-29 17:43:19 +0000 | [diff] [blame] | 91 | |
Chris Lattner | f21dfcd | 2002-11-18 06:56:24 +0000 | [diff] [blame] | 92 | // getBaseOpcodeFor - This function returns the "base" X86 opcode for the |
| 93 | // specified opcode number. |
| 94 | // |
| 95 | unsigned char getBaseOpcodeFor(unsigned Opcode) const; |
| 96 | |
| 97 | |
Chris Lattner | 9bbf439 | 2002-10-29 17:43:19 +0000 | [diff] [blame] | 98 | |
| 99 | //===--------------------------------------------------------------------===// |
| 100 | // |
| 101 | // These are stubs for pure virtual methods that should be factored out of |
| 102 | // MachineInstrInfo. We never call them, we don't want them, but we need |
| 103 | // stubs so that we can instatiate our class. |
| 104 | // |
| 105 | MachineOpCode getNOPOpCode() const { abort(); } |
| 106 | void CreateCodeToLoadConst(const TargetMachine& target, Function* F, |
| 107 | Value *V, Instruction *I, |
| 108 | std::vector<MachineInstr*>& mvec, |
| 109 | MachineCodeForInstruction& mcfi) const { abort(); } |
| 110 | void CreateCodeToCopyIntToFloat(const TargetMachine& target, |
| 111 | Function* F, Value* val, Instruction* dest, |
| 112 | std::vector<MachineInstr*>& mvec, |
| 113 | MachineCodeForInstruction& mcfi) const { |
| 114 | abort(); |
| 115 | } |
| 116 | void CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F, |
| 117 | Value* val, Instruction* dest, |
| 118 | std::vector<MachineInstr*>& mvec, |
| 119 | MachineCodeForInstruction& mcfi)const { |
| 120 | abort(); |
| 121 | } |
| 122 | void CreateCopyInstructionsByType(const TargetMachine& target, |
| 123 | Function* F, Value* src, |
| 124 | Instruction* dest, |
| 125 | std::vector<MachineInstr*>& mvec, |
| 126 | MachineCodeForInstruction& mcfi)const { |
| 127 | abort(); |
| 128 | } |
| 129 | |
| 130 | void CreateSignExtensionInstructions(const TargetMachine& target, |
| 131 | Function* F, Value* srcVal, |
| 132 | Value* destVal, unsigned numLowBits, |
| 133 | std::vector<MachineInstr*>& mvec, |
| 134 | MachineCodeForInstruction& mcfi) const { |
| 135 | abort(); |
| 136 | } |
| 137 | |
| 138 | void CreateZeroExtensionInstructions(const TargetMachine& target, |
| 139 | Function* F, Value* srcVal, |
| 140 | Value* destVal, unsigned srcSizeInBits, |
| 141 | std::vector<MachineInstr*>& mvec, |
| 142 | MachineCodeForInstruction& mcfi) const { |
| 143 | abort(); |
| 144 | } |
Chris Lattner | 7261408 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 145 | }; |
| 146 | |
| 147 | |
| 148 | #endif |