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Lang Hamese2b201b2009-05-18 19:03:16 +00001//===-- llvm/CodeGen/Spiller.cpp - Spiller -------------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#define DEBUG_TYPE "spiller"
11
12#include "Spiller.h"
13#include "VirtRegMap.h"
14#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Bill Wendlingc75e7d22009-08-22 20:54:03 +000015#include "llvm/CodeGen/MachineFrameInfo.h"
Lang Hamese2b201b2009-05-18 19:03:16 +000016#include "llvm/CodeGen/MachineFunction.h"
17#include "llvm/CodeGen/MachineRegisterInfo.h"
Lang Hamese2b201b2009-05-18 19:03:16 +000018#include "llvm/Target/TargetMachine.h"
19#include "llvm/Target/TargetInstrInfo.h"
Lang Hames835ca072009-11-19 04:15:33 +000020#include "llvm/Support/CommandLine.h"
Lang Hamese2b201b2009-05-18 19:03:16 +000021#include "llvm/Support/Debug.h"
Bill Wendlingc75e7d22009-08-22 20:54:03 +000022#include "llvm/Support/raw_ostream.h"
Lang Hamese2b201b2009-05-18 19:03:16 +000023
Lang Hamese2b201b2009-05-18 19:03:16 +000024using namespace llvm;
25
Lang Hames835ca072009-11-19 04:15:33 +000026namespace {
27 enum SpillerName { trivial, standard };
28}
29
30static cl::opt<SpillerName>
31spillerOpt("spiller",
32 cl::desc("Spiller to use: (default: standard)"),
33 cl::Prefix,
34 cl::values(clEnumVal(trivial, "trivial spiller"),
35 clEnumVal(standard, "default spiller"),
36 clEnumValEnd),
37 cl::init(standard));
38
Lang Hamese2b201b2009-05-18 19:03:16 +000039Spiller::~Spiller() {}
40
41namespace {
42
Lang Hamesf41538d2009-06-02 16:53:25 +000043/// Utility class for spillers.
44class SpillerBase : public Spiller {
45protected:
46
47 MachineFunction *mf;
48 LiveIntervals *lis;
Lang Hamesf41538d2009-06-02 16:53:25 +000049 MachineFrameInfo *mfi;
50 MachineRegisterInfo *mri;
51 const TargetInstrInfo *tii;
52 VirtRegMap *vrm;
53
54 /// Construct a spiller base.
Lang Hames8783e402009-11-20 00:53:30 +000055 SpillerBase(MachineFunction *mf, LiveIntervals *lis, VirtRegMap *vrm)
56 : mf(mf), lis(lis), vrm(vrm)
Lang Hamese2b201b2009-05-18 19:03:16 +000057 {
58 mfi = mf->getFrameInfo();
59 mri = &mf->getRegInfo();
60 tii = mf->getTarget().getInstrInfo();
61 }
62
Lang Hamesf41538d2009-06-02 16:53:25 +000063 /// Add spill ranges for every use/def of the live interval, inserting loads
Lang Hames38283e22009-11-18 20:31:20 +000064 /// immediately before each use, and stores after each def. No folding or
65 /// remat is attempted.
Lang Hamesf41538d2009-06-02 16:53:25 +000066 std::vector<LiveInterval*> trivialSpillEverywhere(LiveInterval *li) {
Bill Wendlingc75e7d22009-08-22 20:54:03 +000067 DEBUG(errs() << "Spilling everywhere " << *li << "\n");
Lang Hamese2b201b2009-05-18 19:03:16 +000068
69 assert(li->weight != HUGE_VALF &&
70 "Attempting to spill already spilled value.");
71
72 assert(!li->isStackSlot() &&
73 "Trying to spill a stack slot.");
74
Bill Wendlingc75e7d22009-08-22 20:54:03 +000075 DEBUG(errs() << "Trivial spill everywhere of reg" << li->reg << "\n");
Lang Hames6bbc73d2009-06-24 20:46:24 +000076
Lang Hamese2b201b2009-05-18 19:03:16 +000077 std::vector<LiveInterval*> added;
78
79 const TargetRegisterClass *trc = mri->getRegClass(li->reg);
Lang Hamese2b201b2009-05-18 19:03:16 +000080 unsigned ss = vrm->assignVirt2StackSlot(li->reg);
81
Lang Hames38283e22009-11-18 20:31:20 +000082 // Iterate over reg uses/defs.
Lang Hamesf41538d2009-06-02 16:53:25 +000083 for (MachineRegisterInfo::reg_iterator
84 regItr = mri->reg_begin(li->reg); regItr != mri->reg_end();) {
Lang Hamese2b201b2009-05-18 19:03:16 +000085
Lang Hames38283e22009-11-18 20:31:20 +000086 // Grab the use/def instr.
Lang Hamese2b201b2009-05-18 19:03:16 +000087 MachineInstr *mi = &*regItr;
Lang Hames6bbc73d2009-06-24 20:46:24 +000088
Bill Wendlingc75e7d22009-08-22 20:54:03 +000089 DEBUG(errs() << " Processing " << *mi);
Lang Hames6bbc73d2009-06-24 20:46:24 +000090
Lang Hames38283e22009-11-18 20:31:20 +000091 // Step regItr to the next use/def instr.
Lang Hamesf41538d2009-06-02 16:53:25 +000092 do {
93 ++regItr;
94 } while (regItr != mri->reg_end() && (&*regItr == mi));
95
Lang Hames38283e22009-11-18 20:31:20 +000096 // Collect uses & defs for this instr.
Lang Hamese2b201b2009-05-18 19:03:16 +000097 SmallVector<unsigned, 2> indices;
98 bool hasUse = false;
99 bool hasDef = false;
Lang Hamese2b201b2009-05-18 19:03:16 +0000100 for (unsigned i = 0; i != mi->getNumOperands(); ++i) {
101 MachineOperand &op = mi->getOperand(i);
Lang Hamese2b201b2009-05-18 19:03:16 +0000102 if (!op.isReg() || op.getReg() != li->reg)
103 continue;
Lang Hamese2b201b2009-05-18 19:03:16 +0000104 hasUse |= mi->getOperand(i).isUse();
105 hasDef |= mi->getOperand(i).isDef();
Lang Hamese2b201b2009-05-18 19:03:16 +0000106 indices.push_back(i);
107 }
108
Lang Hames38283e22009-11-18 20:31:20 +0000109 // Create a new vreg & interval for this instr.
Lang Hamese2b201b2009-05-18 19:03:16 +0000110 unsigned newVReg = mri->createVirtualRegister(trc);
Lang Hamese2b201b2009-05-18 19:03:16 +0000111 vrm->grow();
112 vrm->assignVirt2StackSlot(newVReg, ss);
Lang Hamesf41538d2009-06-02 16:53:25 +0000113 LiveInterval *newLI = &lis->getOrCreateInterval(newVReg);
114 newLI->weight = HUGE_VALF;
115
Lang Hames38283e22009-11-18 20:31:20 +0000116 // Update the reg operands & kill flags.
Lang Hamese2b201b2009-05-18 19:03:16 +0000117 for (unsigned i = 0; i < indices.size(); ++i) {
Lang Hames38283e22009-11-18 20:31:20 +0000118 unsigned mopIdx = indices[i];
119 MachineOperand &mop = mi->getOperand(mopIdx);
120 mop.setReg(newVReg);
121 if (mop.isUse() && !mi->isRegTiedToDefOperand(mopIdx)) {
122 mop.setIsKill(true);
Lang Hamese2b201b2009-05-18 19:03:16 +0000123 }
124 }
Lang Hamesf41538d2009-06-02 16:53:25 +0000125 assert(hasUse || hasDef);
126
Lang Hames38283e22009-11-18 20:31:20 +0000127 // Insert reload if necessary.
128 MachineBasicBlock::iterator miItr(mi);
Lang Hamese2b201b2009-05-18 19:03:16 +0000129 if (hasUse) {
Lang Hames38283e22009-11-18 20:31:20 +0000130 tii->loadRegFromStackSlot(*mi->getParent(), miItr, newVReg, ss, trc);
131 MachineInstr *loadInstr(prior(miItr));
132 SlotIndex loadIndex =
133 lis->InsertMachineInstrInMaps(loadInstr).getDefIndex();
134 SlotIndex endIndex = loadIndex.getNextIndex();
135 VNInfo *loadVNI =
136 newLI->getNextValue(loadIndex, 0, true, lis->getVNInfoAllocator());
137 loadVNI->addKill(endIndex);
138 newLI->addRange(LiveRange(loadIndex, endIndex, loadVNI));
Lang Hamese2b201b2009-05-18 19:03:16 +0000139 }
140
Lang Hames38283e22009-11-18 20:31:20 +0000141 // Insert store if necessary.
Lang Hamese2b201b2009-05-18 19:03:16 +0000142 if (hasDef) {
Chris Lattner7896c9f2009-12-03 00:50:42 +0000143 tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr), newVReg, true,
Lang Hames38283e22009-11-18 20:31:20 +0000144 ss, trc);
Chris Lattner7896c9f2009-12-03 00:50:42 +0000145 MachineInstr *storeInstr(llvm::next(miItr));
Lang Hames38283e22009-11-18 20:31:20 +0000146 SlotIndex storeIndex =
147 lis->InsertMachineInstrInMaps(storeInstr).getDefIndex();
148 SlotIndex beginIndex = storeIndex.getPrevIndex();
149 VNInfo *storeVNI =
150 newLI->getNextValue(beginIndex, 0, true, lis->getVNInfoAllocator());
151 storeVNI->addKill(storeIndex);
152 newLI->addRange(LiveRange(beginIndex, storeIndex, storeVNI));
Lang Hamese2b201b2009-05-18 19:03:16 +0000153 }
154
Lang Hamesf41538d2009-06-02 16:53:25 +0000155 added.push_back(newLI);
Lang Hamese2b201b2009-05-18 19:03:16 +0000156 }
157
Lang Hamese2b201b2009-05-18 19:03:16 +0000158 return added;
159 }
160
Lang Hamesf41538d2009-06-02 16:53:25 +0000161};
Lang Hamese2b201b2009-05-18 19:03:16 +0000162
163
Lang Hamesf41538d2009-06-02 16:53:25 +0000164/// Spills any live range using the spill-everywhere method with no attempt at
165/// folding.
166class TrivialSpiller : public SpillerBase {
167public:
Lang Hames10382fb2009-06-19 02:17:53 +0000168
Lang Hames8783e402009-11-20 00:53:30 +0000169 TrivialSpiller(MachineFunction *mf, LiveIntervals *lis, VirtRegMap *vrm)
170 : SpillerBase(mf, lis, vrm) {}
Lang Hamese2b201b2009-05-18 19:03:16 +0000171
Lang Hames835ca072009-11-19 04:15:33 +0000172 std::vector<LiveInterval*> spill(LiveInterval *li,
173 SmallVectorImpl<LiveInterval*> &spillIs) {
174 // Ignore spillIs - we don't use it.
Lang Hamesf41538d2009-06-02 16:53:25 +0000175 return trivialSpillEverywhere(li);
Lang Hamese2b201b2009-05-18 19:03:16 +0000176 }
177
178};
179
Lang Hames835ca072009-11-19 04:15:33 +0000180/// Falls back on LiveIntervals::addIntervalsForSpills.
181class StandardSpiller : public Spiller {
182private:
183 LiveIntervals *lis;
184 const MachineLoopInfo *loopInfo;
185 VirtRegMap *vrm;
186public:
Lang Hames8783e402009-11-20 00:53:30 +0000187 StandardSpiller(MachineFunction *mf, LiveIntervals *lis,
Lang Hames835ca072009-11-19 04:15:33 +0000188 const MachineLoopInfo *loopInfo, VirtRegMap *vrm)
189 : lis(lis), loopInfo(loopInfo), vrm(vrm) {}
190
191 /// Falls back on LiveIntervals::addIntervalsForSpills.
192 std::vector<LiveInterval*> spill(LiveInterval *li,
193 SmallVectorImpl<LiveInterval*> &spillIs) {
194 return lis->addIntervalsForSpills(*li, spillIs, loopInfo, *vrm);
195 }
196
197};
198
Lang Hamese2b201b2009-05-18 19:03:16 +0000199}
200
Lang Hamese2b201b2009-05-18 19:03:16 +0000201llvm::Spiller* llvm::createSpiller(MachineFunction *mf, LiveIntervals *lis,
Lang Hames835ca072009-11-19 04:15:33 +0000202 const MachineLoopInfo *loopInfo,
203 VirtRegMap *vrm) {
204 switch (spillerOpt) {
Lang Hames8783e402009-11-20 00:53:30 +0000205 case trivial: return new TrivialSpiller(mf, lis, vrm); break;
206 case standard: return new StandardSpiller(mf, lis, loopInfo, vrm); break;
Lang Hames835ca072009-11-19 04:15:33 +0000207 default: llvm_unreachable("Unreachable!"); break;
208 }
Lang Hamese2b201b2009-05-18 19:03:16 +0000209}