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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
2//
3// This register allocator allocates registers to a basic block at a time,
4// attempting to keep values in registers and reusing registers as appropriate.
5//
6//===----------------------------------------------------------------------===//
7
Chris Lattner4cc662b2003-08-03 21:47:31 +00008#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +00009#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000010#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000011#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000012#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000013#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000014#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000015#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000016#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000017#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000018#include "Support/Debug.h"
19#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000020#include <iostream>
21
Chris Lattnerb74e83c2002-12-16 16:15:28 +000022namespace {
23 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
24 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner82bee0f2002-12-18 08:14:26 +000025 cl::opt<bool> DisableKill("no-kill", cl::Hidden,
26 cl::desc("Disable register kill in local-ra"));
Chris Lattnerb74e83c2002-12-16 16:15:28 +000027
Chris Lattner580f9be2002-12-28 20:40:43 +000028 class RA : public MachineFunctionPass {
29 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000030 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000031 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000032 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000033
Chris Lattnerb8822ad2003-08-04 23:36:39 +000034 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
35 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000036 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000037
38 // Virt2PhysRegMap - This map contains entries for each virtual register
39 // that is currently available in a physical register.
40 //
41 std::map<unsigned, unsigned> Virt2PhysRegMap;
42
43 // PhysRegsUsed - This map contains entries for each physical register that
44 // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
45 // to is the virtual register corresponding to the physical register (the
46 // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
47 // register is pinned because it is used by a future instruction.
48 //
49 std::map<unsigned, unsigned> PhysRegsUsed;
50
51 // PhysRegsUseOrder - This contains a list of the physical registers that
52 // currently have a virtual register value in them. This list provides an
53 // ordering of registers, imposing a reallocation order. This list is only
54 // used if all registers are allocated and we have to spill one, in which
55 // case we spill the least recently used register. Entries at the front of
56 // the list are the least recently used registers, entries at the back are
57 // the most recently used.
58 //
59 std::vector<unsigned> PhysRegsUseOrder;
60
Chris Lattner91a452b2003-01-13 00:25:40 +000061 // VirtRegModified - This bitset contains information about which virtual
62 // registers need to be spilled back to memory when their registers are
63 // scavenged. If a virtual register has simply been rematerialized, there
64 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000065 //
Chris Lattner91a452b2003-01-13 00:25:40 +000066 std::vector<bool> VirtRegModified;
67
68 void markVirtRegModified(unsigned Reg, bool Val = true) {
69 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
70 Reg -= MRegisterInfo::FirstVirtualRegister;
71 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
72 VirtRegModified[Reg] = Val;
73 }
74
75 bool isVirtRegModified(unsigned Reg) const {
76 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
77 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
78 && "Illegal virtual register!");
79 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
80 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000081
Chris Lattnerb74e83c2002-12-16 16:15:28 +000082 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +000083 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +000084 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
85
86 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
87 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
88 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
89 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
90 // Add it to the end of the list
91 PhysRegsUseOrder.push_back(RegMatch);
92 if (RegMatch == Reg)
93 return; // Found an exact match, exit early
94 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +000095 }
96
97 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +000098 virtual const char *getPassName() const {
99 return "Local Register Allocator";
100 }
101
Chris Lattner91a452b2003-01-13 00:25:40 +0000102 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
103 if (!DisableKill)
104 AU.addRequired<LiveVariables>();
105 AU.addRequiredID(PHIEliminationID);
106 MachineFunctionPass::getAnalysisUsage(AU);
107 }
108
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000109 private:
110 /// runOnMachineFunction - Register allocate the whole function
111 bool runOnMachineFunction(MachineFunction &Fn);
112
113 /// AllocateBasicBlock - Register allocate the specified basic block.
114 void AllocateBasicBlock(MachineBasicBlock &MBB);
115
Chris Lattner82bee0f2002-12-18 08:14:26 +0000116
Chris Lattner82bee0f2002-12-18 08:14:26 +0000117 /// areRegsEqual - This method returns true if the specified registers are
118 /// related to each other. To do this, it checks to see if they are equal
119 /// or if the first register is in the alias set of the second register.
120 ///
121 bool areRegsEqual(unsigned R1, unsigned R2) const {
122 if (R1 == R2) return true;
Chris Lattner580f9be2002-12-28 20:40:43 +0000123 if (const unsigned *AliasSet = RegInfo->getAliasSet(R2))
Chris Lattner82bee0f2002-12-18 08:14:26 +0000124 for (unsigned i = 0; AliasSet[i]; ++i)
125 if (AliasSet[i] == R1) return true;
126 return false;
127 }
128
Chris Lattner580f9be2002-12-28 20:40:43 +0000129 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000130 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000131 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000132
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000133 /// removePhysReg - This method marks the specified physical register as no
134 /// longer being in use.
135 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000136 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000137
138 /// spillVirtReg - This method spills the value specified by PhysReg into
139 /// the virtual register slot specified by VirtReg. It then updates the RA
140 /// data structures to indicate the fact that PhysReg is now available.
141 ///
142 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
143 unsigned VirtReg, unsigned PhysReg);
144
Chris Lattnerc21be922002-12-16 17:44:42 +0000145 /// spillPhysReg - This method spills the specified physical register into
146 /// the virtual register slot associated with it.
Chris Lattner91a452b2003-01-13 00:25:40 +0000147 ///
Chris Lattnerc21be922002-12-16 17:44:42 +0000148 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner91a452b2003-01-13 00:25:40 +0000149 unsigned PhysReg);
Chris Lattnerc21be922002-12-16 17:44:42 +0000150
Chris Lattner91a452b2003-01-13 00:25:40 +0000151 /// assignVirtToPhysReg - This method updates local state so that we know
152 /// that PhysReg is the proper container for VirtReg now. The physical
153 /// register must not be used for anything else when this is called.
154 ///
155 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
156
157 /// liberatePhysReg - Make sure the specified physical register is available
158 /// for use. If there is currently a value in it, it is either moved out of
159 /// the way or spilled to memory.
160 ///
161 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
162 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000163
Chris Lattnerae640432002-12-17 02:50:10 +0000164 /// isPhysRegAvailable - Return true if the specified physical register is
165 /// free and available for use. This also includes checking to see if
166 /// aliased registers are all free...
167 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000168 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000169
170 /// getFreeReg - Look to see if there is a free register available in the
171 /// specified register class. If not, return 0.
172 ///
173 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000174
Chris Lattner91a452b2003-01-13 00:25:40 +0000175 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000176 /// register. If all compatible physical registers are used, this method
177 /// spills the last used virtual register to the stack, and uses that
178 /// register.
179 ///
Chris Lattner91a452b2003-01-13 00:25:40 +0000180 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
181 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000182
183 /// reloadVirtReg - This method loads the specified virtual register into a
184 /// physical register, returning the physical register chosen. This updates
185 /// the regalloc data structures to reflect the fact that the virtual reg is
186 /// now alive in a physical register, and the previous one isn't.
187 ///
188 unsigned reloadVirtReg(MachineBasicBlock &MBB,
189 MachineBasicBlock::iterator &I, unsigned VirtReg);
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000190
191 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
192 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000193 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000194}
195
Chris Lattnerae640432002-12-17 02:50:10 +0000196
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000197/// getStackSpaceFor - This allocates space for the specified virtual register
198/// to be held on the stack.
199int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
200 // Find the location Reg would belong...
201 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000202
Chris Lattner580f9be2002-12-28 20:40:43 +0000203 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000204 return I->second; // Already has space allocated?
205
Chris Lattner580f9be2002-12-28 20:40:43 +0000206 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000207 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000208
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000209 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000210 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
211 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000212}
213
Chris Lattnerae640432002-12-17 02:50:10 +0000214
Chris Lattner82bee0f2002-12-18 08:14:26 +0000215/// removePhysReg - This method marks the specified physical register as no
216/// longer being in use.
217///
218void RA::removePhysReg(unsigned PhysReg) {
219 PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
220
221 std::vector<unsigned>::iterator It =
222 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
223 assert(It != PhysRegsUseOrder.end() &&
224 "Spilled a physical register, but it was not in use list!");
225 PhysRegsUseOrder.erase(It);
226}
227
Chris Lattner91a452b2003-01-13 00:25:40 +0000228
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000229/// spillVirtReg - This method spills the value specified by PhysReg into the
230/// virtual register slot specified by VirtReg. It then updates the RA data
231/// structures to indicate the fact that PhysReg is now available.
232///
233void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
234 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000235 if (!VirtReg && DisableKill) return;
236 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000237 " Must not have appropriate kill for the register or use exists beyond"
238 " the intended one.");
239 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
240 std::cerr << " containing %reg" << VirtReg;
241 if (!isVirtRegModified(VirtReg))
242 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000243
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000244 // Otherwise, there is a virtual register corresponding to this physical
245 // register. We only need to spill it into its stack slot if it has been
246 // modified.
247 if (isVirtRegModified(VirtReg)) {
248 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
249 int FrameIndex = getStackSpaceFor(VirtReg, RC);
250 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
251 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
252 ++NumSpilled; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000253 }
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000254 Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000255
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000256 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000257 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000258}
259
Chris Lattnerae640432002-12-17 02:50:10 +0000260
Chris Lattner91a452b2003-01-13 00:25:40 +0000261/// spillPhysReg - This method spills the specified physical register into the
262/// virtual register slot associated with it.
263///
264void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
265 unsigned PhysReg) {
266 std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
267 if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
268 spillVirtReg(MBB, I, PI->second, PhysReg);
269 } else if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg)) {
270 // If the selected register aliases any other registers, we must make
271 // sure that one of the aliases isn't alive...
272 for (unsigned i = 0; AliasSet[i]; ++i) {
273 PI = PhysRegsUsed.find(AliasSet[i]);
274 if (PI != PhysRegsUsed.end()) // Spill aliased register...
275 spillVirtReg(MBB, I, PI->second, AliasSet[i]);
276 }
277 }
278}
279
280
281/// assignVirtToPhysReg - This method updates local state so that we know
282/// that PhysReg is the proper container for VirtReg now. The physical
283/// register must not be used for anything else when this is called.
284///
285void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
286 assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
287 "Phys reg already assigned!");
288 // Update information to note the fact that this register was just used, and
289 // it holds VirtReg.
290 PhysRegsUsed[PhysReg] = VirtReg;
291 Virt2PhysRegMap[VirtReg] = PhysReg;
292 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
293}
294
295
Chris Lattnerae640432002-12-17 02:50:10 +0000296/// isPhysRegAvailable - Return true if the specified physical register is free
297/// and available for use. This also includes checking to see if aliased
298/// registers are all free...
299///
300bool RA::isPhysRegAvailable(unsigned PhysReg) const {
301 if (PhysRegsUsed.count(PhysReg)) return false;
302
303 // If the selected register aliases any other allocated registers, it is
304 // not free!
Chris Lattner580f9be2002-12-28 20:40:43 +0000305 if (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg))
Chris Lattnerae640432002-12-17 02:50:10 +0000306 for (unsigned i = 0; AliasSet[i]; ++i)
307 if (PhysRegsUsed.count(AliasSet[i])) // Aliased register in use?
308 return false; // Can't use this reg then.
309 return true;
310}
311
312
Chris Lattner91a452b2003-01-13 00:25:40 +0000313/// getFreeReg - Look to see if there is a free register available in the
314/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000315///
Chris Lattner91a452b2003-01-13 00:25:40 +0000316unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000317 // Get iterators defining the range of registers that are valid to allocate in
318 // this class, which also specifies the preferred allocation order.
319 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
320 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000321
Chris Lattner91a452b2003-01-13 00:25:40 +0000322 for (; RI != RE; ++RI)
323 if (isPhysRegAvailable(*RI)) { // Is reg unused?
324 assert(*RI != 0 && "Cannot use register!");
325 return *RI; // Found an unused register!
326 }
327 return 0;
328}
329
330
331/// liberatePhysReg - Make sure the specified physical register is available for
332/// use. If there is currently a value in it, it is either moved out of the way
333/// or spilled to memory.
334///
335void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
336 unsigned PhysReg) {
337 // FIXME: This code checks to see if a register is available, but it really
338 // wants to know if a reg is available BEFORE the instruction executes. If
339 // called after killed operands are freed, it runs the risk of reallocating a
340 // used operand...
341#if 0
342 if (isPhysRegAvailable(PhysReg)) return; // Already available...
343
344 // Check to see if the register is directly used, not indirectly used through
345 // aliases. If aliased registers are the ones actually used, we cannot be
346 // sure that we will be able to save the whole thing if we do a reg-reg copy.
347 std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg);
348 if (PRUI != PhysRegsUsed.end()) {
349 unsigned VirtReg = PRUI->second; // The virtual register held...
350
351 // Check to see if there is a compatible register available. If so, we can
352 // move the value into the new register...
353 //
354 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
355 if (unsigned NewReg = getFreeReg(RC)) {
356 // Emit the code to copy the value...
357 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
358
359 // Update our internal state to indicate that PhysReg is available and Reg
360 // isn't.
361 Virt2PhysRegMap.erase(VirtReg);
362 removePhysReg(PhysReg); // Free the physreg
363
364 // Move reference over to new register...
365 assignVirtToPhysReg(VirtReg, NewReg);
366 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000367 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000368 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000369#endif
370 spillPhysReg(MBB, I, PhysReg);
371}
372
373
374/// getReg - Find a physical register to hold the specified virtual
375/// register. If all compatible physical registers are used, this method spills
376/// the last used virtual register to the stack, and uses that register.
377///
378unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
379 unsigned VirtReg) {
380 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
381
382 // First check to see if we have a free register of the requested type...
383 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000384
Chris Lattnerae640432002-12-17 02:50:10 +0000385 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000386 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000387 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000388
389 // Loop over all of the preallocated registers from the least recently used
390 // to the most recently used. When we find one that is capable of holding
391 // our register, use it.
392 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000393 assert(i != PhysRegsUseOrder.size() &&
394 "Couldn't find a register of the appropriate class!");
Chris Lattnerae640432002-12-17 02:50:10 +0000395
396 unsigned R = PhysRegsUseOrder[i];
397 // If the current register is compatible, use it.
Chris Lattner580f9be2002-12-28 20:40:43 +0000398 if (RegInfo->getRegClass(R) == RC) {
399 PhysReg = R;
400 break;
401 } else {
402 // If one of the registers aliased to the current register is
403 // compatible, use it.
404 if (const unsigned *AliasSet = RegInfo->getAliasSet(R))
405 for (unsigned a = 0; AliasSet[a]; ++a)
406 if (RegInfo->getRegClass(AliasSet[a]) == RC) {
407 PhysReg = AliasSet[a]; // Take an aliased register
408 break;
409 }
Chris Lattnerae640432002-12-17 02:50:10 +0000410 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000411 }
412
Chris Lattnerae640432002-12-17 02:50:10 +0000413 assert(PhysReg && "Physical register not assigned!?!?");
414
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000415 // At this point PhysRegsUseOrder[i] is the least recently used register of
416 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000417 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000418 }
419
420 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000421 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000422 return PhysReg;
423}
424
Chris Lattnerae640432002-12-17 02:50:10 +0000425
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000426/// reloadVirtReg - This method loads the specified virtual register into a
427/// physical register, returning the physical register chosen. This updates the
428/// regalloc data structures to reflect the fact that the virtual reg is now
429/// alive in a physical register, and the previous one isn't.
430///
431unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
432 MachineBasicBlock::iterator &I,
433 unsigned VirtReg) {
434 std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
435 if (It != Virt2PhysRegMap.end()) {
436 MarkPhysRegRecentlyUsed(It->second);
437 return It->second; // Already have this value available!
438 }
439
Chris Lattner91a452b2003-01-13 00:25:40 +0000440 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000441
Chris Lattnerff863ba2002-12-25 05:05:46 +0000442 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner580f9be2002-12-28 20:40:43 +0000443 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000444
Chris Lattner91a452b2003-01-13 00:25:40 +0000445 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
446
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000447 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
448 << RegInfo->getName(PhysReg) << "\n");
449
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000450 // Add move instruction(s)
Chris Lattner580f9be2002-12-28 20:40:43 +0000451 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000452 ++NumReloaded; // Update statistics
453 return PhysReg;
454}
455
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000456
457
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000458void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
459 // loop over each instruction
460 MachineBasicBlock::iterator I = MBB.begin();
461 for (; I != MBB.end(); ++I) {
462 MachineInstr *MI = *I;
Chris Lattner3501fea2003-01-14 22:00:31 +0000463 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000464 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
465 std::cerr << " Regs have values: ";
466 for (std::map<unsigned, unsigned>::const_iterator
467 I = PhysRegsUsed.begin(), E = PhysRegsUsed.end(); I != E; ++I)
468 std::cerr << "[" << RegInfo->getName(I->first)
469 << ",%reg" << I->second << "] ";
470 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000471
Chris Lattnerae640432002-12-17 02:50:10 +0000472 // Loop over the implicit uses, making sure that they are at the head of the
473 // use order list, so they don't get reallocated.
Chris Lattner3501fea2003-01-14 22:00:31 +0000474 if (const unsigned *ImplicitUses = TID.ImplicitUses)
Chris Lattnerae640432002-12-17 02:50:10 +0000475 for (unsigned i = 0; ImplicitUses[i]; ++i)
476 MarkPhysRegRecentlyUsed(ImplicitUses[i]);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000477
Chris Lattner91a452b2003-01-13 00:25:40 +0000478 // Get the used operands into registers. This has the potiential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000479 // incoming values if we are out of registers. Note that we completely
480 // ignore physical register uses here. We assume that if an explicit
481 // physical register is referenced by the instruction, that it is guaranteed
482 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000483 //
484 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000485 if (MI->getOperand(i).opIsUse() && MI->getOperand(i).isVirtualRegister()){
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000486 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
487 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
488 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
489 }
490
Chris Lattner91a452b2003-01-13 00:25:40 +0000491 if (!DisableKill) {
492 // If this instruction is the last user of anything in registers, kill the
493 // value, freeing the register being used, so it doesn't need to be
494 // spilled to memory.
495 //
496 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000497 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000498 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000499 unsigned PhysReg = VirtReg;
500 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
501 std::map<unsigned, unsigned>::iterator I =
502 Virt2PhysRegMap.find(VirtReg);
503 assert(I != Virt2PhysRegMap.end());
504 PhysReg = I->second;
505 Virt2PhysRegMap.erase(I);
506 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000507
Chris Lattnerd5725632003-05-12 03:54:14 +0000508 if (PhysReg) {
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000509 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
510 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000511 removePhysReg(PhysReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000512 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000513 }
514 }
515
516 // Loop over all of the operands of the instruction, spilling registers that
517 // are defined, and marking explicit destinations in the PhysRegsUsed map.
518 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattnerd3fd79f2003-08-03 13:49:03 +0000519 if ((MI->getOperand(i).opIsDefOnly() ||
520 MI->getOperand(i).opIsDefAndUse()) &&
Chris Lattner91a452b2003-01-13 00:25:40 +0000521 MI->getOperand(i).isPhysicalRegister()) {
522 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
523 spillPhysReg(MBB, I, Reg); // Spill any existing value in the reg
524 PhysRegsUsed[Reg] = 0; // It is free and reserved now
525 PhysRegsUseOrder.push_back(Reg);
526 }
527
528 // Loop over the implicit defs, spilling them as well.
Chris Lattner3501fea2003-01-14 22:00:31 +0000529 if (const unsigned *ImplicitDefs = TID.ImplicitDefs)
Chris Lattner91a452b2003-01-13 00:25:40 +0000530 for (unsigned i = 0; ImplicitDefs[i]; ++i) {
531 unsigned Reg = ImplicitDefs[i];
Chris Lattnerd5725632003-05-12 03:54:14 +0000532 spillPhysReg(MBB, I, Reg);
533 PhysRegsUseOrder.push_back(Reg);
534 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Chris Lattner91a452b2003-01-13 00:25:40 +0000535 }
536
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000537 // Okay, we have allocated all of the source operands and spilled any values
538 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000539 // implicit defs and assign them to a register, spilling incoming values if
540 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000541 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000542 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Vikram S. Adve5f2180c2003-05-27 00:05:23 +0000543 if ((MI->getOperand(i).opIsDefOnly() || MI->getOperand(i).opIsDefAndUse())
544 && MI->getOperand(i).isVirtualRegister()) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000545 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
546 unsigned DestPhysReg;
547
Chris Lattnerd5725632003-05-12 03:54:14 +0000548 // If DestVirtReg already has a value, forget about it. Why doesn't
549 // getReg do this right?
550 std::map<unsigned, unsigned>::iterator DestI =
551 Virt2PhysRegMap.find(DestVirtReg);
552 if (DestI != Virt2PhysRegMap.end()) {
553 unsigned PhysReg = DestI->second;
554 Virt2PhysRegMap.erase(DestI);
555 removePhysReg(PhysReg);
556 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000557
Chris Lattner580f9be2002-12-28 20:40:43 +0000558 if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000559 // must be same register number as the first operand
560 // This maps a = b + c into b += c, and saves b into a's spot
561 assert(MI->getOperand(1).isRegister() &&
562 MI->getOperand(1).getAllocatedRegNum() &&
563 MI->getOperand(1).opIsUse() &&
564 "Two address instruction invalid!");
565 DestPhysReg = MI->getOperand(1).getAllocatedRegNum();
566
Chris Lattnerd5725632003-05-12 03:54:14 +0000567 liberatePhysReg(MBB, I, DestPhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000568 assignVirtToPhysReg(DestVirtReg, DestPhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000569 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000570 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000571 }
Chris Lattnerd5725632003-05-12 03:54:14 +0000572 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000573 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
574 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000575
576 if (!DisableKill) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000577 // If this instruction defines any registers that are immediately dead,
578 // kill them now.
579 //
580 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000581 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000582 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000583 unsigned PhysReg = VirtReg;
584 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
585 std::map<unsigned, unsigned>::iterator I =
586 Virt2PhysRegMap.find(VirtReg);
587 assert(I != Virt2PhysRegMap.end());
588 PhysReg = I->second;
589 Virt2PhysRegMap.erase(I);
590 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000591
Chris Lattnerd5725632003-05-12 03:54:14 +0000592 if (PhysReg) {
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000593 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
594 << " [%reg" << VirtReg
595 << "] is never used, removing it frame live list\n");
Chris Lattnerd5725632003-05-12 03:54:14 +0000596 removePhysReg(PhysReg);
597 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000598 }
599 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000600 }
601
602 // Rewind the iterator to point to the first flow control instruction...
Chris Lattner3501fea2003-01-14 22:00:31 +0000603 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner0416d2a2003-01-16 18:06:43 +0000604 I = MBB.end();
Chris Lattner3501fea2003-01-14 22:00:31 +0000605 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000606 --I;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000607
608 // Spill all physical registers holding virtual registers now.
609 while (!PhysRegsUsed.empty())
Chris Lattner8c819452003-08-05 04:13:58 +0000610 if (unsigned VirtReg = PhysRegsUsed.begin()->second)
611 spillVirtReg(MBB, I, VirtReg, PhysRegsUsed.begin()->first);
612 else
613 removePhysReg(PhysRegsUsed.begin()->first);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000614
Chris Lattner91a452b2003-01-13 00:25:40 +0000615 for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
Chris Lattnerd5725632003-05-12 03:54:14 +0000616 E = Virt2PhysRegMap.end(); I != E; ++I)
Chris Lattner91a452b2003-01-13 00:25:40 +0000617 std::cerr << "Register still mapped: " << I->first << " -> "
Chris Lattnerd5725632003-05-12 03:54:14 +0000618 << I->second << "\n";
Chris Lattner91a452b2003-01-13 00:25:40 +0000619
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000620 assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
621 assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
622}
623
Chris Lattner86c69a62002-12-17 03:16:10 +0000624
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000625/// runOnMachineFunction - Register allocate the whole function
626///
627bool RA::runOnMachineFunction(MachineFunction &Fn) {
628 DEBUG(std::cerr << "Machine Function " << "\n");
629 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000630 TM = &Fn.getTarget();
631 RegInfo = TM->getRegisterInfo();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000632
Chris Lattner82bee0f2002-12-18 08:14:26 +0000633 if (!DisableKill)
Chris Lattner91a452b2003-01-13 00:25:40 +0000634 LV = &getAnalysis<LiveVariables>();
Chris Lattner82bee0f2002-12-18 08:14:26 +0000635
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000636 // Loop over all of the basic blocks, eliminating virtual register references
637 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
638 MBB != MBBe; ++MBB)
639 AllocateBasicBlock(*MBB);
640
Chris Lattner580f9be2002-12-28 20:40:43 +0000641 StackSlotForVirtReg.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000642 VirtRegModified.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000643 return true;
644}
645
Brian Gaeke19df3872003-08-13 18:18:15 +0000646FunctionPass *createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000647 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000648}