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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 1e635c34009228d3f48fec6ee88fea0f10711e7a / . / docs / CommandGuide / llc.pod
blob: 19d5efa979375fc6964c0592662648cbbb53c120 [file] [log] [blame]
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]1=pod
2
3=head1 NAME
4
5llc - LLVM static compiler
6
7=head1 SYNOPSIS
8
Misha Brukmanc08937a2004-07-02 16:06:19 +0000[diff] [blame]9B<llc> [I<options>] [I<filename>]
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]10
11=head1 DESCRIPTION
12
13The B<llc> command compiles LLVM bytecode into assembly language for a
14specified architecture. The assembly language output can then be passed through
15a native assembler and linker to generate native code.
16
17The choice of architecture for the output assembly code is determined as
18follows, by attempting to satisfy each of the following rules in turn (first
19one wins):
20
21=over
22
23=item *
24
25If the user has specified an architecture with the -m option, use that
26architecture.
27
28=item *
29
30Examine the input LLVM bytecode file: if it is little endian and has a
31pointer size of 32 bits, select the Intel IA-32 architecture. If it is big
32endian and has a pointer size of 64 bits, select the SparcV9 architecture.
33
34=item *
35
36If B<llc> was compiled on an architecture for which it can generate code, select
37the architecture upon which B<llc> was compiled.
38
39=item *
40
41Exit with an error message telling the user to specify the output
42architecture explicitly.
43
44=back
45
46=head1 OPTIONS
47
48If I<filename> is - or omitted, B<llc> reads LLVM bytecode from standard input.
49Otherwise, it will read LLVM bytecode from I<filename>.
50
51If the B<-o> option is omitted, then B<llc> will send its output to standard
52output if the input is from standard input. If the B<-o> option specifies -,
53then the output will also be sent to standard output.
54
55If no B<-o> option is specified and an input file other than - is specified,
56then B<llc> creates the output filename by taking the input filename,
57removing any existing F<.bc> extension, and adding a F<.s> suffix.
58
59Other B<llc> options are as follows:
60
61=over
62
63=item B<-f>
64
65Overwrite output files. By default, B<llc> will refuse to overwrite
66an output file which already exists.
67
68=item B<-march>=I<arch>
69
70Specify the architecture for which to generate assembly. Valid
71architectures are:
72
73=over
74
75=item I<x86>
76
77Intel IA-32 (Pentium and above)
78
79=item I<sparcv9>
80
8164-bit SPARC V9
82
83=item I<c>
84
85Emit C code, not assembly
86
87=back
88
89=item B<-enable-correct-eh-support>
90
91Instruct the B<-lowerinvoke> pass to insert code for correct exception handling
92support. This is expensive and is by default omitted for efficiency.
93
94=item B<-help>
95
96Print a summary of command line options.
97
98=item B<-stats>
99
100Print statistics recorded by code-generation passes.
101
102=item B<-time-passes>
103
104Record the amount of time needed for each pass and print a report to standard
105error.
106
107=back
108
109=head2 Intel IA-32-specific Options
110
111=over
112
113=item B<--disable-fp-elim>
114
115Disable frame pointer elimination optimization.
116
117=item B<--disable-pattern-isel>
118
119Use the 'simple' X86 instruction selector (the default).
120
121=item B<--print-machineinstrs>
122
123Print generated machine code.
124
125=item B<--regalloc>=I<allocator>
126
127Specify the register allocator to use. The default I<allocator> is I<local>.
128Valid register allocators are:
129
130=over
131
132=item I<simple>
133
134Very simple "always spill" register allocator
135
136=item I<local>
137
138Local register allocator
139
140=item I<linearscan>
141
Alkis Evlogimenosc8dec2c2004-07-21 08:18:50 +0000[diff] [blame]142Linear scan global register allocator
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]143
Misha Brukman1e635c32004-07-21 12:53:14 +0000[diff] [blame^]144=item I<iterativescan>
Alkis Evlogimenos910d0d62004-07-21 08:24:35 +0000[diff] [blame]145
146Iterative scan global register allocator
147
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]148=back
149
150=item B<--spiller>=I<spiller>
151
152Specify the spiller to use for register allocators that support it. Currently
153this option is used only by the linear scan register allocator. The default
154I<spiller> is I<local>. Valid spillers are:
155
156=over
157
158=item I<simple>
159
160Simple spiller
161
162=item I<local>
163
164Local spiller
165
166=back
167
168=back
169
170=head2 SPARCV9-specific Options
171
172=over
173
174=item B<--disable-peephole>
175
176Disable peephole optimization pass.
177
178=item B<--disable-sched>
179
180Disable local scheduling pass.
181
182=item B<--disable-strip>
183
184The Sparc backend embeds the LLVM bytecode into the assembly output. This
185option requests that symbol names be retained; by default, they are stripped out.
186
187=item B<--enable-maps>
188
189Emit LLVM-to-machine code mapping information into the assembly output.
190
191=back
192
193=head1 EXIT STATUS
194
195If B<llc> succeeds, it will exit with 0. Otherwise, if an error occurs,
196it will exit with a non-zero value.
197
198=head1 SEE ALSO
199
Misha Brukmanc08937a2004-07-02 16:06:19 +0000[diff] [blame]200L<lli|lli>
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]201
202=head1 AUTHORS
203
204Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>).
205
206=cut