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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the JIT interfaces for the ARM target.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "jit"
15#include "ARMJITInfo.h"
Evan Cheng5a033a62008-11-04 00:50:32 +000016#include "ARMConstantPoolValue.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000017#include "ARMRelocations.h"
18#include "ARMSubtarget.h"
Nicolas Geoffray2b483b52008-04-16 20:46:05 +000019#include "llvm/Function.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000020#include "llvm/CodeGen/MachineCodeEmitter.h"
21#include "llvm/Config/alloca.h"
Jim Grosbachc599a352008-10-20 21:39:23 +000022#include "llvm/Support/Streams.h"
23#include "llvm/System/Memory.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000024#include <cstdlib>
25using namespace llvm;
26
27void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
Raul Herbster72551da2007-08-30 23:21:27 +000028 abort();
Dan Gohmanf17a25c2007-07-18 16:29:46 +000029}
30
31/// JITCompilerFunction - This contains the address of the JIT function used to
32/// compile a function lazily.
33static TargetJITInfo::JITCompilerFn JITCompilerFunction;
34
Evan Cheng5d582a62008-09-02 07:49:03 +000035// Get the ASMPREFIX for the current host. This is often '_'.
36#ifndef __USER_LABEL_PREFIX__
37#define __USER_LABEL_PREFIX__
38#endif
39#define GETASMPREFIX2(X) #X
40#define GETASMPREFIX(X) GETASMPREFIX2(X)
41#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
42
Dan Gohmanf17a25c2007-07-18 16:29:46 +000043// CompilationCallback stub - We can't use a C function with inline assembly in
Jim Grosbachc599a352008-10-20 21:39:23 +000044// it, because we the prolog/epilog inserted by GCC won't work for us (we need
45// to preserve more context and manipulate the stack directly). Instead,
46// write our own wrapper, which does things our way, so we have complete
47// control over register saving and restoring.
Dan Gohmanf17a25c2007-07-18 16:29:46 +000048extern "C" {
49#if defined(__arm__)
50 void ARMCompilationCallback(void);
51 asm(
52 ".text\n"
53 ".align 2\n"
Evan Cheng5d582a62008-09-02 07:49:03 +000054 ".globl " ASMPREFIX "ARMCompilationCallback\n"
55 ASMPREFIX "ARMCompilationCallback:\n"
Jim Grosbachc599a352008-10-20 21:39:23 +000056 // Save caller saved registers since they may contain stuff
57 // for the real target function right now. We have to act as if this
58 // whole compilation callback doesn't exist as far as the caller is
59 // concerned, so we can't just preserve the callee saved regs.
Jim Grosbach8eab1c82008-10-21 16:54:12 +000060 "stmdb sp!, {r0, r1, r2, r3, lr}\n"
Jim Grosbachc599a352008-10-20 21:39:23 +000061 // The LR contains the address of the stub function on entry.
62 // pass it as the argument to the C part of the callback
63 "mov r0, lr\n"
64 "sub sp, sp, #4\n"
65 // Call the C portion of the callback
66 "bl " ASMPREFIX "ARMCompilationCallbackC\n"
67 "add sp, sp, #4\n"
68 // Restoring the LR to the return address of the function that invoked
69 // the stub and de-allocating the stack space for it requires us to
70 // swap the two saved LR values on the stack, as they're backwards
71 // for what we need since the pop instruction has a pre-determined
72 // order for the registers.
73 // +--------+
74 // 0 | LR | Original return address
75 // +--------+
76 // 1 | LR | Stub address (start of stub)
77 // 2-5 | R3..R0 | Saved registers (we need to preserve all regs)
78 // +--------+
79 //
80 // We need to exchange the values in slots 0 and 1 so we can
81 // return to the address in slot 1 with the address in slot 0
82 // restored to the LR.
83 "ldr r0, [sp,#20]\n"
84 "ldr r1, [sp,#16]\n"
85 "str r1, [sp,#20]\n"
86 "str r0, [sp,#16]\n"
87 // Return to the (newly modified) stub to invoke the real function.
88 // The above twiddling of the saved return addresses allows us to
89 // deallocate everything, including the LR the stub saved, all in one
90 // pop instruction.
Jim Grosbach8eab1c82008-10-21 16:54:12 +000091 "ldmia sp!, {r0, r1, r2, r3, lr, pc}\n"
Evan Cheng5d582a62008-09-02 07:49:03 +000092 );
93#else // Not an ARM host
Dan Gohmanf17a25c2007-07-18 16:29:46 +000094 void ARMCompilationCallback() {
95 assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
96 abort();
97 }
98#endif
99}
100
Jim Grosbachc599a352008-10-20 21:39:23 +0000101/// ARMCompilationCallbackC - This is the target-specific function invoked
102/// by the function stub when we did not know the real target of a call.
103/// This function must locate the start of the stub or call site and pass
104/// it into the JIT compiler function.
105extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) {
106 // Get the address of the compiled code for this function.
107 intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)StubAddr);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000108
109 // Rewrite the call target... so that we don't end up here every time we
Jim Grosbachc599a352008-10-20 21:39:23 +0000110 // execute the call. We're replacing the first two instructions of the
111 // stub with:
112 // ldr pc, [pc,#-4]
113 // <addr>
Evan Chengdfee8852008-11-04 06:10:06 +0000114 bool ok = sys::Memory::setRangeWritable((void*)StubAddr, 8);
Jim Grosbachc599a352008-10-20 21:39:23 +0000115 if (!ok)
116 {
117 cerr << "ERROR: Unable to mark stub writable\n";
118 abort();
119 }
Jim Grosbachc599a352008-10-20 21:39:23 +0000120 *(intptr_t *)StubAddr = 0xe51ff004;
121 *(intptr_t *)(StubAddr+4) = NewVal;
Evan Chengdfee8852008-11-04 06:10:06 +0000122 ok = sys::Memory::setRangeExecutable((void*)StubAddr, 8);
Jim Grosbachc599a352008-10-20 21:39:23 +0000123 if (!ok)
124 {
125 cerr << "ERROR: Unable to mark stub executable\n";
126 abort();
127 }
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000128}
129
130TargetJITInfo::LazyResolverFn
131ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
132 JITCompilerFunction = F;
133 return ARMCompilationCallback;
134}
135
Nicolas Geoffray2b483b52008-04-16 20:46:05 +0000136void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
137 MachineCodeEmitter &MCE) {
Raul Herbster72551da2007-08-30 23:21:27 +0000138 unsigned addr = (intptr_t)Fn;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000139 // If this is just a call to an external function, emit a branch instead of a
140 // call. The code is the same except for one bit of the last instruction.
141 if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
Raul Herbster72551da2007-08-30 23:21:27 +0000142 // branch to the corresponding function addr
143 // the stub is 8-byte size and 4-aligned
Nicolas Geoffray2b483b52008-04-16 20:46:05 +0000144 MCE.startFunctionStub(F, 8, 4);
Jim Grosbachc599a352008-10-20 21:39:23 +0000145 MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4]
Raul Herbster72551da2007-08-30 23:21:27 +0000146 MCE.emitWordLE(addr); // addr of function
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000147 } else {
Jim Grosbachc599a352008-10-20 21:39:23 +0000148 // The compilation callback will overwrite the first two words of this
149 // stub with indirect branch instructions targeting the compiled code.
150 // This stub sets the return address to restart the stub, so that
151 // the new branch will be invoked when we come back.
152 //
153 // branch and link to the compilation callback.
154 // the stub is 16-byte size and 4-byte aligned.
155 MCE.startFunctionStub(F, 16, 4);
156 // Save LR so the callback can determine which stub called it.
157 // The compilation callback is responsible for popping this prior
158 // to returning.
159 MCE.emitWordLE(0xe92d4000); // PUSH {lr}
160 // Set the return address to go back to the start of this stub
161 MCE.emitWordLE(0xe24fe00c); // SUB LR, PC, #12
162 // Invoke the compilation callback
163 MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4]
164 // The address of the compilation callback
165 MCE.emitWordLE((intptr_t)ARMCompilationCallback);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000166 }
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000167
Nicolas Geoffray2b483b52008-04-16 20:46:05 +0000168 return MCE.finishFunctionStub(F);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000169}
170
Evan Cheng0f63ae12008-11-07 09:06:08 +0000171intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
Evan Cheng5a033a62008-11-04 00:50:32 +0000172 ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType();
Evan Cheng0f63ae12008-11-07 09:06:08 +0000173 if (RT == ARM::reloc_arm_jt_base)
174 return getJumpTableBaseAddr(MR->getJumpTableIndex());
175 else if (RT == ARM::reloc_arm_cp_entry)
Evan Cheng5a033a62008-11-04 00:50:32 +0000176 return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
177 else if (RT == ARM::reloc_arm_machine_cp_entry) {
178 const MachineConstantPoolEntry &MCPE = (*MCPEs)[MR->getConstantVal()];
179 assert(MCPE.isMachineConstantPoolEntry() &&
180 "Expecting a machine constant pool entry!");
181 ARMConstantPoolValue *ACPV =
182 static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
183 assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) &&
184 "Can't handle this machine constant pool entry yet!");
185 intptr_t Addr = (intptr_t)(MR->getResultPointer());
186 Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment();
187 return Addr;
188 }
189 return (intptr_t)(MR->getResultPointer());
190}
191
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000192/// relocate - Before the JIT can run a block of code that has been emitted,
193/// it must rewrite the code to contain the actual addresses of any
194/// referenced global symbols.
195void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
196 unsigned NumRelocs, unsigned char* GOTBase) {
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000197 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
198 void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
Evan Chengf07a9b62008-10-29 23:55:43 +0000199 // If this is a constpool relocation, get the address of the
200 // constpool_entry instruction.
Evan Cheng0f63ae12008-11-07 09:06:08 +0000201 intptr_t ResultPtr = resolveRelocDestAddr(MR);
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000202 switch ((ARM::RelocationType)MR->getRelocationType()) {
Evan Chengf07a9b62008-10-29 23:55:43 +0000203 case ARM::reloc_arm_cp_entry:
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000204 case ARM::reloc_arm_relative: {
Raul Herbster72551da2007-08-30 23:21:27 +0000205 // It is necessary to calculate the correct PC relative value. We
206 // subtract the base addr from the target addr to form a byte offset.
207 ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
208 // If the result is positive, set bit U(23) to 1.
209 if (ResultPtr >= 0)
210 *((unsigned*)RelocPos) |= 1 << 23;
211 else {
Evan Cheng5a033a62008-11-04 00:50:32 +0000212 // Otherwise, obtain the absolute value and set
Raul Herbster72551da2007-08-30 23:21:27 +0000213 // bit U(23) to 0.
214 ResultPtr *= -1;
215 *((unsigned*)RelocPos) &= 0xFF7FFFFF;
216 }
Evan Cheng5a033a62008-11-04 00:50:32 +0000217 // Set the immed value calculated.
Raul Herbster72551da2007-08-30 23:21:27 +0000218 *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
Evan Cheng5a033a62008-11-04 00:50:32 +0000219 // Set register Rn to PC.
Raul Herbster72551da2007-08-30 23:21:27 +0000220 *((unsigned*)RelocPos) |= 0xF << 16;
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000221 break;
222 }
Evan Cheng5a033a62008-11-04 00:50:32 +0000223 case ARM::reloc_arm_machine_cp_entry:
Evan Chengf07a9b62008-10-29 23:55:43 +0000224 case ARM::reloc_arm_absolute: {
Evan Cheng5a033a62008-11-04 00:50:32 +0000225 // These addresses have already been resolved.
Evan Cheng0f63ae12008-11-07 09:06:08 +0000226 *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
Evan Chengf07a9b62008-10-29 23:55:43 +0000227 break;
228 }
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000229 case ARM::reloc_arm_branch: {
Raul Herbster72551da2007-08-30 23:21:27 +0000230 // It is necessary to calculate the correct value of signed_immed_24
231 // field. We subtract the base addr from the target addr to form a
232 // byte offset, which must be inside the range -33554432 and +33554428.
233 // Then, we set the signed_immed_24 field of the instruction to bits
234 // [25:2] of the byte offset. More details ARM-ARM p. A4-11.
Evan Cheng0f63ae12008-11-07 09:06:08 +0000235 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
Raul Herbster72551da2007-08-30 23:21:27 +0000236 ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
237 assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000238 *((unsigned*)RelocPos) |= ResultPtr;
239 break;
240 }
Evan Cheng0f63ae12008-11-07 09:06:08 +0000241 case ARM::reloc_arm_jt_base: {
242 // JT base - (instruction addr + 8)
243 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
244 *((unsigned*)RelocPos) |= ResultPtr;
245 break;
246 }
247 case ARM::reloc_arm_pic_jt: {
248 // PIC JT entry is destination - JT base.
249 ResultPtr = ResultPtr - (intptr_t)RelocPos;
250 *((unsigned*)RelocPos) |= ResultPtr;
251 break;
252 }
Evan Chenga7b3e7c2007-08-07 01:37:15 +0000253 }
254 }
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000255}