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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000025#include "Support/Debug.h"
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000026#include "Support/DenseMap.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000027#include "Support/Statistic.h"
Chris Lattneref09c632004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000029
Chris Lattnerb74e83c2002-12-16 16:15:28 +000030namespace {
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +000031 Statistic<> NumStores("ra-local", "Number of stores added");
32 Statistic<> NumLoads ("ra-local", "Number of loads added");
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +000033 Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
34 "instructions");
Chris Lattner580f9be2002-12-28 20:40:43 +000035 class RA : public MachineFunctionPass {
36 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000037 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000038 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000039 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000040
Chris Lattnerb8822ad2003-08-04 23:36:39 +000041 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
42 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000043 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000044
45 // Virt2PhysRegMap - This map contains entries for each virtual register
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000046 // that is currently available in a physical register.
47 DenseMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
Chris Lattnerecea5632004-02-09 02:12:04 +000048
49 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000050 return Virt2PhysRegMap[VirtReg];
Chris Lattnerecea5632004-02-09 02:12:04 +000051 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000052
Chris Lattner64667b62004-02-09 01:26:13 +000053 // PhysRegsUsed - This array is effectively a map, containing entries for
54 // each physical register that currently has a value (ie, it is in
55 // Virt2PhysRegMap). The value mapped to is the virtual register
56 // corresponding to the physical register (the inverse of the
57 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
58 // because it is used by a future instruction. If the entry for a physical
59 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000060 //
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000061 std::vector<int> PhysRegsUsed;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000062
63 // PhysRegsUseOrder - This contains a list of the physical registers that
64 // currently have a virtual register value in them. This list provides an
65 // ordering of registers, imposing a reallocation order. This list is only
66 // used if all registers are allocated and we have to spill one, in which
67 // case we spill the least recently used register. Entries at the front of
68 // the list are the least recently used registers, entries at the back are
69 // the most recently used.
70 //
71 std::vector<unsigned> PhysRegsUseOrder;
72
Chris Lattner91a452b2003-01-13 00:25:40 +000073 // VirtRegModified - This bitset contains information about which virtual
74 // registers need to be spilled back to memory when their registers are
75 // scavenged. If a virtual register has simply been rematerialized, there
76 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000077 //
Chris Lattner91a452b2003-01-13 00:25:40 +000078 std::vector<bool> VirtRegModified;
79
80 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000081 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000082 Reg -= MRegisterInfo::FirstVirtualRegister;
83 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
84 VirtRegModified[Reg] = Val;
85 }
86
87 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +000088 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000089 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000090 && "Illegal virtual register!");
Chris Lattner91a452b2003-01-13 00:25:40 +000091 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
92 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000093
Chris Lattnerb74e83c2002-12-16 16:15:28 +000094 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattneraebcce82004-06-16 06:57:29 +000095 if(PhysRegsUseOrder.empty() ||
96 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
Chris Lattner0eb172c2002-12-24 00:04:55 +000097
98 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000099 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
100 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
101 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
102 // Add it to the end of the list
103 PhysRegsUseOrder.push_back(RegMatch);
104 if (RegMatch == Reg)
105 return; // Found an exact match, exit early
106 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000107 }
108
109 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000110 virtual const char *getPassName() const {
111 return "Local Register Allocator";
112 }
113
Chris Lattner91a452b2003-01-13 00:25:40 +0000114 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
Chris Lattner56ddada2004-02-17 17:49:10 +0000115 AU.addRequired<LiveVariables>();
Chris Lattner91a452b2003-01-13 00:25:40 +0000116 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000117 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000118 MachineFunctionPass::getAnalysisUsage(AU);
119 }
120
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000121 private:
122 /// runOnMachineFunction - Register allocate the whole function
123 bool runOnMachineFunction(MachineFunction &Fn);
124
125 /// AllocateBasicBlock - Register allocate the specified basic block.
126 void AllocateBasicBlock(MachineBasicBlock &MBB);
127
Chris Lattner82bee0f2002-12-18 08:14:26 +0000128
Chris Lattner82bee0f2002-12-18 08:14:26 +0000129 /// areRegsEqual - This method returns true if the specified registers are
130 /// related to each other. To do this, it checks to see if they are equal
131 /// or if the first register is in the alias set of the second register.
132 ///
133 bool areRegsEqual(unsigned R1, unsigned R2) const {
134 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000135 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
136 *AliasSet; ++AliasSet) {
137 if (*AliasSet == R1) return true;
138 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000139 return false;
140 }
141
Chris Lattner580f9be2002-12-28 20:40:43 +0000142 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000143 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000144 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000145
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000146 /// removePhysReg - This method marks the specified physical register as no
147 /// longer being in use.
148 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000149 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000150
151 /// spillVirtReg - This method spills the value specified by PhysReg into
152 /// the virtual register slot specified by VirtReg. It then updates the RA
153 /// data structures to indicate the fact that PhysReg is now available.
154 ///
Chris Lattner688c8252004-02-22 19:08:15 +0000155 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000156 unsigned VirtReg, unsigned PhysReg);
157
Chris Lattnerc21be922002-12-16 17:44:42 +0000158 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000159 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
160 /// true, then the request is ignored if the physical register does not
161 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000162 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000163 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000164 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000165
Chris Lattner91a452b2003-01-13 00:25:40 +0000166 /// assignVirtToPhysReg - This method updates local state so that we know
167 /// that PhysReg is the proper container for VirtReg now. The physical
168 /// register must not be used for anything else when this is called.
169 ///
170 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
171
172 /// liberatePhysReg - Make sure the specified physical register is available
173 /// for use. If there is currently a value in it, it is either moved out of
174 /// the way or spilled to memory.
175 ///
176 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000177 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000178
Chris Lattnerae640432002-12-17 02:50:10 +0000179 /// isPhysRegAvailable - Return true if the specified physical register is
180 /// free and available for use. This also includes checking to see if
181 /// aliased registers are all free...
182 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000183 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000184
185 /// getFreeReg - Look to see if there is a free register available in the
186 /// specified register class. If not, return 0.
187 ///
188 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000189
Chris Lattner91a452b2003-01-13 00:25:40 +0000190 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000191 /// register. If all compatible physical registers are used, this method
192 /// spills the last used virtual register to the stack, and uses that
193 /// register.
194 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000195 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000196 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000197
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000198 /// reloadVirtReg - This method transforms the specified specified virtual
199 /// register use to refer to a physical register. This method may do this
200 /// in one of several ways: if the register is available in a physical
201 /// register already, it uses that physical register. If the value is not
202 /// in a physical register, and if there are physical registers available,
203 /// it loads it into a register. If register pressure is high, and it is
204 /// possible, it tries to fold the load of the virtual register into the
205 /// instruction itself. It avoids doing this if register pressure is low to
206 /// improve the chance that subsequent instructions can use the reloaded
207 /// value. This method returns the modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000208 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000209 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
210 unsigned OpNum);
211
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000212
213 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
214 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000215 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000216}
217
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000218/// getStackSpaceFor - This allocates space for the specified virtual register
219/// to be held on the stack.
220int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
221 // Find the location Reg would belong...
222 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000223
Chris Lattner580f9be2002-12-28 20:40:43 +0000224 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000225 return I->second; // Already has space allocated?
226
Chris Lattner580f9be2002-12-28 20:40:43 +0000227 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000228 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000229
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000230 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000231 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
232 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000233}
234
Chris Lattnerae640432002-12-17 02:50:10 +0000235
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000236/// removePhysReg - This method marks the specified physical register as no
Chris Lattner82bee0f2002-12-18 08:14:26 +0000237/// longer being in use.
238///
239void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000240 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000241
242 std::vector<unsigned>::iterator It =
243 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000244 if (It != PhysRegsUseOrder.end())
245 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000246}
247
Chris Lattner91a452b2003-01-13 00:25:40 +0000248
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000249/// spillVirtReg - This method spills the value specified by PhysReg into the
250/// virtual register slot specified by VirtReg. It then updates the RA data
251/// structures to indicate the fact that PhysReg is now available.
252///
Chris Lattner688c8252004-02-22 19:08:15 +0000253void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000254 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000255 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000256 " Must not have appropriate kill for the register or use exists beyond"
257 " the intended one.");
258 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
259 std::cerr << " containing %reg" << VirtReg;
260 if (!isVirtRegModified(VirtReg))
261 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000262
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000263 // Otherwise, there is a virtual register corresponding to this physical
264 // register. We only need to spill it into its stack slot if it has been
265 // modified.
266 if (isVirtRegModified(VirtReg)) {
267 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
268 int FrameIndex = getStackSpaceFor(VirtReg, RC);
269 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
Chris Lattner57f1b672004-08-15 21:56:44 +0000270 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000271 ++NumStores; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000272 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000273
274 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000275
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000276 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000277 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000278}
279
Chris Lattnerae640432002-12-17 02:50:10 +0000280
Chris Lattner91a452b2003-01-13 00:25:40 +0000281/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000282/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
283/// then the request is ignored if the physical register does not contain a
284/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000285///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000286void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000287 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000288 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
289 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
290 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000291 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000292 // If the selected register aliases any other registers, we must make
293 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000294 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000295 *AliasSet; ++AliasSet)
296 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
297 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
298 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000299 }
300}
301
302
303/// assignVirtToPhysReg - This method updates local state so that we know
304/// that PhysReg is the proper container for VirtReg now. The physical
305/// register must not be used for anything else when this is called.
306///
307void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000308 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000309 // Update information to note the fact that this register was just used, and
310 // it holds VirtReg.
311 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000312 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000313 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
314}
315
316
Chris Lattnerae640432002-12-17 02:50:10 +0000317/// isPhysRegAvailable - Return true if the specified physical register is free
318/// and available for use. This also includes checking to see if aliased
319/// registers are all free...
320///
321bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000322 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000323
324 // If the selected register aliases any other allocated registers, it is
325 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000326 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
327 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000328 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000329 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000330 return true;
331}
332
333
Chris Lattner91a452b2003-01-13 00:25:40 +0000334/// getFreeReg - Look to see if there is a free register available in the
335/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000336///
Chris Lattner91a452b2003-01-13 00:25:40 +0000337unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000338 // Get iterators defining the range of registers that are valid to allocate in
339 // this class, which also specifies the preferred allocation order.
340 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
341 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000342
Chris Lattner91a452b2003-01-13 00:25:40 +0000343 for (; RI != RE; ++RI)
344 if (isPhysRegAvailable(*RI)) { // Is reg unused?
345 assert(*RI != 0 && "Cannot use register!");
346 return *RI; // Found an unused register!
347 }
348 return 0;
349}
350
351
352/// liberatePhysReg - Make sure the specified physical register is available for
353/// use. If there is currently a value in it, it is either moved out of the way
354/// or spilled to memory.
355///
356void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000357 unsigned PhysReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000358 // FIXME: This code checks to see if a register is available, but it really
359 // wants to know if a reg is available BEFORE the instruction executes. If
360 // called after killed operands are freed, it runs the risk of reallocating a
361 // used operand...
362#if 0
363 if (isPhysRegAvailable(PhysReg)) return; // Already available...
364
365 // Check to see if the register is directly used, not indirectly used through
366 // aliases. If aliased registers are the ones actually used, we cannot be
367 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner64667b62004-02-09 01:26:13 +0000368 if (PhysRegsUsed[PhysReg] != -1) {
369 // The virtual register held...
370 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattner91a452b2003-01-13 00:25:40 +0000371
372 // Check to see if there is a compatible register available. If so, we can
373 // move the value into the new register...
374 //
375 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
376 if (unsigned NewReg = getFreeReg(RC)) {
377 // Emit the code to copy the value...
378 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000379
Chris Lattner91a452b2003-01-13 00:25:40 +0000380 // Update our internal state to indicate that PhysReg is available and Reg
381 // isn't.
Chris Lattnerecea5632004-02-09 02:12:04 +0000382 getVirt2PhysRegMapSlot[VirtReg] = 0;
Chris Lattner91a452b2003-01-13 00:25:40 +0000383 removePhysReg(PhysReg); // Free the physreg
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000384
Chris Lattner91a452b2003-01-13 00:25:40 +0000385 // Move reference over to new register...
386 assignVirtToPhysReg(VirtReg, NewReg);
387 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000388 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000389 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000390#endif
391 spillPhysReg(MBB, I, PhysReg);
392}
393
394
395/// getReg - Find a physical register to hold the specified virtual
396/// register. If all compatible physical registers are used, this method spills
397/// the last used virtual register to the stack, and uses that register.
398///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000399unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000400 unsigned VirtReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000401 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
402
403 // First check to see if we have a free register of the requested type...
404 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000405
Chris Lattnerae640432002-12-17 02:50:10 +0000406 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000407 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000408 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000409
410 // Loop over all of the preallocated registers from the least recently used
411 // to the most recently used. When we find one that is capable of holding
412 // our register, use it.
413 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000414 assert(i != PhysRegsUseOrder.size() &&
415 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000416
Chris Lattnerae640432002-12-17 02:50:10 +0000417 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000418
419 // We can only use this register if it holds a virtual register (ie, it
420 // can be spilled). Do not use it if it is an explicitly allocated
421 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000422 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000423 "PhysReg in PhysRegsUseOrder, but is not allocated?");
424 if (PhysRegsUsed[R]) {
425 // If the current register is compatible, use it.
426 if (RegInfo->getRegClass(R) == RC) {
427 PhysReg = R;
428 break;
429 } else {
430 // If one of the registers aliased to the current register is
431 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000432 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
433 *AliasSet; ++AliasSet) {
434 if (RegInfo->getRegClass(*AliasSet) == RC) {
435 PhysReg = *AliasSet; // Take an aliased register
436 break;
437 }
438 }
Chris Lattner41822c72003-08-23 23:49:42 +0000439 }
Chris Lattnerae640432002-12-17 02:50:10 +0000440 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000441 }
442
Chris Lattnerae640432002-12-17 02:50:10 +0000443 assert(PhysReg && "Physical register not assigned!?!?");
444
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000445 // At this point PhysRegsUseOrder[i] is the least recently used register of
446 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000447 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000448 }
449
450 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000451 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000452 return PhysReg;
453}
454
Chris Lattnerae640432002-12-17 02:50:10 +0000455
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000456/// reloadVirtReg - This method transforms the specified specified virtual
457/// register use to refer to a physical register. This method may do this in
458/// one of several ways: if the register is available in a physical register
459/// already, it uses that physical register. If the value is not in a physical
460/// register, and if there are physical registers available, it loads it into a
461/// register. If register pressure is high, and it is possible, it tries to
462/// fold the load of the virtual register into the instruction itself. It
463/// avoids doing this if register pressure is low to improve the chance that
464/// subsequent instructions can use the reloaded value. This method returns the
465/// modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000466///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000467MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
468 unsigned OpNum) {
469 unsigned VirtReg = MI->getOperand(OpNum).getReg();
470
471 // If the virtual register is already available, just update the instruction
472 // and return.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000473 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000474 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
475 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
476 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000477 }
478
Chris Lattner1e3812c2004-02-17 04:08:37 +0000479 // Otherwise, we need to fold it into the current instruction, or reload it.
480 // If we have registers available to hold the value, use them.
Chris Lattnerff863ba2002-12-25 05:05:46 +0000481 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000482 unsigned PhysReg = getFreeReg(RC);
Chris Lattner11390e72004-02-17 08:09:40 +0000483 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000484
Chris Lattner11390e72004-02-17 08:09:40 +0000485 if (PhysReg) { // Register is available, allocate it!
486 assignVirtToPhysReg(VirtReg, PhysReg);
487 } else { // No registers available.
488 // If we can fold this spill into this instruction, do so now.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000489 if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +0000490 ++NumFolded;
Chris Lattnerd368c612004-02-19 18:34:02 +0000491 // Since we changed the address of MI, make sure to update live variables
492 // to know that the new instruction has the properties of the old one.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000493 LV->instructionChanged(MI, FMI);
494 return MBB.insert(MBB.erase(MI), FMI);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000495 }
496
497 // It looks like we can't fold this virtual register load into this
498 // instruction. Force some poor hapless value out of the register file to
499 // make room for the new register, and reload it.
500 PhysReg = getReg(MBB, MI, VirtReg);
501 }
502
Chris Lattner91a452b2003-01-13 00:25:40 +0000503 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
504
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000505 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
506 << RegInfo->getName(PhysReg) << "\n");
507
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000508 // Add move instruction(s)
Chris Lattner57f1b672004-08-15 21:56:44 +0000509 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000510 ++NumLoads; // Update statistics
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000511
512 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
513 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000514}
515
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000516
517
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000518void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
519 // loop over each instruction
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000520 MachineBasicBlock::iterator MI = MBB.begin();
521 for (; MI != MBB.end(); ++MI) {
Chris Lattner9bcdcd12004-06-02 05:57:12 +0000522 const TargetInstrDescriptor &TID = TM->getInstrInfo()->get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000523 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
524 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000525 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
526 if (PhysRegsUsed[i] != -1)
527 std::cerr << "[" << RegInfo->getName(i)
528 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000529 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000530
Chris Lattnerae640432002-12-17 02:50:10 +0000531 // Loop over the implicit uses, making sure that they are at the head of the
532 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000533 for (const unsigned *ImplicitUses = TID.ImplicitUses;
534 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000535 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000536
Brian Gaeke53b99a02003-08-15 21:19:25 +0000537 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000538 // incoming values if we are out of registers. Note that we completely
539 // ignore physical register uses here. We assume that if an explicit
540 // physical register is referenced by the instruction, that it is guaranteed
541 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000542 //
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000543 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
544 MachineOperand& MO = MI->getOperand(i);
545 // here we are looking for only used operands (never def&use)
546 if (!MO.isDef() && MO.isRegister() && MO.getReg() &&
547 MRegisterInfo::isVirtualRegister(MO.getReg()))
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000548 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000549 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000550
Chris Lattner56ddada2004-02-17 17:49:10 +0000551 // If this instruction is the last user of anything in registers, kill the
552 // value, freeing the register being used, so it doesn't need to be
553 // spilled to memory.
554 //
555 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
556 KE = LV->killed_end(MI); KI != KE; ++KI) {
557 unsigned VirtReg = KI->second;
558 unsigned PhysReg = VirtReg;
559 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
560 // If the virtual register was never materialized into a register, it
561 // might not be in the map, but it won't hurt to zero it out anyway.
562 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
563 PhysReg = PhysRegSlot;
564 PhysRegSlot = 0;
565 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000566
Chris Lattner56ddada2004-02-17 17:49:10 +0000567 if (PhysReg) {
568 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
569 << "[%reg" << VirtReg <<"], removing it from live set\n");
570 removePhysReg(PhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000571 }
572 }
573
574 // Loop over all of the operands of the instruction, spilling registers that
575 // are defined, and marking explicit destinations in the PhysRegsUsed map.
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000576 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
577 MachineOperand& MO = MI->getOperand(i);
578 if (MO.isDef() && MO.isRegister() && MO.getReg() &&
579 MRegisterInfo::isPhysicalRegister(MO.getReg())) {
580 unsigned Reg = MO.getReg();
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000581 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000582 PhysRegsUsed[Reg] = 0; // It is free and reserved now
583 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000584 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
585 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000586 PhysRegsUseOrder.push_back(*AliasSet);
587 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000588 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000589 }
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000590 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000591
592 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000593 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
594 *ImplicitDefs; ++ImplicitDefs) {
595 unsigned Reg = *ImplicitDefs;
Chris Lattner11390e72004-02-17 08:09:40 +0000596 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000597 PhysRegsUseOrder.push_back(Reg);
598 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000599 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
600 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000601 PhysRegsUseOrder.push_back(*AliasSet);
602 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000603 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000604 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000605
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000606 // Okay, we have allocated all of the source operands and spilled any values
607 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000608 // implicit defs and assign them to a register, spilling incoming values if
609 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000610 //
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000611 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
612 MachineOperand& MO = MI->getOperand(i);
613 if (MO.isDef() && MO.isRegister() && MO.getReg() &&
614 MRegisterInfo::isVirtualRegister(MO.getReg())) {
615 unsigned DestVirtReg = MO.getReg();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000616 unsigned DestPhysReg;
617
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000618 // If DestVirtReg already has a value, use it.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000619 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000620 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000621 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000622 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
623 }
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000624 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000625
Chris Lattner56ddada2004-02-17 17:49:10 +0000626 // If this instruction defines any registers that are immediately dead,
627 // kill them now.
628 //
629 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
630 KE = LV->dead_end(MI); KI != KE; ++KI) {
631 unsigned VirtReg = KI->second;
632 unsigned PhysReg = VirtReg;
633 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
634 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
635 PhysReg = PhysRegSlot;
636 assert(PhysReg != 0);
637 PhysRegSlot = 0;
638 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000639
Chris Lattner56ddada2004-02-17 17:49:10 +0000640 if (PhysReg) {
641 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
642 << " [%reg" << VirtReg
643 << "] is never used, removing it frame live list\n");
644 removePhysReg(PhysReg);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000645 }
646 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000647 }
648
Alkis Evlogimenos743d0a12004-02-23 18:14:48 +0000649 MI = MBB.getFirstTerminator();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000650
651 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000652 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
653 if (PhysRegsUsed[i] != -1)
654 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000655 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner64667b62004-02-09 01:26:13 +0000656 else
657 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000658
Chris Lattnerecea5632004-02-09 02:12:04 +0000659#ifndef NDEBUG
660 bool AllOk = true;
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000661 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
662 e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
Chris Lattnerecea5632004-02-09 02:12:04 +0000663 if (unsigned PR = Virt2PhysRegMap[i]) {
664 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
665 AllOk = false;
666 }
667 assert(AllOk && "Virtual registers still in phys regs?");
668#endif
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000669
Chris Lattner128c2aa2003-08-17 18:01:15 +0000670 // Clear any physical register which appear live at the end of the basic
671 // block, but which do not hold any virtual registers. e.g., the stack
672 // pointer.
673 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000674}
675
Chris Lattner86c69a62002-12-17 03:16:10 +0000676
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000677/// runOnMachineFunction - Register allocate the whole function
678///
679bool RA::runOnMachineFunction(MachineFunction &Fn) {
680 DEBUG(std::cerr << "Machine Function " << "\n");
681 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000682 TM = &Fn.getTarget();
683 RegInfo = TM->getRegisterInfo();
Chris Lattner56ddada2004-02-17 17:49:10 +0000684 LV = &getAnalysis<LiveVariables>();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000685
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000686 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner64667b62004-02-09 01:26:13 +0000687
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000688 // initialize the virtual->physical register map to have a 'null'
689 // mapping for all virtual registers
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000690 Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg());
Chris Lattnerecea5632004-02-09 02:12:04 +0000691
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000692 // Loop over all of the basic blocks, eliminating virtual register references
693 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
694 MBB != MBBe; ++MBB)
695 AllocateBasicBlock(*MBB);
696
Chris Lattner580f9be2002-12-28 20:40:43 +0000697 StackSlotForVirtReg.clear();
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000698 PhysRegsUsed.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000699 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000700 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000701 return true;
702}
703
Chris Lattneref09c632004-01-31 21:27:19 +0000704FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000705 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000706}