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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Reid Spencer551ccae2004-09-01 22:55:40 +000024#include "llvm/Support/CommandLine.h"
25#include "llvm/Support/Debug.h"
26#include "llvm/ADT/DenseMap.h"
27#include "llvm/ADT/Statistic.h"
Chris Lattner27f29162004-10-26 15:35:58 +000028#include <algorithm>
Chris Lattner2c2c6c62006-01-22 23:41:00 +000029#include <iostream>
Chris Lattneref09c632004-01-31 21:27:19 +000030using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000031
Chris Lattnerb74e83c2002-12-16 16:15:28 +000032namespace {
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +000033 Statistic<> NumStores("ra-local", "Number of stores added");
34 Statistic<> NumLoads ("ra-local", "Number of loads added");
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +000035 Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
36 "instructions");
Chris Lattner580f9be2002-12-28 20:40:43 +000037 class RA : public MachineFunctionPass {
38 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000039 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000040 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000041 LiveVariables *LV;
Chris Lattner0648b162005-01-23 22:51:56 +000042 bool *PhysRegsEverUsed;
Chris Lattnerff863ba2002-12-25 05:05:46 +000043
Chris Lattnerb8822ad2003-08-04 23:36:39 +000044 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
45 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000046 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000047
48 // Virt2PhysRegMap - This map contains entries for each virtual register
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000049 // that is currently available in a physical register.
50 DenseMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
Chris Lattnerecea5632004-02-09 02:12:04 +000051
52 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000053 return Virt2PhysRegMap[VirtReg];
Chris Lattnerecea5632004-02-09 02:12:04 +000054 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000055
Chris Lattner64667b62004-02-09 01:26:13 +000056 // PhysRegsUsed - This array is effectively a map, containing entries for
57 // each physical register that currently has a value (ie, it is in
58 // Virt2PhysRegMap). The value mapped to is the virtual register
59 // corresponding to the physical register (the inverse of the
60 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
61 // because it is used by a future instruction. If the entry for a physical
62 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000063 //
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000064 std::vector<int> PhysRegsUsed;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000065
66 // PhysRegsUseOrder - This contains a list of the physical registers that
67 // currently have a virtual register value in them. This list provides an
68 // ordering of registers, imposing a reallocation order. This list is only
69 // used if all registers are allocated and we have to spill one, in which
70 // case we spill the least recently used register. Entries at the front of
71 // the list are the least recently used registers, entries at the back are
72 // the most recently used.
73 //
74 std::vector<unsigned> PhysRegsUseOrder;
75
Chris Lattner91a452b2003-01-13 00:25:40 +000076 // VirtRegModified - This bitset contains information about which virtual
77 // registers need to be spilled back to memory when their registers are
78 // scavenged. If a virtual register has simply been rematerialized, there
79 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000080 //
Chris Lattner91a452b2003-01-13 00:25:40 +000081 std::vector<bool> VirtRegModified;
82
83 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000084 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000085 Reg -= MRegisterInfo::FirstVirtualRegister;
86 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
87 VirtRegModified[Reg] = Val;
88 }
89
90 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +000091 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000092 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000093 && "Illegal virtual register!");
Chris Lattner91a452b2003-01-13 00:25:40 +000094 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
95 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000096
Chris Lattnerb74e83c2002-12-16 16:15:28 +000097 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattneraebcce82004-06-16 06:57:29 +000098 if(PhysRegsUseOrder.empty() ||
99 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
Chris Lattner0eb172c2002-12-24 00:04:55 +0000100
101 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000102 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
103 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
104 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
105 // Add it to the end of the list
106 PhysRegsUseOrder.push_back(RegMatch);
107 if (RegMatch == Reg)
108 return; // Found an exact match, exit early
109 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000110 }
111
112 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000113 virtual const char *getPassName() const {
114 return "Local Register Allocator";
115 }
116
Chris Lattner91a452b2003-01-13 00:25:40 +0000117 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
Chris Lattner56ddada2004-02-17 17:49:10 +0000118 AU.addRequired<LiveVariables>();
Chris Lattner91a452b2003-01-13 00:25:40 +0000119 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000120 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000121 MachineFunctionPass::getAnalysisUsage(AU);
122 }
123
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000124 private:
125 /// runOnMachineFunction - Register allocate the whole function
126 bool runOnMachineFunction(MachineFunction &Fn);
127
128 /// AllocateBasicBlock - Register allocate the specified basic block.
129 void AllocateBasicBlock(MachineBasicBlock &MBB);
130
Chris Lattner82bee0f2002-12-18 08:14:26 +0000131
Chris Lattner82bee0f2002-12-18 08:14:26 +0000132 /// areRegsEqual - This method returns true if the specified registers are
133 /// related to each other. To do this, it checks to see if they are equal
134 /// or if the first register is in the alias set of the second register.
135 ///
136 bool areRegsEqual(unsigned R1, unsigned R2) const {
137 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000138 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
139 *AliasSet; ++AliasSet) {
140 if (*AliasSet == R1) return true;
141 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000142 return false;
143 }
144
Chris Lattner580f9be2002-12-28 20:40:43 +0000145 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000146 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000147 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000148
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000149 /// removePhysReg - This method marks the specified physical register as no
150 /// longer being in use.
151 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000152 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000153
154 /// spillVirtReg - This method spills the value specified by PhysReg into
155 /// the virtual register slot specified by VirtReg. It then updates the RA
156 /// data structures to indicate the fact that PhysReg is now available.
157 ///
Chris Lattner688c8252004-02-22 19:08:15 +0000158 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000159 unsigned VirtReg, unsigned PhysReg);
160
Chris Lattnerc21be922002-12-16 17:44:42 +0000161 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000162 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
163 /// true, then the request is ignored if the physical register does not
164 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000165 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000166 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000167 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000168
Chris Lattner91a452b2003-01-13 00:25:40 +0000169 /// assignVirtToPhysReg - This method updates local state so that we know
170 /// that PhysReg is the proper container for VirtReg now. The physical
171 /// register must not be used for anything else when this is called.
172 ///
173 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
174
175 /// liberatePhysReg - Make sure the specified physical register is available
176 /// for use. If there is currently a value in it, it is either moved out of
177 /// the way or spilled to memory.
178 ///
179 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000180 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000181
Chris Lattnerae640432002-12-17 02:50:10 +0000182 /// isPhysRegAvailable - Return true if the specified physical register is
183 /// free and available for use. This also includes checking to see if
184 /// aliased registers are all free...
185 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000186 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000187
188 /// getFreeReg - Look to see if there is a free register available in the
189 /// specified register class. If not, return 0.
190 ///
191 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000192
Chris Lattner91a452b2003-01-13 00:25:40 +0000193 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000194 /// register. If all compatible physical registers are used, this method
195 /// spills the last used virtual register to the stack, and uses that
196 /// register.
197 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000198 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000199 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000200
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000201 /// reloadVirtReg - This method transforms the specified specified virtual
202 /// register use to refer to a physical register. This method may do this
203 /// in one of several ways: if the register is available in a physical
204 /// register already, it uses that physical register. If the value is not
205 /// in a physical register, and if there are physical registers available,
206 /// it loads it into a register. If register pressure is high, and it is
207 /// possible, it tries to fold the load of the virtual register into the
208 /// instruction itself. It avoids doing this if register pressure is low to
209 /// improve the chance that subsequent instructions can use the reloaded
210 /// value. This method returns the modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000211 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000212 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
213 unsigned OpNum);
Misha Brukmanedf128a2005-04-21 22:36:52 +0000214
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000215
216 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
217 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000218 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000219}
220
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000221/// getStackSpaceFor - This allocates space for the specified virtual register
222/// to be held on the stack.
223int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
224 // Find the location Reg would belong...
225 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000226
Chris Lattner580f9be2002-12-28 20:40:43 +0000227 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000228 return I->second; // Already has space allocated?
229
Chris Lattner580f9be2002-12-28 20:40:43 +0000230 // Allocate a new stack object for this spill location...
Chris Lattner26eb14b2004-08-15 22:02:22 +0000231 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
232 RC->getAlignment());
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000233
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000234 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000235 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
236 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000237}
238
Chris Lattnerae640432002-12-17 02:50:10 +0000239
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000240/// removePhysReg - This method marks the specified physical register as no
Chris Lattner82bee0f2002-12-18 08:14:26 +0000241/// longer being in use.
242///
243void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000244 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000245
246 std::vector<unsigned>::iterator It =
247 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000248 if (It != PhysRegsUseOrder.end())
249 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000250}
251
Chris Lattner91a452b2003-01-13 00:25:40 +0000252
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000253/// spillVirtReg - This method spills the value specified by PhysReg into the
254/// virtual register slot specified by VirtReg. It then updates the RA data
255/// structures to indicate the fact that PhysReg is now available.
256///
Chris Lattner688c8252004-02-22 19:08:15 +0000257void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000258 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000259 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000260 " Must not have appropriate kill for the register or use exists beyond"
261 " the intended one.");
262 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
263 std::cerr << " containing %reg" << VirtReg;
264 if (!isVirtRegModified(VirtReg))
265 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000266
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000267 // Otherwise, there is a virtual register corresponding to this physical
268 // register. We only need to spill it into its stack slot if it has been
269 // modified.
270 if (isVirtRegModified(VirtReg)) {
271 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
272 int FrameIndex = getStackSpaceFor(VirtReg, RC);
273 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000274 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000275 ++NumStores; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000276 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000277
278 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000279
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000280 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000281 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000282}
283
Chris Lattnerae640432002-12-17 02:50:10 +0000284
Chris Lattner91a452b2003-01-13 00:25:40 +0000285/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000286/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
287/// then the request is ignored if the physical register does not contain a
288/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000289///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000290void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000291 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000292 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
293 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
294 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000295 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000296 // If the selected register aliases any other registers, we must make
297 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000298 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000299 *AliasSet; ++AliasSet)
300 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
301 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
302 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000303 }
304}
305
306
307/// assignVirtToPhysReg - This method updates local state so that we know
308/// that PhysReg is the proper container for VirtReg now. The physical
309/// register must not be used for anything else when this is called.
310///
311void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000312 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000313 // Update information to note the fact that this register was just used, and
314 // it holds VirtReg.
315 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000316 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000317 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
318}
319
320
Chris Lattnerae640432002-12-17 02:50:10 +0000321/// isPhysRegAvailable - Return true if the specified physical register is free
322/// and available for use. This also includes checking to see if aliased
323/// registers are all free...
324///
325bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000326 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000327
328 // If the selected register aliases any other allocated registers, it is
329 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000330 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
331 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000332 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000333 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000334 return true;
335}
336
337
Chris Lattner91a452b2003-01-13 00:25:40 +0000338/// getFreeReg - Look to see if there is a free register available in the
339/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000340///
Chris Lattner91a452b2003-01-13 00:25:40 +0000341unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000342 // Get iterators defining the range of registers that are valid to allocate in
343 // this class, which also specifies the preferred allocation order.
344 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
345 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000346
Chris Lattner91a452b2003-01-13 00:25:40 +0000347 for (; RI != RE; ++RI)
348 if (isPhysRegAvailable(*RI)) { // Is reg unused?
349 assert(*RI != 0 && "Cannot use register!");
350 return *RI; // Found an unused register!
351 }
352 return 0;
353}
354
355
356/// liberatePhysReg - Make sure the specified physical register is available for
357/// use. If there is currently a value in it, it is either moved out of the way
358/// or spilled to memory.
359///
360void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000361 unsigned PhysReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000362 spillPhysReg(MBB, I, PhysReg);
363}
364
365
366/// getReg - Find a physical register to hold the specified virtual
367/// register. If all compatible physical registers are used, this method spills
368/// the last used virtual register to the stack, and uses that register.
369///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000370unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000371 unsigned VirtReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000372 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
373
374 // First check to see if we have a free register of the requested type...
375 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000376
Chris Lattnerae640432002-12-17 02:50:10 +0000377 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000378 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000379 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000380
381 // Loop over all of the preallocated registers from the least recently used
382 // to the most recently used. When we find one that is capable of holding
383 // our register, use it.
384 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000385 assert(i != PhysRegsUseOrder.size() &&
386 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000387
Chris Lattnerae640432002-12-17 02:50:10 +0000388 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000389
390 // We can only use this register if it holds a virtual register (ie, it
391 // can be spilled). Do not use it if it is an explicitly allocated
392 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000393 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000394 "PhysReg in PhysRegsUseOrder, but is not allocated?");
395 if (PhysRegsUsed[R]) {
396 // If the current register is compatible, use it.
Chris Lattner3bba0262004-08-15 22:23:09 +0000397 if (RC->contains(R)) {
Chris Lattner41822c72003-08-23 23:49:42 +0000398 PhysReg = R;
399 break;
400 } else {
401 // If one of the registers aliased to the current register is
402 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000403 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
404 *AliasSet; ++AliasSet) {
Chris Lattner3bba0262004-08-15 22:23:09 +0000405 if (RC->contains(*AliasSet)) {
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000406 PhysReg = *AliasSet; // Take an aliased register
407 break;
408 }
409 }
Chris Lattner41822c72003-08-23 23:49:42 +0000410 }
Chris Lattnerae640432002-12-17 02:50:10 +0000411 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000412 }
413
Chris Lattnerae640432002-12-17 02:50:10 +0000414 assert(PhysReg && "Physical register not assigned!?!?");
415
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000416 // At this point PhysRegsUseOrder[i] is the least recently used register of
417 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000418 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000419 }
420
421 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000422 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000423 return PhysReg;
424}
425
Chris Lattnerae640432002-12-17 02:50:10 +0000426
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000427/// reloadVirtReg - This method transforms the specified specified virtual
428/// register use to refer to a physical register. This method may do this in
429/// one of several ways: if the register is available in a physical register
430/// already, it uses that physical register. If the value is not in a physical
431/// register, and if there are physical registers available, it loads it into a
432/// register. If register pressure is high, and it is possible, it tries to
433/// fold the load of the virtual register into the instruction itself. It
434/// avoids doing this if register pressure is low to improve the chance that
435/// subsequent instructions can use the reloaded value. This method returns the
436/// modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000437///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000438MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
439 unsigned OpNum) {
440 unsigned VirtReg = MI->getOperand(OpNum).getReg();
441
442 // If the virtual register is already available, just update the instruction
443 // and return.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000444 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000445 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
446 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
447 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000448 }
449
Chris Lattner1e3812c2004-02-17 04:08:37 +0000450 // Otherwise, we need to fold it into the current instruction, or reload it.
451 // If we have registers available to hold the value, use them.
Chris Lattnerff863ba2002-12-25 05:05:46 +0000452 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000453 unsigned PhysReg = getFreeReg(RC);
Chris Lattner11390e72004-02-17 08:09:40 +0000454 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000455
Chris Lattner11390e72004-02-17 08:09:40 +0000456 if (PhysReg) { // Register is available, allocate it!
457 assignVirtToPhysReg(VirtReg, PhysReg);
458 } else { // No registers available.
459 // If we can fold this spill into this instruction, do so now.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000460 if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +0000461 ++NumFolded;
Chris Lattnerd368c612004-02-19 18:34:02 +0000462 // Since we changed the address of MI, make sure to update live variables
463 // to know that the new instruction has the properties of the old one.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000464 LV->instructionChanged(MI, FMI);
465 return MBB.insert(MBB.erase(MI), FMI);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000466 }
467
468 // It looks like we can't fold this virtual register load into this
469 // instruction. Force some poor hapless value out of the register file to
470 // make room for the new register, and reload it.
471 PhysReg = getReg(MBB, MI, VirtReg);
472 }
473
Chris Lattner91a452b2003-01-13 00:25:40 +0000474 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
475
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000476 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
477 << RegInfo->getName(PhysReg) << "\n");
478
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000479 // Add move instruction(s)
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000480 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000481 ++NumLoads; // Update statistics
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000482
Chris Lattner0648b162005-01-23 22:51:56 +0000483 PhysRegsEverUsed[PhysReg] = true;
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000484 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
485 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000486}
487
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000488
489
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000490void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
491 // loop over each instruction
Chris Lattnere6a88ac2005-11-09 18:22:42 +0000492 MachineBasicBlock::iterator MII = MBB.begin();
493 const TargetInstrInfo &TII = *TM->getInstrInfo();
494 while (MII != MBB.end()) {
495 MachineInstr *MI = MII++;
496 const TargetInstrDescriptor &TID = TII.get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000497 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
498 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000499 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
500 if (PhysRegsUsed[i] != -1)
501 std::cerr << "[" << RegInfo->getName(i)
502 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000503 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000504
Chris Lattnerae640432002-12-17 02:50:10 +0000505 // Loop over the implicit uses, making sure that they are at the head of the
506 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000507 for (const unsigned *ImplicitUses = TID.ImplicitUses;
508 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000509 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000510
Brian Gaeke53b99a02003-08-15 21:19:25 +0000511 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000512 // incoming values if we are out of registers. Note that we completely
513 // ignore physical register uses here. We assume that if an explicit
514 // physical register is referenced by the instruction, that it is guaranteed
515 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000516 //
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000517 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
518 MachineOperand& MO = MI->getOperand(i);
519 // here we are looking for only used operands (never def&use)
520 if (!MO.isDef() && MO.isRegister() && MO.getReg() &&
521 MRegisterInfo::isVirtualRegister(MO.getReg()))
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000522 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000523 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000524
Chris Lattner56ddada2004-02-17 17:49:10 +0000525 // If this instruction is the last user of anything in registers, kill the
526 // value, freeing the register being used, so it doesn't need to be
527 // spilled to memory.
528 //
529 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
530 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattner44b94c22005-08-23 23:42:17 +0000531 unsigned VirtReg = *KI;
Chris Lattner56ddada2004-02-17 17:49:10 +0000532 unsigned PhysReg = VirtReg;
533 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
534 // If the virtual register was never materialized into a register, it
535 // might not be in the map, but it won't hurt to zero it out anyway.
536 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
537 PhysReg = PhysRegSlot;
538 PhysRegSlot = 0;
539 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000540
Chris Lattner56ddada2004-02-17 17:49:10 +0000541 if (PhysReg) {
542 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
543 << "[%reg" << VirtReg <<"], removing it from live set\n");
544 removePhysReg(PhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000545 }
546 }
547
548 // Loop over all of the operands of the instruction, spilling registers that
549 // are defined, and marking explicit destinations in the PhysRegsUsed map.
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000550 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
551 MachineOperand& MO = MI->getOperand(i);
552 if (MO.isDef() && MO.isRegister() && MO.getReg() &&
553 MRegisterInfo::isPhysicalRegister(MO.getReg())) {
554 unsigned Reg = MO.getReg();
Chris Lattner0648b162005-01-23 22:51:56 +0000555 PhysRegsEverUsed[Reg] = true;
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000556 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000557 PhysRegsUsed[Reg] = 0; // It is free and reserved now
558 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000559 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
560 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000561 PhysRegsUseOrder.push_back(*AliasSet);
562 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Chris Lattner0648b162005-01-23 22:51:56 +0000563 PhysRegsEverUsed[*AliasSet] = true;
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000564 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000565 }
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000566 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000567
568 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000569 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
570 *ImplicitDefs; ++ImplicitDefs) {
571 unsigned Reg = *ImplicitDefs;
Chris Lattner11390e72004-02-17 08:09:40 +0000572 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000573 PhysRegsUseOrder.push_back(Reg);
574 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Chris Lattner0648b162005-01-23 22:51:56 +0000575 PhysRegsEverUsed[Reg] = true;
576
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000577 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
578 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000579 PhysRegsUseOrder.push_back(*AliasSet);
580 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Chris Lattner0648b162005-01-23 22:51:56 +0000581 PhysRegsEverUsed[*AliasSet] = true;
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000582 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000583 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000584
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000585 // Okay, we have allocated all of the source operands and spilled any values
586 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner0648b162005-01-23 22:51:56 +0000587 // explicit defs and assign them to a register, spilling incoming values if
Chris Lattner91a452b2003-01-13 00:25:40 +0000588 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000589 //
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000590 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
591 MachineOperand& MO = MI->getOperand(i);
592 if (MO.isDef() && MO.isRegister() && MO.getReg() &&
593 MRegisterInfo::isVirtualRegister(MO.getReg())) {
594 unsigned DestVirtReg = MO.getReg();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000595 unsigned DestPhysReg;
596
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000597 // If DestVirtReg already has a value, use it.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000598 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000599 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattner0648b162005-01-23 22:51:56 +0000600 PhysRegsEverUsed[DestPhysReg] = true;
Chris Lattnerd5725632003-05-12 03:54:14 +0000601 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000602 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
603 }
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000604 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000605
Chris Lattner56ddada2004-02-17 17:49:10 +0000606 // If this instruction defines any registers that are immediately dead,
607 // kill them now.
608 //
609 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
610 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattner44b94c22005-08-23 23:42:17 +0000611 unsigned VirtReg = *KI;
Chris Lattner56ddada2004-02-17 17:49:10 +0000612 unsigned PhysReg = VirtReg;
613 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
614 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
615 PhysReg = PhysRegSlot;
616 assert(PhysReg != 0);
617 PhysRegSlot = 0;
618 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000619
Chris Lattner56ddada2004-02-17 17:49:10 +0000620 if (PhysReg) {
621 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
622 << " [%reg" << VirtReg
623 << "] is never used, removing it frame live list\n");
624 removePhysReg(PhysReg);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000625 }
626 }
Chris Lattnere6a88ac2005-11-09 18:22:42 +0000627
628 // Finally, if this is a noop copy instruction, zap it.
629 unsigned SrcReg, DstReg;
630 if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
631 MBB.erase(MI);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000632 }
633
Chris Lattnere6a88ac2005-11-09 18:22:42 +0000634 MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000635
636 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000637 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
638 if (PhysRegsUsed[i] != -1)
639 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000640 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner64667b62004-02-09 01:26:13 +0000641 else
642 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000643
Chris Lattner9a5ef202005-11-09 05:28:45 +0000644#if 0
645 // This checking code is very expensive.
Chris Lattnerecea5632004-02-09 02:12:04 +0000646 bool AllOk = true;
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000647 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
648 e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
Chris Lattnerecea5632004-02-09 02:12:04 +0000649 if (unsigned PR = Virt2PhysRegMap[i]) {
650 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
651 AllOk = false;
652 }
653 assert(AllOk && "Virtual registers still in phys regs?");
654#endif
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000655
Chris Lattner128c2aa2003-08-17 18:01:15 +0000656 // Clear any physical register which appear live at the end of the basic
657 // block, but which do not hold any virtual registers. e.g., the stack
658 // pointer.
659 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000660}
661
Chris Lattner86c69a62002-12-17 03:16:10 +0000662
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000663/// runOnMachineFunction - Register allocate the whole function
664///
665bool RA::runOnMachineFunction(MachineFunction &Fn) {
666 DEBUG(std::cerr << "Machine Function " << "\n");
667 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000668 TM = &Fn.getTarget();
669 RegInfo = TM->getRegisterInfo();
Chris Lattner56ddada2004-02-17 17:49:10 +0000670 LV = &getAnalysis<LiveVariables>();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000671
Chris Lattner0648b162005-01-23 22:51:56 +0000672 PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
673 std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
674 Fn.setUsedPhysRegs(PhysRegsEverUsed);
675
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000676 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner64667b62004-02-09 01:26:13 +0000677
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000678 // initialize the virtual->physical register map to have a 'null'
679 // mapping for all virtual registers
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000680 Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg());
Chris Lattnerecea5632004-02-09 02:12:04 +0000681
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000682 // Loop over all of the basic blocks, eliminating virtual register references
683 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
684 MBB != MBBe; ++MBB)
685 AllocateBasicBlock(*MBB);
686
Chris Lattner580f9be2002-12-28 20:40:43 +0000687 StackSlotForVirtReg.clear();
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000688 PhysRegsUsed.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000689 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000690 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000691 return true;
692}
693
Chris Lattneref09c632004-01-31 21:27:19 +0000694FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000695 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000696}