Eric Christopher | e1739d5 | 2011-05-24 23:15:43 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s |
Eric Christopher | 0628d38 | 2011-05-24 22:10:34 +0000 | [diff] [blame] | 2 | |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 3 | define i32 @foo(float %scale, float %scale2) nounwind { |
Eric Christopher | 0628d38 | 2011-05-24 22:10:34 +0000 | [diff] [blame] | 4 | entry: |
| 5 | %scale.addr = alloca float, align 4 |
| 6 | %scale2.addr = alloca float, align 4 |
| 7 | store float %scale, float* %scale.addr, align 4 |
| 8 | store float %scale2, float* %scale2.addr, align 4 |
| 9 | %tmp = load float* %scale.addr, align 4 |
| 10 | %tmp1 = load float* %scale2.addr, align 4 |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 11 | call void asm sideeffect "vmul.f32 q0, q0, ${0:y} \0A\09vmul.f32 q1, q1, ${0:y} \0A\09vmul.f32 q1, q0, ${1:y} \0A\09", "w,w,~{q0},~{q1}"(float %tmp, float %tmp1) nounwind |
Eric Christopher | 0628d38 | 2011-05-24 22:10:34 +0000 | [diff] [blame] | 12 | ret i32 0 |
| 13 | } |
| 14 | |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 15 | define void @f0() nounwind { |
Eric Christopher | e1739d5 | 2011-05-24 23:15:43 +0000 | [diff] [blame] | 16 | entry: |
| 17 | ; CHECK: f0 |
| 18 | ; CHECK: .word -1 |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 19 | call void asm sideeffect ".word ${0:B} \0A\09", "i"(i32 0) nounwind |
Eric Christopher | e1739d5 | 2011-05-24 23:15:43 +0000 | [diff] [blame] | 20 | ret void |
| 21 | } |
Eric Christopher | 4db7dec | 2011-05-24 23:27:13 +0000 | [diff] [blame] | 22 | |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 23 | define void @f1() nounwind { |
Eric Christopher | 4db7dec | 2011-05-24 23:27:13 +0000 | [diff] [blame] | 24 | entry: |
| 25 | ; CHECK: f1 |
| 26 | ; CHECK: .word 65535 |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 27 | call void asm sideeffect ".word ${0:L} \0A\09", "i"(i32 -1) nounwind |
Eric Christopher | 4db7dec | 2011-05-24 23:27:13 +0000 | [diff] [blame] | 28 | ret void |
| 29 | } |
Eric Christopher | 8f89463 | 2011-05-25 20:51:58 +0000 | [diff] [blame] | 30 | |
| 31 | @f2_ptr = internal global i32* @f2_var, align 4 |
| 32 | @f2_var = external global i32 |
| 33 | |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 34 | define void @f2() nounwind { |
Eric Christopher | 8f89463 | 2011-05-25 20:51:58 +0000 | [diff] [blame] | 35 | entry: |
| 36 | ; CHECK: f2 |
| 37 | ; CHECK: ldr r0, [r{{[0-9]+}}] |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 38 | call void asm sideeffect "ldr r0, [${0:m}]\0A\09", "*m,~{r0}"(i32** @f2_ptr) nounwind |
| 39 | ret void |
| 40 | } |
| 41 | |
| 42 | @f3_ptr = internal global i64* @f3_var, align 4 |
| 43 | @f3_var = external global i64 |
| 44 | @f3_var2 = external global i64 |
| 45 | |
| 46 | define void @f3() nounwind { |
| 47 | entry: |
| 48 | ; CHECK: f3 |
Eric Christopher | 34720e1 | 2011-06-27 20:31:01 +0000 | [diff] [blame] | 49 | ; CHECK: stm {{lr|r[0-9]+}}, {[[REG1:(r[0-9]+)]], r{{[0-9]+}}} |
| 50 | ; CHECK: adds {{lr|r[0-9]+}}, [[REG1]] |
| 51 | ; CHECK: ldm {{lr|r[0-9]+}}, {r{{[0-9]+}}, r{{[0-9]+}}} |
Eric Christopher | 3c14f24 | 2011-05-28 01:40:44 +0000 | [diff] [blame] | 52 | %tmp = load i64* @f3_var, align 4 |
| 53 | %tmp1 = load i64* @f3_var2, align 4 |
| 54 | %0 = call i64 asm sideeffect "stm ${0:m}, ${1:M}\0A\09adds $3, $1\0A\09", "=*m,=r,1,r"(i64** @f3_ptr, i64 %tmp, i64 %tmp1) nounwind |
| 55 | store i64 %0, i64* @f3_var, align 4 |
| 56 | %1 = call i64 asm sideeffect "ldm ${1:m}, ${0:M}\0A\09", "=r,*m"(i64** @f3_ptr) nounwind |
| 57 | store i64 %1, i64* @f3_var, align 4 |
Eric Christopher | 8f89463 | 2011-05-25 20:51:58 +0000 | [diff] [blame] | 58 | ret void |
| 59 | } |