| Daniel Dunbar | d8d36e6 | 2010-08-27 01:30:14 +0000 | [diff] [blame] | 1 | ; RUN: llc -O0 --show-mc-encoding < %s | FileCheck %s |
| 2 | |
| 3 | target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" |
| 4 | target triple = "x86_64-apple-darwin10.0.0" |
| 5 | |
| Eli Friedman | fc430a6 | 2011-08-09 22:17:39 +0000 | [diff] [blame] | 6 | ; CHECK: f1: |
| 7 | ; CHECK: addq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x01,0x37] |
| Daniel Dunbar | d8d36e6 | 2010-08-27 01:30:14 +0000 | [diff] [blame] | 8 | ; CHECK: ret |
| Eli Friedman | fc430a6 | 2011-08-09 22:17:39 +0000 | [diff] [blame] | 9 | define void @f1(i64* %a, i64 %b) nounwind { |
| 10 | call i64 @llvm.atomic.load.add.i64.p0i64(i64* %a, i64 %b) nounwind |
| Daniel Dunbar | d8d36e6 | 2010-08-27 01:30:14 +0000 | [diff] [blame] | 11 | ret void |
| 12 | } |
| 13 | |
| Daniel Dunbar | d8d36e6 | 2010-08-27 01:30:14 +0000 | [diff] [blame] | 14 | declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind |
| Eli Friedman | fc430a6 | 2011-08-09 22:17:39 +0000 | [diff] [blame] | 15 | |
| 16 | ; CHECK: f2: |
| 17 | ; CHECK: subq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x29,0x37] |
| 18 | ; CHECK: ret |
| 19 | define void @f2(i64* %a, i64 %b) nounwind { |
| 20 | call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %a, i64 %b) nounwind |
| 21 | ret void |
| 22 | } |
| 23 | |
| 24 | declare i64 @llvm.atomic.load.sub.i64.p0i64(i64* nocapture, i64) nounwind |
| 25 | |
| 26 | ; CHECK: f3: |
| 27 | ; CHECK: andq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x21,0x37] |
| 28 | ; CHECK: ret |
| 29 | define void @f3(i64* %a, i64 %b) nounwind { |
| 30 | call i64 @llvm.atomic.load.and.i64.p0i64(i64* %a, i64 %b) nounwind |
| 31 | ret void |
| 32 | } |
| 33 | |
| 34 | declare i64 @llvm.atomic.load.and.i64.p0i64(i64* nocapture, i64) nounwind |
| 35 | |
| 36 | ; CHECK: f4: |
| 37 | ; CHECK: orq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x09,0x37] |
| 38 | ; CHECK: ret |
| 39 | define void @f4(i64* %a, i64 %b) nounwind { |
| 40 | call i64 @llvm.atomic.load.or.i64.p0i64(i64* %a, i64 %b) nounwind |
| 41 | ret void |
| 42 | } |
| 43 | |
| 44 | declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind |
| 45 | |
| 46 | ; CHECK: f5: |
| 47 | ; CHECK: xorq %{{.*}}, ({{.*}}){{.*}}encoding: [0xf0,0x48,0x31,0x37] |
| 48 | ; CHECK: ret |
| 49 | define void @f5(i64* %a, i64 %b) nounwind { |
| 50 | call i64 @llvm.atomic.load.xor.i64.p0i64(i64* %a, i64 %b) nounwind |
| 51 | ret void |
| 52 | } |
| 53 | |
| 54 | declare i64 @llvm.atomic.load.xor.i64.p0i64(i64* nocapture, i64) nounwind |