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Dan Gohmand3ead432008-09-17 00:43:24 +00001//===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This is an extremely simple MachineInstr-level dead-code-elimination pass.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/Passes.h"
Chandler Carruthd04a8d42012-12-03 16:50:05 +000015#include "llvm/ADT/Statistic.h"
Dan Gohmand3ead432008-09-17 00:43:24 +000016#include "llvm/CodeGen/MachineFunctionPass.h"
17#include "llvm/CodeGen/MachineRegisterInfo.h"
Chandler Carruthd04a8d42012-12-03 16:50:05 +000018#include "llvm/Pass.h"
Dan Gohman723ac372008-09-25 01:06:50 +000019#include "llvm/Support/Debug.h"
Bill Wendling9311a222009-08-22 20:04:03 +000020#include "llvm/Support/raw_ostream.h"
Dan Gohmand3ead432008-09-17 00:43:24 +000021#include "llvm/Target/TargetInstrInfo.h"
Stephen Hines37ed9c12014-12-01 14:51:49 -080022#include "llvm/Target/TargetSubtargetInfo.h"
23
Dan Gohmand3ead432008-09-17 00:43:24 +000024using namespace llvm;
25
Stephen Hinesdce4a402014-05-29 02:49:00 -070026#define DEBUG_TYPE "codegen-dce"
27
Evan Cheng00a99a32010-02-06 09:07:11 +000028STATISTIC(NumDeletes, "Number of dead instructions deleted");
29
Dan Gohmand3ead432008-09-17 00:43:24 +000030namespace {
Nick Lewycky6726b6d2009-10-25 06:33:48 +000031 class DeadMachineInstructionElim : public MachineFunctionPass {
Stephen Hines36b56882014-04-23 16:57:46 -070032 bool runOnMachineFunction(MachineFunction &MF) override;
Andrew Trick1df91b02012-02-08 21:22:43 +000033
Dan Gohman3d84a762008-09-24 00:27:38 +000034 const TargetRegisterInfo *TRI;
35 const MachineRegisterInfo *MRI;
36 const TargetInstrInfo *TII;
37 BitVector LivePhysRegs;
38
Dan Gohmand3ead432008-09-17 00:43:24 +000039 public:
40 static char ID; // Pass identification, replacement for typeid
Owen Anderson081c34b2010-10-19 17:21:58 +000041 DeadMachineInstructionElim() : MachineFunctionPass(ID) {
42 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
43 }
Dan Gohman3d84a762008-09-24 00:27:38 +000044
45 private:
Dan Gohmand443ee62009-08-11 15:13:43 +000046 bool isDead(const MachineInstr *MI) const;
Dan Gohmand3ead432008-09-17 00:43:24 +000047 };
48}
49char DeadMachineInstructionElim::ID = 0;
Andrew Trick1dd8c852012-02-08 21:23:13 +000050char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
Dan Gohmand3ead432008-09-17 00:43:24 +000051
Owen Andersond13db2c2010-07-21 22:09:45 +000052INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
Owen Andersonce665bd2010-10-07 22:25:06 +000053 "Remove dead machine instructions", false, false)
Dan Gohmand3ead432008-09-17 00:43:24 +000054
Dan Gohmand443ee62009-08-11 15:13:43 +000055bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
Evan Chengc36b7062011-01-07 23:50:32 +000056 // Technically speaking inline asm without side effects and no defs can still
57 // be deleted. But there is so much bad inline asm code out there, we should
58 // let them be.
59 if (MI->isInlineAsm())
60 return false;
61
Dan Gohman3d84a762008-09-24 00:27:38 +000062 // Don't delete instructions with side effects.
63 bool SawStore = false;
Stephen Hinesdce4a402014-05-29 02:49:00 -070064 if (!MI->isSafeToMove(TII, nullptr, SawStore) && !MI->isPHI())
Dan Gohman3d84a762008-09-24 00:27:38 +000065 return false;
66
67 // Examine each operand.
68 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
69 const MachineOperand &MO = MI->getOperand(i);
Dan Gohmand735b802008-10-03 15:45:36 +000070 if (MO.isReg() && MO.isDef()) {
Dan Gohman3d84a762008-09-24 00:27:38 +000071 unsigned Reg = MO.getReg();
Jakob Stoklund Olesen39284d12012-02-09 00:15:39 +000072 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
73 // Don't delete live physreg defs, or any reserved register defs.
Jakob Stoklund Olesenfb9ebbf2012-10-15 21:57:41 +000074 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
Jakob Stoklund Olesen39284d12012-02-09 00:15:39 +000075 return false;
76 } else {
77 if (!MRI->use_nodbg_empty(Reg))
78 // This def has a non-debug use. Don't delete the instruction!
79 return false;
Dan Gohman3d84a762008-09-24 00:27:38 +000080 }
81 }
82 }
83
84 // If there are no defs with uses, the instruction is dead.
85 return true;
86}
87
Dan Gohmand3ead432008-09-17 00:43:24 +000088bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
Stephen Hines36b56882014-04-23 16:57:46 -070089 if (skipOptnoneFunction(*MF.getFunction()))
90 return false;
91
Dan Gohmand3ead432008-09-17 00:43:24 +000092 bool AnyChanges = false;
Dan Gohman3d84a762008-09-24 00:27:38 +000093 MRI = &MF.getRegInfo();
Stephen Hines37ed9c12014-12-01 14:51:49 -080094 TRI = MF.getSubtarget().getRegisterInfo();
95 TII = MF.getSubtarget().getInstrInfo();
Dan Gohmand3ead432008-09-17 00:43:24 +000096
97 // Loop over all instructions in all blocks, from bottom to top, so that it's
98 // more likely that chains of dependent but ultimately dead instructions will
99 // be cleaned up.
100 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
101 I != E; ++I) {
102 MachineBasicBlock *MBB = &*I;
Dan Gohman8468d1a2008-09-23 21:40:44 +0000103
Jakob Stoklund Olesenf14a6482010-08-31 21:51:05 +0000104 // Start out assuming that reserved registers are live out of this block.
Jakob Stoklund Olesenfb9ebbf2012-10-15 21:57:41 +0000105 LivePhysRegs = MRI->getReservedRegs();
Dan Gohman8468d1a2008-09-23 21:40:44 +0000106
Jakob Stoklund Olesenf27229e2011-06-27 15:00:36 +0000107 // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
108 // live across blocks, but some targets (x86) can have flags live out of a
109 // block.
110 for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
111 E = MBB->succ_end(); S != E; S++)
112 for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
113 LI != (*S)->livein_end(); LI++)
114 LivePhysRegs.set(*LI);
Jakob Stoklund Olesenf14a6482010-08-31 21:51:05 +0000115
Dan Gohman8468d1a2008-09-23 21:40:44 +0000116 // Now scan the instructions and delete dead ones, tracking physreg
117 // liveness as we go.
Dan Gohmand3ead432008-09-17 00:43:24 +0000118 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
119 MIE = MBB->rend(); MII != MIE; ) {
120 MachineInstr *MI = &*MII;
121
Dan Gohman3d84a762008-09-24 00:27:38 +0000122 // If the instruction is dead, delete it!
123 if (isDead(MI)) {
David Greene26045e22010-01-04 19:10:20 +0000124 DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
Dale Johannesen2d1ec732010-02-12 18:40:17 +0000125 // It is possible that some DBG_VALUE instructions refer to this
Stephen Hines37ed9c12014-12-01 14:51:49 -0800126 // instruction. They get marked as undef and will be deleted
127 // in the live debug variable analysis.
128 MI->eraseFromParentAndMarkDBGValuesForRemoval();
Dan Gohman3d84a762008-09-24 00:27:38 +0000129 AnyChanges = true;
Evan Cheng00a99a32010-02-06 09:07:11 +0000130 ++NumDeletes;
Dan Gohman3d84a762008-09-24 00:27:38 +0000131 MIE = MBB->rend();
132 // MII is now pointing to the next instruction to process,
133 // so don't increment it.
134 continue;
Dan Gohmand3ead432008-09-17 00:43:24 +0000135 }
Dan Gohman8468d1a2008-09-23 21:40:44 +0000136
137 // Record the physreg defs.
138 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
139 const MachineOperand &MO = MI->getOperand(i);
Dan Gohmand735b802008-10-03 15:45:36 +0000140 if (MO.isReg() && MO.isDef()) {
Dan Gohman8468d1a2008-09-23 21:40:44 +0000141 unsigned Reg = MO.getReg();
Jakob Stoklund Olesenc9df0252011-01-10 02:58:51 +0000142 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
Dan Gohmanb382c4d2008-10-16 00:11:23 +0000143 // Check the subreg set, not the alias set, because a def
144 // of a super-register may still be partially live after
145 // this def.
Chad Rosier62c320a2013-05-22 23:17:36 +0000146 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
147 SR.isValid(); ++SR)
Jakob Stoklund Olesen396618b2012-06-01 23:28:30 +0000148 LivePhysRegs.reset(*SR);
Dan Gohman8468d1a2008-09-23 21:40:44 +0000149 }
Jakob Stoklund Olesen6b88c182012-01-20 22:27:09 +0000150 } else if (MO.isRegMask()) {
151 // Register mask of preserved registers. All clobbers are dead.
Jakob Stoklund Olesen478a8a02012-02-02 23:52:57 +0000152 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
Dan Gohman8468d1a2008-09-23 21:40:44 +0000153 }
154 }
155 // Record the physreg uses, after the defs, in case a physreg is
156 // both defined and used in the same instruction.
157 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
158 const MachineOperand &MO = MI->getOperand(i);
Dan Gohmand735b802008-10-03 15:45:36 +0000159 if (MO.isReg() && MO.isUse()) {
Dan Gohman8468d1a2008-09-23 21:40:44 +0000160 unsigned Reg = MO.getReg();
Jakob Stoklund Olesenc9df0252011-01-10 02:58:51 +0000161 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
Jakob Stoklund Olesenf152fe82012-06-01 20:36:54 +0000162 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
163 LivePhysRegs.set(*AI);
Dan Gohman8468d1a2008-09-23 21:40:44 +0000164 }
165 }
166 }
167
Dan Gohmand3ead432008-09-17 00:43:24 +0000168 // We didn't delete the current instruction, so increment MII to
169 // the next one.
170 ++MII;
171 }
172 }
173
Dan Gohman3d84a762008-09-24 00:27:38 +0000174 LivePhysRegs.clear();
Dan Gohmand3ead432008-09-17 00:43:24 +0000175 return AnyChanges;
176}