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Wesley Pecka70f28c2010-02-23 19:15:24 +00001//===- MBlazeSubtarget.cpp - MBlaze Subtarget Information -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
Evan Cheng5b1b44892011-07-01 21:01:15 +000010// This file implements the MBlaze specific subclass of TargetSubtargetInfo.
Wesley Pecka70f28c2010-02-23 19:15:24 +000011//
12//===----------------------------------------------------------------------===//
13
14#include "MBlazeSubtarget.h"
15#include "MBlaze.h"
Wesley Peck3d820ba2011-04-11 22:31:52 +000016#include "MBlazeRegisterInfo.h"
Wesley Pecka70f28c2010-02-23 19:15:24 +000017#include "llvm/Support/CommandLine.h"
Evan Cheng94214702011-07-01 20:45:01 +000018
19#define GET_SUBTARGETINFO_CTOR
20#define GET_SUBTARGETINFO_MC_DESC
21#define GET_SUBTARGETINFO_TARGET_DESC
22#include "MBlazeGenSubtarget.inc"
23
Wesley Pecka70f28c2010-02-23 19:15:24 +000024using namespace llvm;
25
Evan Cheng276365d2011-06-30 01:53:36 +000026MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
27 const std::string &CPU,
28 const std::string &FS):
Evan Cheng94214702011-07-01 20:45:01 +000029 MBlazeGenSubtargetInfo(),
Wesley Peck3d820ba2011-04-11 22:31:52 +000030 HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
31 HasFPU(false), HasMul64(false), HasSqrt(false)
Wesley Pecka70f28c2010-02-23 19:15:24 +000032{
Wesley Pecka70f28c2010-02-23 19:15:24 +000033 // Parse features string.
Evan Cheng276365d2011-06-30 01:53:36 +000034 std::string CPUName = CPU;
35 if (CPUName.empty())
36 CPUName = "mblaze";
37 ParseSubtargetFeatures(FS, CPUName);
Wesley Peck3d820ba2011-04-11 22:31:52 +000038
39 // Only use instruction scheduling if the selected CPU has an instruction
40 // itinerary (the default CPU is the only one that doesn't).
Evan Cheng276365d2011-06-30 01:53:36 +000041 HasItin = CPUName != "mblaze";
42 DEBUG(dbgs() << "CPU " << CPUName << "(" << HasItin << ")\n");
Wesley Peck3d820ba2011-04-11 22:31:52 +000043
Evan Cheng94214702011-07-01 20:45:01 +000044 // Initialize scheduling itinerary for the specified CPU.
45 InstrItins = getInstrItineraryForCPU(CPUName);
46
Wesley Peck3d820ba2011-04-11 22:31:52 +000047 // Compute the issue width of the MBlaze itineraries
48 computeIssueWidth();
Wesley Pecka70f28c2010-02-23 19:15:24 +000049}
Wesley Peck3d820ba2011-04-11 22:31:52 +000050
51void MBlazeSubtarget::computeIssueWidth() {
52 InstrItins.IssueWidth = 1;
53}
54
55bool MBlazeSubtarget::
56enablePostRAScheduler(CodeGenOpt::Level OptLevel,
Evan Cheng5b1b44892011-07-01 21:01:15 +000057 TargetSubtargetInfo::AntiDepBreakMode& Mode,
Wesley Peck3d820ba2011-04-11 22:31:52 +000058 RegClassVector& CriticalPathRCs) const {
Evan Cheng5b1b44892011-07-01 21:01:15 +000059 Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
Wesley Peck3d820ba2011-04-11 22:31:52 +000060 CriticalPathRCs.clear();
61 CriticalPathRCs.push_back(&MBlaze::GPRRegClass);
62 return HasItin && OptLevel >= CodeGenOpt::Default;
63}
64