Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 1 | //===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the pass that transforms the X86 machine instructions into |
| 11 | // relocatable machine code. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #define DEBUG_TYPE "x86-emitter" |
| 16 | #include "X86InstrInfo.h" |
| 17 | #include "X86Subtarget.h" |
| 18 | #include "X86TargetMachine.h" |
| 19 | #include "X86Relocations.h" |
| 20 | #include "X86.h" |
| 21 | #include "llvm/PassManager.h" |
| 22 | #include "llvm/CodeGen/MachineCodeEmitter.h" |
| 23 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 24 | #include "llvm/CodeGen/MachineInstr.h" |
| 25 | #include "llvm/CodeGen/Passes.h" |
| 26 | #include "llvm/Function.h" |
| 27 | #include "llvm/ADT/Statistic.h" |
| 28 | #include "llvm/Support/Compiler.h" |
| 29 | #include "llvm/Target/TargetOptions.h" |
| 30 | using namespace llvm; |
| 31 | |
| 32 | STATISTIC(NumEmitted, "Number of machine instructions emitted"); |
| 33 | |
| 34 | namespace { |
| 35 | class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass { |
| 36 | const X86InstrInfo *II; |
| 37 | const TargetData *TD; |
| 38 | TargetMachine &TM; |
| 39 | MachineCodeEmitter &MCE; |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 40 | intptr_t PICBase; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 41 | bool Is64BitMode; |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 42 | bool IsPIC; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 43 | public: |
| 44 | static char ID; |
| 45 | explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce) |
| 46 | : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm), |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 47 | MCE(mce), PICBase(0), Is64BitMode(false), |
| 48 | IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 49 | Emitter(TargetMachine &tm, MachineCodeEmitter &mce, |
| 50 | const X86InstrInfo &ii, const TargetData &td, bool is64) |
| 51 | : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm), |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 52 | MCE(mce), PICBase(0), Is64BitMode(is64), |
| 53 | IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 54 | |
| 55 | bool runOnMachineFunction(MachineFunction &MF); |
| 56 | |
| 57 | virtual const char *getPassName() const { |
| 58 | return "X86 Machine Code Emitter"; |
| 59 | } |
| 60 | |
| 61 | void emitInstruction(const MachineInstr &MI); |
| 62 | |
| 63 | private: |
| 64 | void emitPCRelativeBlockAddress(MachineBasicBlock *MBB); |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 65 | void emitGlobalAddress(GlobalValue *GV, unsigned Reloc, |
| 66 | int Disp = 0, intptr_t PCAdj = 0, |
| 67 | bool DoesntNeedStub = false, bool isPIC = false); |
| 68 | void emitExternalSymbolAddress(const char *ES, unsigned Reloc, |
| 69 | bool isPIC = false); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 70 | void emitConstPoolAddress(unsigned CPI, unsigned Reloc, int Disp = 0, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 71 | intptr_t PCAdj = 0, bool isPIC = false); |
| 72 | void emitJumpTableAddress(unsigned JTI, unsigned Reloc, |
| 73 | intptr_t PCAdj = 0, bool isPIC = false); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 74 | |
| 75 | void emitDisplacementField(const MachineOperand *RelocOp, int DispVal, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 76 | intptr_t PCAdj = 0); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 77 | |
| 78 | void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField); |
| 79 | void emitSIBByte(unsigned SS, unsigned Index, unsigned Base); |
| 80 | void emitConstant(uint64_t Val, unsigned Size); |
| 81 | |
| 82 | void emitMemModRMByte(const MachineInstr &MI, |
| 83 | unsigned Op, unsigned RegOpcodeField, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 84 | intptr_t PCAdj = 0); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 85 | |
| 86 | unsigned getX86RegNum(unsigned RegNo); |
| 87 | bool isX86_64ExtendedReg(const MachineOperand &MO); |
| 88 | unsigned determineREX(const MachineInstr &MI); |
| 89 | }; |
| 90 | char Emitter::ID = 0; |
| 91 | } |
| 92 | |
| 93 | /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code |
| 94 | /// to the specified MCE object. |
| 95 | FunctionPass *llvm::createX86CodeEmitterPass(X86TargetMachine &TM, |
| 96 | MachineCodeEmitter &MCE) { |
| 97 | return new Emitter(TM, MCE); |
| 98 | } |
| 99 | |
| 100 | bool Emitter::runOnMachineFunction(MachineFunction &MF) { |
| 101 | assert((MF.getTarget().getRelocationModel() != Reloc::Default || |
| 102 | MF.getTarget().getRelocationModel() != Reloc::Static) && |
| 103 | "JIT relocation model must be set to static or default!"); |
| 104 | II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo(); |
| 105 | TD = ((X86TargetMachine&)MF.getTarget()).getTargetData(); |
| 106 | Is64BitMode = |
| 107 | ((X86TargetMachine&)MF.getTarget()).getSubtarget<X86Subtarget>().is64Bit(); |
| 108 | |
| 109 | do { |
| 110 | MCE.startFunction(MF); |
| 111 | for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); |
| 112 | MBB != E; ++MBB) { |
| 113 | MCE.StartMachineBasicBlock(MBB); |
| 114 | for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end(); |
| 115 | I != E; ++I) |
| 116 | emitInstruction(*I); |
| 117 | } |
| 118 | } while (MCE.finishFunction(MF)); |
| 119 | |
| 120 | return false; |
| 121 | } |
| 122 | |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 123 | /// emitPCRelativeBlockAddress - This method keeps track of the information |
| 124 | /// necessary to resolve the address of this block later and emits a dummy |
| 125 | /// value. |
| 126 | /// |
| 127 | void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) { |
| 128 | // Remember where this reference was and where it is to so we can |
| 129 | // deal with it later. |
| 130 | MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), |
| 131 | X86::reloc_pcrel_word, MBB)); |
| 132 | MCE.emitWordLE(0); |
| 133 | } |
| 134 | |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 135 | /// emitGlobalAddress - Emit the specified address to the code stream assuming |
| 136 | /// this is part of a "take the address of a global" instruction. |
| 137 | /// |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 138 | void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc, |
| 139 | int Disp /* = 0 */, intptr_t PCAdj /* = 0 */, |
| 140 | bool DoesntNeedStub /* = false */, |
| 141 | bool isPIC /* = false */) { |
| 142 | if (isPIC) |
| 143 | PCAdj += PICBase; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 144 | MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 145 | GV, PCAdj, DoesntNeedStub)); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 146 | if (Reloc == X86::reloc_absolute_dword) |
| 147 | MCE.emitWordLE(0); |
| 148 | MCE.emitWordLE(Disp); // The relocated value will be added to the displacement |
| 149 | } |
| 150 | |
| 151 | /// emitExternalSymbolAddress - Arrange for the address of an external symbol to |
| 152 | /// be emitted to the current location in the function, and allow it to be PC |
| 153 | /// relative. |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 154 | void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc, |
| 155 | bool isPIC /* = false */) { |
| 156 | intptr_t PCAdj = isPIC ? PICBase : 0; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 157 | MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 158 | Reloc, ES, PCAdj)); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 159 | if (Reloc == X86::reloc_absolute_dword) |
| 160 | MCE.emitWordLE(0); |
| 161 | MCE.emitWordLE(0); |
| 162 | } |
| 163 | |
| 164 | /// emitConstPoolAddress - Arrange for the address of an constant pool |
| 165 | /// to be emitted to the current location in the function, and allow it to be PC |
| 166 | /// relative. |
| 167 | void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc, |
| 168 | int Disp /* = 0 */, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 169 | intptr_t PCAdj /* = 0 */, |
| 170 | bool isPIC /* = false */) { |
| 171 | if (isPIC) |
| 172 | PCAdj += PICBase; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 173 | MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), |
| 174 | Reloc, CPI, PCAdj)); |
| 175 | if (Reloc == X86::reloc_absolute_dword) |
| 176 | MCE.emitWordLE(0); |
| 177 | MCE.emitWordLE(Disp); // The relocated value will be added to the displacement |
| 178 | } |
| 179 | |
| 180 | /// emitJumpTableAddress - Arrange for the address of a jump table to |
| 181 | /// be emitted to the current location in the function, and allow it to be PC |
| 182 | /// relative. |
| 183 | void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 184 | intptr_t PCAdj /* = 0 */, |
| 185 | bool isPIC /* = false */) { |
| 186 | if (isPIC) |
| 187 | PCAdj += PICBase; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 188 | MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), |
| 189 | Reloc, JTI, PCAdj)); |
| 190 | if (Reloc == X86::reloc_absolute_dword) |
| 191 | MCE.emitWordLE(0); |
| 192 | MCE.emitWordLE(0); // The relocated value will be added to the displacement |
| 193 | } |
| 194 | |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 195 | unsigned Emitter::getX86RegNum(unsigned RegNo) { |
Duncan Sands | 466eadd | 2007-08-29 19:01:20 +0000 | [diff] [blame] | 196 | return ((X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 197 | } |
| 198 | |
| 199 | inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode, |
| 200 | unsigned RM) { |
| 201 | assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!"); |
| 202 | return RM | (RegOpcode << 3) | (Mod << 6); |
| 203 | } |
| 204 | |
| 205 | void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){ |
| 206 | MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg))); |
| 207 | } |
| 208 | |
| 209 | void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) { |
| 210 | // SIB byte is in the same format as the ModRMByte... |
| 211 | MCE.emitByte(ModRMByte(SS, Index, Base)); |
| 212 | } |
| 213 | |
| 214 | void Emitter::emitConstant(uint64_t Val, unsigned Size) { |
| 215 | // Output the constant in little endian byte order... |
| 216 | for (unsigned i = 0; i != Size; ++i) { |
| 217 | MCE.emitByte(Val & 255); |
| 218 | Val >>= 8; |
| 219 | } |
| 220 | } |
| 221 | |
| 222 | /// isDisp8 - Return true if this signed displacement fits in a 8-bit |
| 223 | /// sign-extended field. |
| 224 | static bool isDisp8(int Value) { |
| 225 | return Value == (signed char)Value; |
| 226 | } |
| 227 | |
| 228 | void Emitter::emitDisplacementField(const MachineOperand *RelocOp, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 229 | int DispVal, intptr_t PCAdj) { |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 230 | // If this is a simple integer displacement that doesn't require a relocation, |
| 231 | // emit it now. |
| 232 | if (!RelocOp) { |
| 233 | emitConstant(DispVal, 4); |
| 234 | return; |
| 235 | } |
| 236 | |
| 237 | // Otherwise, this is something that requires a relocation. Emit it as such |
| 238 | // now. |
| 239 | if (RelocOp->isGlobalAddress()) { |
| 240 | // In 64-bit static small code model, we could potentially emit absolute. |
| 241 | // But it's probably not beneficial. |
| 242 | // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative |
| 243 | // 89 04 25 00 00 00 00 mov %eax,0x0 # Absolute |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 244 | unsigned rt= Is64BitMode ? X86::reloc_pcrel_word |
| 245 | : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); |
| 246 | emitGlobalAddress(RelocOp->getGlobal(), rt, RelocOp->getOffset(), |
| 247 | PCAdj, false, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 248 | } else if (RelocOp->isConstantPoolIndex()) { |
| 249 | // Must be in 64-bit mode. |
| 250 | emitConstPoolAddress(RelocOp->getConstantPoolIndex(), X86::reloc_pcrel_word, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 251 | RelocOp->getOffset(), PCAdj, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 252 | } else if (RelocOp->isJumpTableIndex()) { |
| 253 | // Must be in 64-bit mode. |
| 254 | emitJumpTableAddress(RelocOp->getJumpTableIndex(), X86::reloc_pcrel_word, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 255 | PCAdj, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 256 | } else { |
| 257 | assert(0 && "Unknown value to relocate!"); |
| 258 | } |
| 259 | } |
| 260 | |
| 261 | void Emitter::emitMemModRMByte(const MachineInstr &MI, |
| 262 | unsigned Op, unsigned RegOpcodeField, |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 263 | intptr_t PCAdj) { |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 264 | const MachineOperand &Op3 = MI.getOperand(Op+3); |
| 265 | int DispVal = 0; |
| 266 | const MachineOperand *DispForReloc = 0; |
| 267 | |
| 268 | // Figure out what sort of displacement we have to handle here. |
| 269 | if (Op3.isGlobalAddress()) { |
| 270 | DispForReloc = &Op3; |
| 271 | } else if (Op3.isConstantPoolIndex()) { |
| 272 | if (Is64BitMode) { |
| 273 | DispForReloc = &Op3; |
| 274 | } else { |
| 275 | DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex()); |
| 276 | DispVal += Op3.getOffset(); |
| 277 | } |
| 278 | } else if (Op3.isJumpTableIndex()) { |
| 279 | if (Is64BitMode) { |
| 280 | DispForReloc = &Op3; |
| 281 | } else { |
| 282 | DispVal += MCE.getJumpTableEntryAddress(Op3.getJumpTableIndex()); |
| 283 | } |
| 284 | } else { |
| 285 | DispVal = Op3.getImm(); |
| 286 | } |
| 287 | |
| 288 | const MachineOperand &Base = MI.getOperand(Op); |
| 289 | const MachineOperand &Scale = MI.getOperand(Op+1); |
| 290 | const MachineOperand &IndexReg = MI.getOperand(Op+2); |
| 291 | |
| 292 | unsigned BaseReg = Base.getReg(); |
| 293 | |
| 294 | // Is a SIB byte needed? |
| 295 | if (IndexReg.getReg() == 0 && |
| 296 | (BaseReg == 0 || getX86RegNum(BaseReg) != N86::ESP)) { |
| 297 | if (BaseReg == 0) { // Just a displacement? |
| 298 | // Emit special case [disp32] encoding |
| 299 | MCE.emitByte(ModRMByte(0, RegOpcodeField, 5)); |
| 300 | |
| 301 | emitDisplacementField(DispForReloc, DispVal, PCAdj); |
| 302 | } else { |
| 303 | unsigned BaseRegNo = getX86RegNum(BaseReg); |
| 304 | if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) { |
| 305 | // Emit simple indirect register encoding... [EAX] f.e. |
| 306 | MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo)); |
| 307 | } else if (!DispForReloc && isDisp8(DispVal)) { |
| 308 | // Emit the disp8 encoding... [REG+disp8] |
| 309 | MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo)); |
| 310 | emitConstant(DispVal, 1); |
| 311 | } else { |
| 312 | // Emit the most general non-SIB encoding: [REG+disp32] |
| 313 | MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo)); |
| 314 | emitDisplacementField(DispForReloc, DispVal, PCAdj); |
| 315 | } |
| 316 | } |
| 317 | |
| 318 | } else { // We need a SIB byte, so start by outputting the ModR/M byte first |
| 319 | assert(IndexReg.getReg() != X86::ESP && |
| 320 | IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!"); |
| 321 | |
| 322 | bool ForceDisp32 = false; |
| 323 | bool ForceDisp8 = false; |
| 324 | if (BaseReg == 0) { |
| 325 | // If there is no base register, we emit the special case SIB byte with |
| 326 | // MOD=0, BASE=5, to JUST get the index, scale, and displacement. |
| 327 | MCE.emitByte(ModRMByte(0, RegOpcodeField, 4)); |
| 328 | ForceDisp32 = true; |
| 329 | } else if (DispForReloc) { |
| 330 | // Emit the normal disp32 encoding. |
| 331 | MCE.emitByte(ModRMByte(2, RegOpcodeField, 4)); |
| 332 | ForceDisp32 = true; |
| 333 | } else if (DispVal == 0 && getX86RegNum(BaseReg) != N86::EBP) { |
| 334 | // Emit no displacement ModR/M byte |
| 335 | MCE.emitByte(ModRMByte(0, RegOpcodeField, 4)); |
| 336 | } else if (isDisp8(DispVal)) { |
| 337 | // Emit the disp8 encoding... |
| 338 | MCE.emitByte(ModRMByte(1, RegOpcodeField, 4)); |
| 339 | ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP |
| 340 | } else { |
| 341 | // Emit the normal disp32 encoding... |
| 342 | MCE.emitByte(ModRMByte(2, RegOpcodeField, 4)); |
| 343 | } |
| 344 | |
| 345 | // Calculate what the SS field value should be... |
| 346 | static const unsigned SSTable[] = { ~0, 0, 1, ~0, 2, ~0, ~0, ~0, 3 }; |
| 347 | unsigned SS = SSTable[Scale.getImm()]; |
| 348 | |
| 349 | if (BaseReg == 0) { |
| 350 | // Handle the SIB byte for the case where there is no base. The |
| 351 | // displacement has already been output. |
| 352 | assert(IndexReg.getReg() && "Index register must be specified!"); |
| 353 | emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5); |
| 354 | } else { |
| 355 | unsigned BaseRegNo = getX86RegNum(BaseReg); |
| 356 | unsigned IndexRegNo; |
| 357 | if (IndexReg.getReg()) |
| 358 | IndexRegNo = getX86RegNum(IndexReg.getReg()); |
| 359 | else |
| 360 | IndexRegNo = 4; // For example [ESP+1*<noreg>+4] |
| 361 | emitSIBByte(SS, IndexRegNo, BaseRegNo); |
| 362 | } |
| 363 | |
| 364 | // Do we need to output a displacement? |
| 365 | if (ForceDisp8) { |
| 366 | emitConstant(DispVal, 1); |
| 367 | } else if (DispVal != 0 || ForceDisp32) { |
| 368 | emitDisplacementField(DispForReloc, DispVal, PCAdj); |
| 369 | } |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | static unsigned sizeOfImm(const TargetInstrDescriptor *Desc) { |
| 374 | switch (Desc->TSFlags & X86II::ImmMask) { |
| 375 | case X86II::Imm8: return 1; |
| 376 | case X86II::Imm16: return 2; |
| 377 | case X86II::Imm32: return 4; |
| 378 | case X86II::Imm64: return 8; |
| 379 | default: assert(0 && "Immediate size not set!"); |
| 380 | return 0; |
| 381 | } |
| 382 | } |
| 383 | |
| 384 | /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended register? |
| 385 | /// e.g. r8, xmm8, etc. |
| 386 | bool Emitter::isX86_64ExtendedReg(const MachineOperand &MO) { |
| 387 | if (!MO.isRegister()) return false; |
Evan Cheng | e21ff43 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 388 | switch (MO.getReg()) { |
| 389 | default: break; |
| 390 | case X86::R8: case X86::R9: case X86::R10: case X86::R11: |
| 391 | case X86::R12: case X86::R13: case X86::R14: case X86::R15: |
| 392 | case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D: |
| 393 | case X86::R12D: case X86::R13D: case X86::R14D: case X86::R15D: |
| 394 | case X86::R8W: case X86::R9W: case X86::R10W: case X86::R11W: |
| 395 | case X86::R12W: case X86::R13W: case X86::R14W: case X86::R15W: |
| 396 | case X86::R8B: case X86::R9B: case X86::R10B: case X86::R11B: |
| 397 | case X86::R12B: case X86::R13B: case X86::R14B: case X86::R15B: |
| 398 | case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11: |
| 399 | case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15: |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 400 | return true; |
Evan Cheng | e21ff43 | 2007-11-13 17:54:34 +0000 | [diff] [blame] | 401 | } |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 402 | return false; |
| 403 | } |
| 404 | |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 405 | inline static bool isX86_64NonExtLowByteReg(unsigned reg) { |
| 406 | return (reg == X86::SPL || reg == X86::BPL || |
| 407 | reg == X86::SIL || reg == X86::DIL); |
| 408 | } |
| 409 | |
| 410 | /// determineREX - Determine if the MachineInstr has to be encoded with a X86-64 |
| 411 | /// REX prefix which specifies 1) 64-bit instructions, 2) non-default operand |
| 412 | /// size, and 3) use of X86-64 extended registers. |
| 413 | unsigned Emitter::determineREX(const MachineInstr &MI) { |
| 414 | unsigned REX = 0; |
| 415 | const TargetInstrDescriptor *Desc = MI.getInstrDescriptor(); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 416 | |
| 417 | // Pseudo instructions do not need REX prefix byte. |
| 418 | if ((Desc->TSFlags & X86II::FormMask) == X86II::Pseudo) |
| 419 | return 0; |
| 420 | if (Desc->TSFlags & X86II::REX_W) |
| 421 | REX |= 1 << 3; |
| 422 | |
| 423 | unsigned NumOps = Desc->numOperands; |
| 424 | if (NumOps) { |
| 425 | bool isTwoAddr = NumOps > 1 && |
| 426 | Desc->getOperandConstraint(1, TOI::TIED_TO) != -1; |
| 427 | |
| 428 | // If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX prefix. |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 429 | unsigned i = isTwoAddr ? 1 : 0; |
| 430 | for (unsigned e = NumOps; i != e; ++i) { |
| 431 | const MachineOperand& MO = MI.getOperand(i); |
| 432 | if (MO.isRegister()) { |
| 433 | unsigned Reg = MO.getReg(); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 434 | if (isX86_64NonExtLowByteReg(Reg)) |
| 435 | REX |= 0x40; |
| 436 | } |
| 437 | } |
| 438 | |
| 439 | switch (Desc->TSFlags & X86II::FormMask) { |
| 440 | case X86II::MRMInitReg: |
| 441 | if (isX86_64ExtendedReg(MI.getOperand(0))) |
| 442 | REX |= (1 << 0) | (1 << 2); |
| 443 | break; |
| 444 | case X86II::MRMSrcReg: { |
| 445 | if (isX86_64ExtendedReg(MI.getOperand(0))) |
| 446 | REX |= 1 << 2; |
| 447 | i = isTwoAddr ? 2 : 1; |
| 448 | for (unsigned e = NumOps; i != e; ++i) { |
| 449 | const MachineOperand& MO = MI.getOperand(i); |
| 450 | if (isX86_64ExtendedReg(MO)) |
| 451 | REX |= 1 << 0; |
| 452 | } |
| 453 | break; |
| 454 | } |
| 455 | case X86II::MRMSrcMem: { |
| 456 | if (isX86_64ExtendedReg(MI.getOperand(0))) |
| 457 | REX |= 1 << 2; |
| 458 | unsigned Bit = 0; |
| 459 | i = isTwoAddr ? 2 : 1; |
| 460 | for (; i != NumOps; ++i) { |
| 461 | const MachineOperand& MO = MI.getOperand(i); |
| 462 | if (MO.isRegister()) { |
| 463 | if (isX86_64ExtendedReg(MO)) |
| 464 | REX |= 1 << Bit; |
| 465 | Bit++; |
| 466 | } |
| 467 | } |
| 468 | break; |
| 469 | } |
| 470 | case X86II::MRM0m: case X86II::MRM1m: |
| 471 | case X86II::MRM2m: case X86II::MRM3m: |
| 472 | case X86II::MRM4m: case X86II::MRM5m: |
| 473 | case X86II::MRM6m: case X86II::MRM7m: |
| 474 | case X86II::MRMDestMem: { |
| 475 | unsigned e = isTwoAddr ? 5 : 4; |
| 476 | i = isTwoAddr ? 1 : 0; |
| 477 | if (NumOps > e && isX86_64ExtendedReg(MI.getOperand(e))) |
| 478 | REX |= 1 << 2; |
| 479 | unsigned Bit = 0; |
| 480 | for (; i != e; ++i) { |
| 481 | const MachineOperand& MO = MI.getOperand(i); |
| 482 | if (MO.isRegister()) { |
| 483 | if (isX86_64ExtendedReg(MO)) |
| 484 | REX |= 1 << Bit; |
| 485 | Bit++; |
| 486 | } |
| 487 | } |
| 488 | break; |
| 489 | } |
| 490 | default: { |
| 491 | if (isX86_64ExtendedReg(MI.getOperand(0))) |
| 492 | REX |= 1 << 0; |
| 493 | i = isTwoAddr ? 2 : 1; |
| 494 | for (unsigned e = NumOps; i != e; ++i) { |
| 495 | const MachineOperand& MO = MI.getOperand(i); |
| 496 | if (isX86_64ExtendedReg(MO)) |
| 497 | REX |= 1 << 2; |
| 498 | } |
| 499 | break; |
| 500 | } |
| 501 | } |
| 502 | } |
| 503 | return REX; |
| 504 | } |
| 505 | |
| 506 | void Emitter::emitInstruction(const MachineInstr &MI) { |
| 507 | NumEmitted++; // Keep track of the # of mi's emitted |
| 508 | |
| 509 | const TargetInstrDescriptor *Desc = MI.getInstrDescriptor(); |
| 510 | unsigned Opcode = Desc->Opcode; |
| 511 | |
| 512 | // Emit the repeat opcode prefix as needed. |
| 513 | if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3); |
| 514 | |
| 515 | // Emit the operand size opcode prefix as needed. |
| 516 | if (Desc->TSFlags & X86II::OpSize) MCE.emitByte(0x66); |
| 517 | |
| 518 | // Emit the address size opcode prefix as needed. |
| 519 | if (Desc->TSFlags & X86II::AdSize) MCE.emitByte(0x67); |
| 520 | |
| 521 | bool Need0FPrefix = false; |
| 522 | switch (Desc->TSFlags & X86II::Op0Mask) { |
| 523 | case X86II::TB: |
| 524 | Need0FPrefix = true; // Two-byte opcode prefix |
| 525 | break; |
| 526 | case X86II::T8: |
| 527 | MCE.emitByte(0x0F); |
| 528 | MCE.emitByte(0x38); |
| 529 | break; |
| 530 | case X86II::TA: |
| 531 | MCE.emitByte(0x0F); |
| 532 | MCE.emitByte(0x3A); |
| 533 | break; |
| 534 | case X86II::REP: break; // already handled. |
| 535 | case X86II::XS: // F3 0F |
| 536 | MCE.emitByte(0xF3); |
| 537 | Need0FPrefix = true; |
| 538 | break; |
| 539 | case X86II::XD: // F2 0F |
| 540 | MCE.emitByte(0xF2); |
| 541 | Need0FPrefix = true; |
| 542 | break; |
| 543 | case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB: |
| 544 | case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF: |
| 545 | MCE.emitByte(0xD8+ |
| 546 | (((Desc->TSFlags & X86II::Op0Mask)-X86II::D8) |
| 547 | >> X86II::Op0Shift)); |
| 548 | break; // Two-byte opcode prefix |
| 549 | default: assert(0 && "Invalid prefix!"); |
| 550 | case 0: break; // No prefix! |
| 551 | } |
| 552 | |
| 553 | if (Is64BitMode) { |
| 554 | // REX prefix |
| 555 | unsigned REX = determineREX(MI); |
| 556 | if (REX) |
| 557 | MCE.emitByte(0x40 | REX); |
| 558 | } |
| 559 | |
| 560 | // 0x0F escape code must be emitted just before the opcode. |
| 561 | if (Need0FPrefix) |
| 562 | MCE.emitByte(0x0F); |
| 563 | |
| 564 | // If this is a two-address instruction, skip one of the register operands. |
| 565 | unsigned NumOps = Desc->numOperands; |
| 566 | unsigned CurOp = 0; |
| 567 | if (NumOps > 1 && Desc->getOperandConstraint(1, TOI::TIED_TO) != -1) |
| 568 | CurOp++; |
| 569 | |
| 570 | unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc); |
| 571 | switch (Desc->TSFlags & X86II::FormMask) { |
| 572 | default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!"); |
| 573 | case X86II::Pseudo: |
| 574 | #ifndef NDEBUG |
| 575 | switch (Opcode) { |
| 576 | default: |
| 577 | assert(0 && "psuedo instructions should be removed before code emission"); |
| 578 | case TargetInstrInfo::INLINEASM: |
| 579 | assert(0 && "JIT does not support inline asm!\n"); |
| 580 | case TargetInstrInfo::LABEL: |
| 581 | assert(0 && "JIT does not support meta labels!\n"); |
| 582 | case X86::IMPLICIT_USE: |
| 583 | case X86::IMPLICIT_DEF: |
| 584 | case X86::IMPLICIT_DEF_GR8: |
| 585 | case X86::IMPLICIT_DEF_GR16: |
| 586 | case X86::IMPLICIT_DEF_GR32: |
| 587 | case X86::IMPLICIT_DEF_GR64: |
| 588 | case X86::IMPLICIT_DEF_FR32: |
| 589 | case X86::IMPLICIT_DEF_FR64: |
| 590 | case X86::IMPLICIT_DEF_VR64: |
| 591 | case X86::IMPLICIT_DEF_VR128: |
| 592 | case X86::FP_REG_KILL: |
| 593 | break; |
| 594 | } |
| 595 | #endif |
| 596 | CurOp = NumOps; |
| 597 | break; |
| 598 | |
| 599 | case X86II::RawFrm: |
| 600 | MCE.emitByte(BaseOpcode); |
| 601 | if (CurOp != NumOps) { |
| 602 | const MachineOperand &MO = MI.getOperand(CurOp++); |
| 603 | if (MO.isMachineBasicBlock()) { |
| 604 | emitPCRelativeBlockAddress(MO.getMachineBasicBlock()); |
| 605 | } else if (MO.isGlobalAddress()) { |
| 606 | bool NeedStub = Is64BitMode || |
| 607 | Opcode == X86::TAILJMPd || |
| 608 | Opcode == X86::TAILJMPr || Opcode == X86::TAILJMPm; |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 609 | emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, |
| 610 | 0, 0, !NeedStub, false); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 611 | } else if (MO.isExternalSymbol()) { |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 612 | emitExternalSymbolAddress(MO.getSymbolName(), |
| 613 | X86::reloc_pcrel_word, false); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 614 | } else if (MO.isImmediate()) { |
| 615 | emitConstant(MO.getImm(), sizeOfImm(Desc)); |
| 616 | } else { |
| 617 | assert(0 && "Unknown RawFrm operand!"); |
| 618 | } |
| 619 | } |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 620 | |
| 621 | // Remember the current PC offset, this is the PIC relocation |
| 622 | // base address. |
| 623 | if (Opcode == X86::MovePCtoStack) |
| 624 | PICBase = MCE.getCurrentPCOffset(); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 625 | break; |
| 626 | |
| 627 | case X86II::AddRegFrm: |
| 628 | MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg())); |
| 629 | |
| 630 | if (CurOp != NumOps) { |
| 631 | const MachineOperand &MO1 = MI.getOperand(CurOp++); |
| 632 | unsigned Size = sizeOfImm(Desc); |
| 633 | if (MO1.isImmediate()) |
| 634 | emitConstant(MO1.getImm(), Size); |
| 635 | else { |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 636 | unsigned rt = Is64BitMode ? X86::reloc_pcrel_word |
| 637 | : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 638 | if (Opcode == X86::MOV64ri) |
| 639 | rt = X86::reloc_absolute_dword; // FIXME: add X86II flag? |
| 640 | if (MO1.isGlobalAddress()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 641 | emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), false, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 642 | else if (MO1.isExternalSymbol()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 643 | emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 644 | else if (MO1.isConstantPoolIndex()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 645 | emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 646 | else if (MO1.isJumpTableIndex()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 647 | emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 648 | } |
| 649 | } |
| 650 | break; |
| 651 | |
| 652 | case X86II::MRMDestReg: { |
| 653 | MCE.emitByte(BaseOpcode); |
| 654 | emitRegModRMByte(MI.getOperand(CurOp).getReg(), |
| 655 | getX86RegNum(MI.getOperand(CurOp+1).getReg())); |
| 656 | CurOp += 2; |
| 657 | if (CurOp != NumOps) |
| 658 | emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc)); |
| 659 | break; |
| 660 | } |
| 661 | case X86II::MRMDestMem: { |
| 662 | MCE.emitByte(BaseOpcode); |
| 663 | emitMemModRMByte(MI, CurOp, getX86RegNum(MI.getOperand(CurOp+4).getReg())); |
| 664 | CurOp += 5; |
| 665 | if (CurOp != NumOps) |
| 666 | emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc)); |
| 667 | break; |
| 668 | } |
| 669 | |
| 670 | case X86II::MRMSrcReg: |
| 671 | MCE.emitByte(BaseOpcode); |
| 672 | emitRegModRMByte(MI.getOperand(CurOp+1).getReg(), |
| 673 | getX86RegNum(MI.getOperand(CurOp).getReg())); |
| 674 | CurOp += 2; |
| 675 | if (CurOp != NumOps) |
| 676 | emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc)); |
| 677 | break; |
| 678 | |
| 679 | case X86II::MRMSrcMem: { |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 680 | intptr_t PCAdj = (CurOp+5 != NumOps) ? sizeOfImm(Desc) : 0; |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 681 | |
| 682 | MCE.emitByte(BaseOpcode); |
| 683 | emitMemModRMByte(MI, CurOp+1, getX86RegNum(MI.getOperand(CurOp).getReg()), |
| 684 | PCAdj); |
| 685 | CurOp += 5; |
| 686 | if (CurOp != NumOps) |
| 687 | emitConstant(MI.getOperand(CurOp++).getImm(), sizeOfImm(Desc)); |
| 688 | break; |
| 689 | } |
| 690 | |
| 691 | case X86II::MRM0r: case X86II::MRM1r: |
| 692 | case X86II::MRM2r: case X86II::MRM3r: |
| 693 | case X86II::MRM4r: case X86II::MRM5r: |
| 694 | case X86II::MRM6r: case X86II::MRM7r: |
| 695 | MCE.emitByte(BaseOpcode); |
| 696 | emitRegModRMByte(MI.getOperand(CurOp++).getReg(), |
| 697 | (Desc->TSFlags & X86II::FormMask)-X86II::MRM0r); |
| 698 | |
| 699 | if (CurOp != NumOps) { |
| 700 | const MachineOperand &MO1 = MI.getOperand(CurOp++); |
| 701 | unsigned Size = sizeOfImm(Desc); |
| 702 | if (MO1.isImmediate()) |
| 703 | emitConstant(MO1.getImm(), Size); |
| 704 | else { |
| 705 | unsigned rt = Is64BitMode ? X86::reloc_pcrel_word |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 706 | : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 707 | if (Opcode == X86::MOV64ri32) |
| 708 | rt = X86::reloc_absolute_word; // FIXME: add X86II flag? |
| 709 | if (MO1.isGlobalAddress()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 710 | emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), false, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 711 | else if (MO1.isExternalSymbol()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 712 | emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 713 | else if (MO1.isConstantPoolIndex()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 714 | emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 715 | else if (MO1.isJumpTableIndex()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 716 | emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 717 | } |
| 718 | } |
| 719 | break; |
| 720 | |
| 721 | case X86II::MRM0m: case X86II::MRM1m: |
| 722 | case X86II::MRM2m: case X86II::MRM3m: |
| 723 | case X86II::MRM4m: case X86II::MRM5m: |
| 724 | case X86II::MRM6m: case X86II::MRM7m: { |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 725 | intptr_t PCAdj = (CurOp+4 != NumOps) ? |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 726 | (MI.getOperand(CurOp+4).isImmediate() ? sizeOfImm(Desc) : 4) : 0; |
| 727 | |
| 728 | MCE.emitByte(BaseOpcode); |
| 729 | emitMemModRMByte(MI, CurOp, (Desc->TSFlags & X86II::FormMask)-X86II::MRM0m, |
| 730 | PCAdj); |
| 731 | CurOp += 4; |
| 732 | |
| 733 | if (CurOp != NumOps) { |
| 734 | const MachineOperand &MO = MI.getOperand(CurOp++); |
| 735 | unsigned Size = sizeOfImm(Desc); |
| 736 | if (MO.isImmediate()) |
| 737 | emitConstant(MO.getImm(), Size); |
| 738 | else { |
| 739 | unsigned rt = Is64BitMode ? X86::reloc_pcrel_word |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 740 | : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 741 | if (Opcode == X86::MOV64mi32) |
| 742 | rt = X86::reloc_absolute_word; // FIXME: add X86II flag? |
| 743 | if (MO.isGlobalAddress()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 744 | emitGlobalAddress(MO.getGlobal(), rt, MO.getOffset(), false, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 745 | else if (MO.isExternalSymbol()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 746 | emitExternalSymbolAddress(MO.getSymbolName(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 747 | else if (MO.isConstantPoolIndex()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 748 | emitConstPoolAddress(MO.getConstantPoolIndex(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 749 | else if (MO.isJumpTableIndex()) |
Evan Cheng | 8ee6bab | 2007-12-22 09:40:20 +0000 | [diff] [blame] | 750 | emitJumpTableAddress(MO.getJumpTableIndex(), rt, IsPIC); |
Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame] | 751 | } |
| 752 | } |
| 753 | break; |
| 754 | } |
| 755 | |
| 756 | case X86II::MRMInitReg: |
| 757 | MCE.emitByte(BaseOpcode); |
| 758 | // Duplicate register, used by things like MOV8r0 (aka xor reg,reg). |
| 759 | emitRegModRMByte(MI.getOperand(CurOp).getReg(), |
| 760 | getX86RegNum(MI.getOperand(CurOp).getReg())); |
| 761 | ++CurOp; |
| 762 | break; |
| 763 | } |
| 764 | |
| 765 | assert((Desc->Flags & M_VARIABLE_OPS) != 0 || |
| 766 | CurOp == NumOps && "Unknown encoding!"); |
| 767 | } |