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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
John Criswellb576c942003-10-20 19:43:21 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000027#include <iostream>
Chris Lattneref09c632004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000029
Chris Lattnerb74e83c2002-12-16 16:15:28 +000030namespace {
31 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
32 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner3e430262003-10-24 20:05:58 +000033 cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
Chris Lattner82bee0f2002-12-18 08:14:26 +000034 cl::desc("Disable register kill in local-ra"));
Chris Lattnerb74e83c2002-12-16 16:15:28 +000035
Chris Lattner580f9be2002-12-28 20:40:43 +000036 class RA : public MachineFunctionPass {
37 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000038 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000039 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000040 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000041
Chris Lattnerb8822ad2003-08-04 23:36:39 +000042 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
43 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000044 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000045
46 // Virt2PhysRegMap - This map contains entries for each virtual register
Chris Lattnerecea5632004-02-09 02:12:04 +000047 // that is currently available in a physical register. This is "logically"
48 // a map from virtual register numbers to physical register numbers.
49 // Instead of using a map, however, which is slow, we use a vector. The
50 // index is the VREG number - FirstVirtualRegister. If the entry is zero,
51 // then it is logically "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000052 //
Chris Lattnerecea5632004-02-09 02:12:04 +000053 std::vector<unsigned> Virt2PhysRegMap;
54
55 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
56 assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
57 assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
58 && "VirtReg not in map!");
59 return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
60 }
61 unsigned &getOrInsertVirt2PhysRegMapSlot(unsigned VirtReg) {
62 assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
63 if (VirtReg-MRegisterInfo::FirstVirtualRegister >= Virt2PhysRegMap.size())
64 Virt2PhysRegMap.resize(VirtReg-MRegisterInfo::FirstVirtualRegister+1);
65 return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
66 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +000067
Chris Lattner64667b62004-02-09 01:26:13 +000068 // PhysRegsUsed - This array is effectively a map, containing entries for
69 // each physical register that currently has a value (ie, it is in
70 // Virt2PhysRegMap). The value mapped to is the virtual register
71 // corresponding to the physical register (the inverse of the
72 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
73 // because it is used by a future instruction. If the entry for a physical
74 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000075 //
Chris Lattner64667b62004-02-09 01:26:13 +000076 int PhysRegsUsed[MRegisterInfo::FirstVirtualRegister];
Chris Lattnerb74e83c2002-12-16 16:15:28 +000077
78 // PhysRegsUseOrder - This contains a list of the physical registers that
79 // currently have a virtual register value in them. This list provides an
80 // ordering of registers, imposing a reallocation order. This list is only
81 // used if all registers are allocated and we have to spill one, in which
82 // case we spill the least recently used register. Entries at the front of
83 // the list are the least recently used registers, entries at the back are
84 // the most recently used.
85 //
86 std::vector<unsigned> PhysRegsUseOrder;
87
Chris Lattner91a452b2003-01-13 00:25:40 +000088 // VirtRegModified - This bitset contains information about which virtual
89 // registers need to be spilled back to memory when their registers are
90 // scavenged. If a virtual register has simply been rematerialized, there
91 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000092 //
Chris Lattner91a452b2003-01-13 00:25:40 +000093 std::vector<bool> VirtRegModified;
94
95 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000096 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000097 Reg -= MRegisterInfo::FirstVirtualRegister;
98 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
99 VirtRegModified[Reg] = Val;
100 }
101
102 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +0000103 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000104 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
105 && "Illegal virtual register!");
106 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
107 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000108
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000109 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +0000110 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +0000111 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
112
113 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
114 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
115 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
116 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
117 // Add it to the end of the list
118 PhysRegsUseOrder.push_back(RegMatch);
119 if (RegMatch == Reg)
120 return; // Found an exact match, exit early
121 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000122 }
123
124 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000125 virtual const char *getPassName() const {
126 return "Local Register Allocator";
127 }
128
Chris Lattner91a452b2003-01-13 00:25:40 +0000129 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
130 if (!DisableKill)
131 AU.addRequired<LiveVariables>();
132 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000133 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000134 MachineFunctionPass::getAnalysisUsage(AU);
135 }
136
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000137 private:
138 /// runOnMachineFunction - Register allocate the whole function
139 bool runOnMachineFunction(MachineFunction &Fn);
140
141 /// AllocateBasicBlock - Register allocate the specified basic block.
142 void AllocateBasicBlock(MachineBasicBlock &MBB);
143
Chris Lattner82bee0f2002-12-18 08:14:26 +0000144
Chris Lattner82bee0f2002-12-18 08:14:26 +0000145 /// areRegsEqual - This method returns true if the specified registers are
146 /// related to each other. To do this, it checks to see if they are equal
147 /// or if the first register is in the alias set of the second register.
148 ///
149 bool areRegsEqual(unsigned R1, unsigned R2) const {
150 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000151 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
152 *AliasSet; ++AliasSet) {
153 if (*AliasSet == R1) return true;
154 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000155 return false;
156 }
157
Chris Lattner580f9be2002-12-28 20:40:43 +0000158 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000159 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000160 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000161
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000162 /// removePhysReg - This method marks the specified physical register as no
163 /// longer being in use.
164 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000165 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000166
167 /// spillVirtReg - This method spills the value specified by PhysReg into
168 /// the virtual register slot specified by VirtReg. It then updates the RA
169 /// data structures to indicate the fact that PhysReg is now available.
170 ///
171 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
172 unsigned VirtReg, unsigned PhysReg);
173
Chris Lattnerc21be922002-12-16 17:44:42 +0000174 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000175 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
176 /// true, then the request is ignored if the physical register does not
177 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000178 ///
Chris Lattnerc21be922002-12-16 17:44:42 +0000179 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000180 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000181
Chris Lattner91a452b2003-01-13 00:25:40 +0000182 /// assignVirtToPhysReg - This method updates local state so that we know
183 /// that PhysReg is the proper container for VirtReg now. The physical
184 /// register must not be used for anything else when this is called.
185 ///
186 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
187
188 /// liberatePhysReg - Make sure the specified physical register is available
189 /// for use. If there is currently a value in it, it is either moved out of
190 /// the way or spilled to memory.
191 ///
192 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
193 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000194
Chris Lattnerae640432002-12-17 02:50:10 +0000195 /// isPhysRegAvailable - Return true if the specified physical register is
196 /// free and available for use. This also includes checking to see if
197 /// aliased registers are all free...
198 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000199 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000200
201 /// getFreeReg - Look to see if there is a free register available in the
202 /// specified register class. If not, return 0.
203 ///
204 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000205
Chris Lattner91a452b2003-01-13 00:25:40 +0000206 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000207 /// register. If all compatible physical registers are used, this method
208 /// spills the last used virtual register to the stack, and uses that
209 /// register.
210 ///
Chris Lattner91a452b2003-01-13 00:25:40 +0000211 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
212 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000213
214 /// reloadVirtReg - This method loads the specified virtual register into a
215 /// physical register, returning the physical register chosen. This updates
216 /// the regalloc data structures to reflect the fact that the virtual reg is
217 /// now alive in a physical register, and the previous one isn't.
218 ///
219 unsigned reloadVirtReg(MachineBasicBlock &MBB,
220 MachineBasicBlock::iterator &I, unsigned VirtReg);
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000221
222 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
223 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000224 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000225}
226
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000227/// getStackSpaceFor - This allocates space for the specified virtual register
228/// to be held on the stack.
229int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
230 // Find the location Reg would belong...
231 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000232
Chris Lattner580f9be2002-12-28 20:40:43 +0000233 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000234 return I->second; // Already has space allocated?
235
Chris Lattner580f9be2002-12-28 20:40:43 +0000236 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000237 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000238
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000239 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000240 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
241 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000242}
243
Chris Lattnerae640432002-12-17 02:50:10 +0000244
Chris Lattner82bee0f2002-12-18 08:14:26 +0000245/// removePhysReg - This method marks the specified physical register as no
246/// longer being in use.
247///
248void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000249 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000250
251 std::vector<unsigned>::iterator It =
252 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000253 if (It != PhysRegsUseOrder.end())
254 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000255}
256
Chris Lattner91a452b2003-01-13 00:25:40 +0000257
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000258/// spillVirtReg - This method spills the value specified by PhysReg into the
259/// virtual register slot specified by VirtReg. It then updates the RA data
260/// structures to indicate the fact that PhysReg is now available.
261///
262void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
263 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000264 if (!VirtReg && DisableKill) return;
265 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000266 " Must not have appropriate kill for the register or use exists beyond"
267 " the intended one.");
268 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
269 std::cerr << " containing %reg" << VirtReg;
270 if (!isVirtRegModified(VirtReg))
271 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000272
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000273 // Otherwise, there is a virtual register corresponding to this physical
274 // register. We only need to spill it into its stack slot if it has been
275 // modified.
276 if (isVirtRegModified(VirtReg)) {
277 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
278 int FrameIndex = getStackSpaceFor(VirtReg, RC);
279 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
280 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
281 ++NumSpilled; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000282 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000283
284 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000285
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000286 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000287 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000288}
289
Chris Lattnerae640432002-12-17 02:50:10 +0000290
Chris Lattner91a452b2003-01-13 00:25:40 +0000291/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000292/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
293/// then the request is ignored if the physical register does not contain a
294/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000295///
296void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000297 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000298 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
299 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
300 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000301 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000302 // If the selected register aliases any other registers, we must make
303 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000304 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000305 *AliasSet; ++AliasSet)
306 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
307 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
308 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000309 }
310}
311
312
313/// assignVirtToPhysReg - This method updates local state so that we know
314/// that PhysReg is the proper container for VirtReg now. The physical
315/// register must not be used for anything else when this is called.
316///
317void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000318 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000319 // Update information to note the fact that this register was just used, and
320 // it holds VirtReg.
321 PhysRegsUsed[PhysReg] = VirtReg;
Chris Lattnerecea5632004-02-09 02:12:04 +0000322 getOrInsertVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000323 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
324}
325
326
Chris Lattnerae640432002-12-17 02:50:10 +0000327/// isPhysRegAvailable - Return true if the specified physical register is free
328/// and available for use. This also includes checking to see if aliased
329/// registers are all free...
330///
331bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000332 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000333
334 // If the selected register aliases any other allocated registers, it is
335 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000336 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
337 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000338 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000339 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000340 return true;
341}
342
343
Chris Lattner91a452b2003-01-13 00:25:40 +0000344/// getFreeReg - Look to see if there is a free register available in the
345/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000346///
Chris Lattner91a452b2003-01-13 00:25:40 +0000347unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000348 // Get iterators defining the range of registers that are valid to allocate in
349 // this class, which also specifies the preferred allocation order.
350 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
351 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000352
Chris Lattner91a452b2003-01-13 00:25:40 +0000353 for (; RI != RE; ++RI)
354 if (isPhysRegAvailable(*RI)) { // Is reg unused?
355 assert(*RI != 0 && "Cannot use register!");
356 return *RI; // Found an unused register!
357 }
358 return 0;
359}
360
361
362/// liberatePhysReg - Make sure the specified physical register is available for
363/// use. If there is currently a value in it, it is either moved out of the way
364/// or spilled to memory.
365///
366void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
367 unsigned PhysReg) {
368 // FIXME: This code checks to see if a register is available, but it really
369 // wants to know if a reg is available BEFORE the instruction executes. If
370 // called after killed operands are freed, it runs the risk of reallocating a
371 // used operand...
372#if 0
373 if (isPhysRegAvailable(PhysReg)) return; // Already available...
374
375 // Check to see if the register is directly used, not indirectly used through
376 // aliases. If aliased registers are the ones actually used, we cannot be
377 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner64667b62004-02-09 01:26:13 +0000378 if (PhysRegsUsed[PhysReg] != -1) {
379 // The virtual register held...
380 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattner91a452b2003-01-13 00:25:40 +0000381
382 // Check to see if there is a compatible register available. If so, we can
383 // move the value into the new register...
384 //
385 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
386 if (unsigned NewReg = getFreeReg(RC)) {
387 // Emit the code to copy the value...
388 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
389
390 // Update our internal state to indicate that PhysReg is available and Reg
391 // isn't.
Chris Lattnerecea5632004-02-09 02:12:04 +0000392 getVirt2PhysRegMapSlot[VirtReg] = 0;
Chris Lattner91a452b2003-01-13 00:25:40 +0000393 removePhysReg(PhysReg); // Free the physreg
394
395 // Move reference over to new register...
396 assignVirtToPhysReg(VirtReg, NewReg);
397 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000398 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000399 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000400#endif
401 spillPhysReg(MBB, I, PhysReg);
402}
403
404
405/// getReg - Find a physical register to hold the specified virtual
406/// register. If all compatible physical registers are used, this method spills
407/// the last used virtual register to the stack, and uses that register.
408///
409unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
410 unsigned VirtReg) {
411 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
412
413 // First check to see if we have a free register of the requested type...
414 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000415
Chris Lattnerae640432002-12-17 02:50:10 +0000416 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000417 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000418 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000419
420 // Loop over all of the preallocated registers from the least recently used
421 // to the most recently used. When we find one that is capable of holding
422 // our register, use it.
423 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000424 assert(i != PhysRegsUseOrder.size() &&
425 "Couldn't find a register of the appropriate class!");
Chris Lattnerae640432002-12-17 02:50:10 +0000426
427 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000428
429 // We can only use this register if it holds a virtual register (ie, it
430 // can be spilled). Do not use it if it is an explicitly allocated
431 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000432 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000433 "PhysReg in PhysRegsUseOrder, but is not allocated?");
434 if (PhysRegsUsed[R]) {
435 // If the current register is compatible, use it.
436 if (RegInfo->getRegClass(R) == RC) {
437 PhysReg = R;
438 break;
439 } else {
440 // If one of the registers aliased to the current register is
441 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000442 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
443 *AliasSet; ++AliasSet) {
444 if (RegInfo->getRegClass(*AliasSet) == RC) {
445 PhysReg = *AliasSet; // Take an aliased register
446 break;
447 }
448 }
Chris Lattner41822c72003-08-23 23:49:42 +0000449 }
Chris Lattnerae640432002-12-17 02:50:10 +0000450 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000451 }
452
Chris Lattnerae640432002-12-17 02:50:10 +0000453 assert(PhysReg && "Physical register not assigned!?!?");
454
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000455 // At this point PhysRegsUseOrder[i] is the least recently used register of
456 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000457 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000458 }
459
460 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000461 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000462 return PhysReg;
463}
464
Chris Lattnerae640432002-12-17 02:50:10 +0000465
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000466/// reloadVirtReg - This method loads the specified virtual register into a
467/// physical register, returning the physical register chosen. This updates the
468/// regalloc data structures to reflect the fact that the virtual reg is now
469/// alive in a physical register, and the previous one isn't.
470///
471unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
472 MachineBasicBlock::iterator &I,
473 unsigned VirtReg) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000474 if (unsigned PR = getOrInsertVirt2PhysRegMapSlot(VirtReg)) {
475 MarkPhysRegRecentlyUsed(PR);
476 return PR; // Already have this value available!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000477 }
478
Chris Lattner91a452b2003-01-13 00:25:40 +0000479 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000480
Chris Lattnerff863ba2002-12-25 05:05:46 +0000481 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner580f9be2002-12-28 20:40:43 +0000482 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000483
Chris Lattner91a452b2003-01-13 00:25:40 +0000484 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
485
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000486 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
487 << RegInfo->getName(PhysReg) << "\n");
488
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000489 // Add move instruction(s)
Chris Lattner580f9be2002-12-28 20:40:43 +0000490 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000491 ++NumReloaded; // Update statistics
492 return PhysReg;
493}
494
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000495
496
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000497void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
498 // loop over each instruction
499 MachineBasicBlock::iterator I = MBB.begin();
500 for (; I != MBB.end(); ++I) {
501 MachineInstr *MI = *I;
Chris Lattner3501fea2003-01-14 22:00:31 +0000502 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000503 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
504 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000505 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
506 if (PhysRegsUsed[i] != -1)
507 std::cerr << "[" << RegInfo->getName(i)
508 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000509 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000510
Chris Lattnerae640432002-12-17 02:50:10 +0000511 // Loop over the implicit uses, making sure that they are at the head of the
512 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000513 for (const unsigned *ImplicitUses = TID.ImplicitUses;
514 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000515 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000516
Brian Gaeke53b99a02003-08-15 21:19:25 +0000517 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000518 // incoming values if we are out of registers. Note that we completely
519 // ignore physical register uses here. We assume that if an explicit
520 // physical register is referenced by the instruction, that it is guaranteed
521 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000522 //
523 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenos4d7af652003-12-14 13:24:17 +0000524 if (MI->getOperand(i).isUse() &&
525 !MI->getOperand(i).isDef() &&
526 MI->getOperand(i).isVirtualRegister()){
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000527 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
528 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
529 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
530 }
531
Chris Lattner91a452b2003-01-13 00:25:40 +0000532 if (!DisableKill) {
533 // If this instruction is the last user of anything in registers, kill the
534 // value, freeing the register being used, so it doesn't need to be
535 // spilled to memory.
536 //
537 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000538 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000539 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000540 unsigned PhysReg = VirtReg;
Chris Lattneref09c632004-01-31 21:27:19 +0000541 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000542 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
543 PhysReg = PhysRegSlot;
544 assert(PhysReg != 0);
545 PhysRegSlot = 0;
Chris Lattnerd5725632003-05-12 03:54:14 +0000546 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000547
Chris Lattnerd5725632003-05-12 03:54:14 +0000548 if (PhysReg) {
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000549 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
550 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000551 removePhysReg(PhysReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000552 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000553 }
554 }
555
556 // Loop over all of the operands of the instruction, spilling registers that
557 // are defined, and marking explicit destinations in the PhysRegsUsed map.
558 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenos4d7af652003-12-14 13:24:17 +0000559 if (MI->getOperand(i).isDef() &&
Chris Lattner91a452b2003-01-13 00:25:40 +0000560 MI->getOperand(i).isPhysicalRegister()) {
561 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
Chris Lattner128c2aa2003-08-17 18:01:15 +0000562 spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000563 PhysRegsUsed[Reg] = 0; // It is free and reserved now
564 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000565 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
566 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000567 PhysRegsUseOrder.push_back(*AliasSet);
568 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000569 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000570 }
571
572 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000573 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
574 *ImplicitDefs; ++ImplicitDefs) {
575 unsigned Reg = *ImplicitDefs;
576 spillPhysReg(MBB, I, Reg);
577 PhysRegsUseOrder.push_back(Reg);
578 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000579 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
580 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000581 PhysRegsUseOrder.push_back(*AliasSet);
582 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000583 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000584 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000585
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000586 // Okay, we have allocated all of the source operands and spilled any values
587 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000588 // implicit defs and assign them to a register, spilling incoming values if
589 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000590 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000591 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenos4d7af652003-12-14 13:24:17 +0000592 if (MI->getOperand(i).isDef() &&
593 MI->getOperand(i).isVirtualRegister()) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000594 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
595 unsigned DestPhysReg;
596
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000597 // If DestVirtReg already has a value, use it.
Chris Lattnerecea5632004-02-09 02:12:04 +0000598 if (!(DestPhysReg = getOrInsertVirt2PhysRegMapSlot(DestVirtReg)))
Chris Lattner91a452b2003-01-13 00:25:40 +0000599 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000600 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000601 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
602 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000603
604 if (!DisableKill) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000605 // If this instruction defines any registers that are immediately dead,
606 // kill them now.
607 //
608 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000609 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000610 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000611 unsigned PhysReg = VirtReg;
Chris Lattneref09c632004-01-31 21:27:19 +0000612 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000613 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
614 PhysReg = PhysRegSlot;
615 assert(PhysReg != 0);
616 PhysRegSlot = 0;
Chris Lattnerd5725632003-05-12 03:54:14 +0000617 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000618
Chris Lattnerd5725632003-05-12 03:54:14 +0000619 if (PhysReg) {
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000620 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
621 << " [%reg" << VirtReg
622 << "] is never used, removing it frame live list\n");
Chris Lattnerd5725632003-05-12 03:54:14 +0000623 removePhysReg(PhysReg);
624 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000625 }
626 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000627 }
628
629 // Rewind the iterator to point to the first flow control instruction...
Chris Lattner3501fea2003-01-14 22:00:31 +0000630 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner0416d2a2003-01-16 18:06:43 +0000631 I = MBB.end();
Chris Lattner3501fea2003-01-14 22:00:31 +0000632 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000633 --I;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000634
635 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000636 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
637 if (PhysRegsUsed[i] != -1)
638 if (unsigned VirtReg = PhysRegsUsed[i])
639 spillVirtReg(MBB, I, VirtReg, i);
640 else
641 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000642
Chris Lattnerecea5632004-02-09 02:12:04 +0000643#ifndef NDEBUG
644 bool AllOk = true;
645 for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
646 if (unsigned PR = Virt2PhysRegMap[i]) {
647 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
648 AllOk = false;
649 }
650 assert(AllOk && "Virtual registers still in phys regs?");
651#endif
Chris Lattner128c2aa2003-08-17 18:01:15 +0000652
653 // Clear any physical register which appear live at the end of the basic
654 // block, but which do not hold any virtual registers. e.g., the stack
655 // pointer.
656 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000657}
658
Chris Lattner86c69a62002-12-17 03:16:10 +0000659
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000660/// runOnMachineFunction - Register allocate the whole function
661///
662bool RA::runOnMachineFunction(MachineFunction &Fn) {
663 DEBUG(std::cerr << "Machine Function " << "\n");
664 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000665 TM = &Fn.getTarget();
666 RegInfo = TM->getRegisterInfo();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000667
Chris Lattner64667b62004-02-09 01:26:13 +0000668 memset(PhysRegsUsed, -1, RegInfo->getNumRegs()*sizeof(unsigned));
669
Chris Lattnerecea5632004-02-09 02:12:04 +0000670 // Reserve some space for a moderate number of registers. If we know what the
671 // max virtual register number was we could use that instead and save some
672 // runtime overhead...
673 Virt2PhysRegMap.resize(1024);
674
Chris Lattner82bee0f2002-12-18 08:14:26 +0000675 if (!DisableKill)
Chris Lattner91a452b2003-01-13 00:25:40 +0000676 LV = &getAnalysis<LiveVariables>();
Chris Lattner82bee0f2002-12-18 08:14:26 +0000677
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000678 // Loop over all of the basic blocks, eliminating virtual register references
679 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
680 MBB != MBBe; ++MBB)
681 AllocateBasicBlock(*MBB);
682
Chris Lattner580f9be2002-12-28 20:40:43 +0000683 StackSlotForVirtReg.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000684 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000685 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000686 return true;
687}
688
Chris Lattneref09c632004-01-31 21:27:19 +0000689FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000690 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000691}
Brian Gaeked0fde302003-11-11 22:41:34 +0000692