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Chris Lattnerc16257f2006-01-18 19:37:44 +00001//===- PPCInstrInfo.h - PowerPC Instruction Information ---------*- C++ -*-===//
Misha Brukmanb5f662f2005-04-21 23:30:14 +00002//
Misha Brukmanf2ccb772004-08-17 04:55:41 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Misha Brukmanb5f662f2005-04-21 23:30:14 +00007//
Misha Brukmanf2ccb772004-08-17 04:55:41 +00008//===----------------------------------------------------------------------===//
9//
10// This file contains the PowerPC implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef POWERPC32_INSTRUCTIONINFO_H
15#define POWERPC32_INSTRUCTIONINFO_H
16
Chris Lattner26689592005-10-14 23:51:18 +000017#include "PPC.h"
Chris Lattner617742b2005-10-14 22:44:13 +000018#include "llvm/Target/TargetInstrInfo.h"
Chris Lattner16e71f22005-10-14 23:59:06 +000019#include "PPCRegisterInfo.h"
Misha Brukmanf2ccb772004-08-17 04:55:41 +000020
21namespace llvm {
Chris Lattner617742b2005-10-14 22:44:13 +000022
Nate Begeman21e463b2005-10-16 05:39:50 +000023class PPCInstrInfo : public TargetInstrInfo {
24 const PPCRegisterInfo RI;
Misha Brukmanf2ccb772004-08-17 04:55:41 +000025public:
Nate Begeman21e463b2005-10-16 05:39:50 +000026 PPCInstrInfo();
Misha Brukmanf2ccb772004-08-17 04:55:41 +000027
28 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
29 /// such, whenever a client has an instance of instruction info, it should
30 /// always be able to get register info as well (through this method).
31 ///
32 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
33
34 //
35 // Return true if the instruction is a register to register move and
36 // leave the source and dest operands in the passed parameters.
37 //
38 virtual bool isMoveInstr(const MachineInstr& MI,
39 unsigned& sourceReg,
40 unsigned& destReg) const;
41
Chris Lattner40839602006-02-02 20:12:32 +000042 unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
43
Chris Lattner043870d2005-09-09 18:17:41 +000044 // commuteInstruction - We can commute rlwimi instructions, but only if the
45 // rotate amt is zero. We also have to munge the immediates a bit.
46 virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
47
Misha Brukmanf2ccb772004-08-17 04:55:41 +000048 static unsigned invertPPCBranchOpcode(unsigned Opcode) {
49 switch (Opcode) {
50 default: assert(0 && "Unknown PPC branch opcode!");
51 case PPC::BEQ: return PPC::BNE;
52 case PPC::BNE: return PPC::BEQ;
53 case PPC::BLT: return PPC::BGE;
54 case PPC::BGE: return PPC::BLT;
55 case PPC::BGT: return PPC::BLE;
56 case PPC::BLE: return PPC::BGT;
Chris Lattnere44b2d12006-01-18 19:35:21 +000057 case PPC::BNU: return PPC::BUN;
58 case PPC::BUN: return PPC::BNU;
Misha Brukmanb5f662f2005-04-21 23:30:14 +000059 }
Misha Brukmanf2ccb772004-08-17 04:55:41 +000060 }
61};
62
63}
64
65#endif