Blame - lib/CodeGen/SelectionDAG/TargetLowering.cpp - fp2-dev/platform/external/llvm

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Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	1	//===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	2	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	3	// The LLVM Compiler Infrastructure
				4	//
Chris Lattner	4ee451d	2007-12-29 20:36:04 +0000	[diff] [blame]	5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	7	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	8	//===----------------------------------------------------------------------===//
				9	//
				10	// This implements the TargetLowering class.
				11	//
				12	//===----------------------------------------------------------------------===//
				13
				14	#include "llvm/Target/TargetLowering.h"
Chris Lattner	af76e59	2009-08-22 20:48:53 +0000	[diff] [blame]	15	#include "llvm/MC/MCAsmInfo.h"
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	16	#include "llvm/MC/MCExpr.h"
Owen Anderson	07000c6	2006-05-12 06:33:49 +0000	[diff] [blame]	17	#include "llvm/Target/TargetData.h"
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	18	#include "llvm/Target/TargetLoweringObjectFile.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	19	#include "llvm/Target/TargetMachine.h"
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	20	#include "llvm/Target/TargetRegisterInfo.h"
Dan Gohman	707e018	2008-04-12 04:36:06 +0000	[diff] [blame]	21	#include "llvm/GlobalVariable.h"
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	22	#include "llvm/DerivedTypes.h"
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	23	#include "llvm/CodeGen/Analysis.h"
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	24	#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	25	#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	26	#include "llvm/CodeGen/MachineFunction.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	27	#include "llvm/CodeGen/SelectionDAG.h"
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	28	#include "llvm/ADT/STLExtras.h"
Torok Edwin	c25e758	2009-07-11 20:10:48 +0000	[diff] [blame]	29	#include "llvm/Support/ErrorHandling.h"
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	30	#include "llvm/Support/MathExtras.h"
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	31	using namespace llvm;
				32
Rafael Espindola	9a58023	2009-02-27 13:37:18 +0000	[diff] [blame]	33	namespace llvm {
				34	TLSModel::Model getTLSModel(const GlobalValue *GV, Reloc::Model reloc) {
				35	bool isLocal = GV->hasLocalLinkage();
				36	bool isDeclaration = GV->isDeclaration();
				37	// FIXME: what should we do for protected and internal visibility?
				38	// For variables, is internal different from hidden?
				39	bool isHidden = GV->hasHiddenVisibility();
				40
				41	if (reloc == Reloc::PIC_) {
				42	if (isLocal \|\| isHidden)
				43	return TLSModel::LocalDynamic;
				44	else
				45	return TLSModel::GeneralDynamic;
				46	} else {
				47	if (!isDeclaration \|\| isHidden)
				48	return TLSModel::LocalExec;
				49	else
				50	return TLSModel::InitialExec;
				51	}
				52	}
				53	}
				54
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	55	/// InitLibcallNames - Set default libcall names.
				56	///
Evan Cheng	79cca50	2007-01-12 22:51:10 +0000	[diff] [blame]	57	static void InitLibcallNames(const char **Names) {
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	58	Names[RTLIB::SHL_I16] = "__ashlhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	59	Names[RTLIB::SHL_I32] = "__ashlsi3";
				60	Names[RTLIB::SHL_I64] = "__ashldi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	61	Names[RTLIB::SHL_I128] = "__ashlti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	62	Names[RTLIB::SRL_I16] = "__lshrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	63	Names[RTLIB::SRL_I32] = "__lshrsi3";
				64	Names[RTLIB::SRL_I64] = "__lshrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	65	Names[RTLIB::SRL_I128] = "__lshrti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	66	Names[RTLIB::SRA_I16] = "__ashrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	67	Names[RTLIB::SRA_I32] = "__ashrsi3";
				68	Names[RTLIB::SRA_I64] = "__ashrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	69	Names[RTLIB::SRA_I128] = "__ashrti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	70	Names[RTLIB::MUL_I8] = "__mulqi3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	71	Names[RTLIB::MUL_I16] = "__mulhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	72	Names[RTLIB::MUL_I32] = "__mulsi3";
				73	Names[RTLIB::MUL_I64] = "__muldi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	74	Names[RTLIB::MUL_I128] = "__multi3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	75	Names[RTLIB::SDIV_I8] = "__divqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	76	Names[RTLIB::SDIV_I16] = "__divhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	77	Names[RTLIB::SDIV_I32] = "__divsi3";
				78	Names[RTLIB::SDIV_I64] = "__divdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	79	Names[RTLIB::SDIV_I128] = "__divti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	80	Names[RTLIB::UDIV_I8] = "__udivqi3";
Anton Korobeynikov	fb3f84f	2009-05-08 18:50:54 +0000	[diff] [blame]	81	Names[RTLIB::UDIV_I16] = "__udivhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	82	Names[RTLIB::UDIV_I32] = "__udivsi3";
				83	Names[RTLIB::UDIV_I64] = "__udivdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	84	Names[RTLIB::UDIV_I128] = "__udivti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	85	Names[RTLIB::SREM_I8] = "__modqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	86	Names[RTLIB::SREM_I16] = "__modhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	87	Names[RTLIB::SREM_I32] = "__modsi3";
				88	Names[RTLIB::SREM_I64] = "__moddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	89	Names[RTLIB::SREM_I128] = "__modti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	90	Names[RTLIB::UREM_I8] = "__umodqi3";
Anton Korobeynikov	9fe9c8e	2009-05-03 13:19:57 +0000	[diff] [blame]	91	Names[RTLIB::UREM_I16] = "__umodhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	92	Names[RTLIB::UREM_I32] = "__umodsi3";
				93	Names[RTLIB::UREM_I64] = "__umoddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	94	Names[RTLIB::UREM_I128] = "__umodti3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	95	Names[RTLIB::NEG_I32] = "__negsi2";
				96	Names[RTLIB::NEG_I64] = "__negdi2";
				97	Names[RTLIB::ADD_F32] = "__addsf3";
				98	Names[RTLIB::ADD_F64] = "__adddf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	99	Names[RTLIB::ADD_F80] = "__addxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	100	Names[RTLIB::ADD_PPCF128] = "__gcc_qadd";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	101	Names[RTLIB::SUB_F32] = "__subsf3";
				102	Names[RTLIB::SUB_F64] = "__subdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	103	Names[RTLIB::SUB_F80] = "__subxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	104	Names[RTLIB::SUB_PPCF128] = "__gcc_qsub";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	105	Names[RTLIB::MUL_F32] = "__mulsf3";
				106	Names[RTLIB::MUL_F64] = "__muldf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	107	Names[RTLIB::MUL_F80] = "__mulxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	108	Names[RTLIB::MUL_PPCF128] = "__gcc_qmul";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	109	Names[RTLIB::DIV_F32] = "__divsf3";
				110	Names[RTLIB::DIV_F64] = "__divdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	111	Names[RTLIB::DIV_F80] = "__divxf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	112	Names[RTLIB::DIV_PPCF128] = "__gcc_qdiv";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	113	Names[RTLIB::REM_F32] = "fmodf";
				114	Names[RTLIB::REM_F64] = "fmod";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	115	Names[RTLIB::REM_F80] = "fmodl";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	116	Names[RTLIB::REM_PPCF128] = "fmodl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	117	Names[RTLIB::POWI_F32] = "__powisf2";
				118	Names[RTLIB::POWI_F64] = "__powidf2";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	119	Names[RTLIB::POWI_F80] = "__powixf2";
				120	Names[RTLIB::POWI_PPCF128] = "__powitf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	121	Names[RTLIB::SQRT_F32] = "sqrtf";
				122	Names[RTLIB::SQRT_F64] = "sqrt";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	123	Names[RTLIB::SQRT_F80] = "sqrtl";
				124	Names[RTLIB::SQRT_PPCF128] = "sqrtl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	125	Names[RTLIB::LOG_F32] = "logf";
				126	Names[RTLIB::LOG_F64] = "log";
				127	Names[RTLIB::LOG_F80] = "logl";
				128	Names[RTLIB::LOG_PPCF128] = "logl";
				129	Names[RTLIB::LOG2_F32] = "log2f";
				130	Names[RTLIB::LOG2_F64] = "log2";
				131	Names[RTLIB::LOG2_F80] = "log2l";
				132	Names[RTLIB::LOG2_PPCF128] = "log2l";
				133	Names[RTLIB::LOG10_F32] = "log10f";
				134	Names[RTLIB::LOG10_F64] = "log10";
				135	Names[RTLIB::LOG10_F80] = "log10l";
				136	Names[RTLIB::LOG10_PPCF128] = "log10l";
				137	Names[RTLIB::EXP_F32] = "expf";
				138	Names[RTLIB::EXP_F64] = "exp";
				139	Names[RTLIB::EXP_F80] = "expl";
				140	Names[RTLIB::EXP_PPCF128] = "expl";
				141	Names[RTLIB::EXP2_F32] = "exp2f";
				142	Names[RTLIB::EXP2_F64] = "exp2";
				143	Names[RTLIB::EXP2_F80] = "exp2l";
				144	Names[RTLIB::EXP2_PPCF128] = "exp2l";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	145	Names[RTLIB::SIN_F32] = "sinf";
				146	Names[RTLIB::SIN_F64] = "sin";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	147	Names[RTLIB::SIN_F80] = "sinl";
				148	Names[RTLIB::SIN_PPCF128] = "sinl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	149	Names[RTLIB::COS_F32] = "cosf";
				150	Names[RTLIB::COS_F64] = "cos";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	151	Names[RTLIB::COS_F80] = "cosl";
				152	Names[RTLIB::COS_PPCF128] = "cosl";
Dan Gohman	e54be10	2007-10-11 23:09:10 +0000	[diff] [blame]	153	Names[RTLIB::POW_F32] = "powf";
				154	Names[RTLIB::POW_F64] = "pow";
				155	Names[RTLIB::POW_F80] = "powl";
				156	Names[RTLIB::POW_PPCF128] = "powl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	157	Names[RTLIB::CEIL_F32] = "ceilf";
				158	Names[RTLIB::CEIL_F64] = "ceil";
				159	Names[RTLIB::CEIL_F80] = "ceill";
				160	Names[RTLIB::CEIL_PPCF128] = "ceill";
				161	Names[RTLIB::TRUNC_F32] = "truncf";
				162	Names[RTLIB::TRUNC_F64] = "trunc";
				163	Names[RTLIB::TRUNC_F80] = "truncl";
				164	Names[RTLIB::TRUNC_PPCF128] = "truncl";
				165	Names[RTLIB::RINT_F32] = "rintf";
				166	Names[RTLIB::RINT_F64] = "rint";
				167	Names[RTLIB::RINT_F80] = "rintl";
				168	Names[RTLIB::RINT_PPCF128] = "rintl";
				169	Names[RTLIB::NEARBYINT_F32] = "nearbyintf";
				170	Names[RTLIB::NEARBYINT_F64] = "nearbyint";
				171	Names[RTLIB::NEARBYINT_F80] = "nearbyintl";
				172	Names[RTLIB::NEARBYINT_PPCF128] = "nearbyintl";
				173	Names[RTLIB::FLOOR_F32] = "floorf";
				174	Names[RTLIB::FLOOR_F64] = "floor";
				175	Names[RTLIB::FLOOR_F80] = "floorl";
				176	Names[RTLIB::FLOOR_PPCF128] = "floorl";
Duncan Sands	d2c817e	2010-03-14 21:08:40 +0000	[diff] [blame]	177	Names[RTLIB::COPYSIGN_F32] = "copysignf";
				178	Names[RTLIB::COPYSIGN_F64] = "copysign";
				179	Names[RTLIB::COPYSIGN_F80] = "copysignl";
				180	Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	181	Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	182	Names[RTLIB::FPEXT_F16_F32] = "__gnu_h2f_ieee";
				183	Names[RTLIB::FPROUND_F32_F16] = "__gnu_f2h_ieee";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	184	Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	185	Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";
				186	Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
				187	Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
				188	Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	189	Names[RTLIB::FPTOSINT_F32_I8] = "__fixsfqi";
				190	Names[RTLIB::FPTOSINT_F32_I16] = "__fixsfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	191	Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
				192	Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	193	Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	194	Names[RTLIB::FPTOSINT_F64_I8] = "__fixdfqi";
				195	Names[RTLIB::FPTOSINT_F64_I16] = "__fixdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	196	Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
				197	Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	198	Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
Duncan Sands	be1ad4d	2008-07-10 15:33:02 +0000	[diff] [blame]	199	Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	200	Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	201	Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	202	Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	203	Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	204	Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	205	Names[RTLIB::FPTOUINT_F32_I8] = "__fixunssfqi";
				206	Names[RTLIB::FPTOUINT_F32_I16] = "__fixunssfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	207	Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
				208	Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	209	Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	210	Names[RTLIB::FPTOUINT_F64_I8] = "__fixunsdfqi";
				211	Names[RTLIB::FPTOUINT_F64_I16] = "__fixunsdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	212	Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
				213	Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	214	Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	215	Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
				216	Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	217	Names[RTLIB::FPTOUINT_F80_I128] = "__fixunsxfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	218	Names[RTLIB::FPTOUINT_PPCF128_I32] = "__fixunstfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	219	Names[RTLIB::FPTOUINT_PPCF128_I64] = "__fixunstfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	220	Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	221	Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
				222	Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
Duncan Sands	9bed0f5	2008-07-11 16:57:02 +0000	[diff] [blame]	223	Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
				224	Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	225	Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
				226	Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	227	Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
				228	Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
Dan Gohman	d91446d	2008-03-05 01:08:17 +0000	[diff] [blame]	229	Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
				230	Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
				231	Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
				232	Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	233	Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
				234	Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	235	Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
				236	Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	237	Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
				238	Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	239	Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
				240	Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
				241	Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
				242	Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
				243	Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
				244	Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	245	Names[RTLIB::OEQ_F32] = "__eqsf2";
				246	Names[RTLIB::OEQ_F64] = "__eqdf2";
				247	Names[RTLIB::UNE_F32] = "__nesf2";
				248	Names[RTLIB::UNE_F64] = "__nedf2";
				249	Names[RTLIB::OGE_F32] = "__gesf2";
				250	Names[RTLIB::OGE_F64] = "__gedf2";
				251	Names[RTLIB::OLT_F32] = "__ltsf2";
				252	Names[RTLIB::OLT_F64] = "__ltdf2";
				253	Names[RTLIB::OLE_F32] = "__lesf2";
				254	Names[RTLIB::OLE_F64] = "__ledf2";
				255	Names[RTLIB::OGT_F32] = "__gtsf2";
				256	Names[RTLIB::OGT_F64] = "__gtdf2";
				257	Names[RTLIB::UO_F32] = "__unordsf2";
				258	Names[RTLIB::UO_F64] = "__unorddf2";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	259	Names[RTLIB::O_F32] = "__unordsf2";
				260	Names[RTLIB::O_F64] = "__unorddf2";
Sanjiv Gupta	a114baa	2009-07-30 09:12:56 +0000	[diff] [blame]	261	Names[RTLIB::MEMCPY] = "memcpy";
				262	Names[RTLIB::MEMMOVE] = "memmove";
				263	Names[RTLIB::MEMSET] = "memset";
Duncan Sands	b0f1e17	2009-05-22 20:36:31 +0000	[diff] [blame]	264	Names[RTLIB::UNWIND_RESUME] = "_Unwind_Resume";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	265	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_1] = "__sync_val_compare_and_swap_1";
				266	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_2] = "__sync_val_compare_and_swap_2";
				267	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_4] = "__sync_val_compare_and_swap_4";
				268	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8] = "__sync_val_compare_and_swap_8";
Jim Grosbach	ef6eb9c	2010-06-18 23:03:10 +0000	[diff] [blame]	269	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_1] = "__sync_lock_test_and_set_1";
				270	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_2] = "__sync_lock_test_and_set_2";
				271	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_4] = "__sync_lock_test_and_set_4";
				272	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_8] = "__sync_lock_test_and_set_8";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	273	Names[RTLIB::SYNC_FETCH_AND_ADD_1] = "__sync_fetch_and_add_1";
				274	Names[RTLIB::SYNC_FETCH_AND_ADD_2] = "__sync_fetch_and_add_2";
				275	Names[RTLIB::SYNC_FETCH_AND_ADD_4] = "__sync_fetch_and_add_4";
				276	Names[RTLIB::SYNC_FETCH_AND_ADD_8] = "__sync_fetch_and_add_8";
				277	Names[RTLIB::SYNC_FETCH_AND_SUB_1] = "__sync_fetch_and_sub_1";
				278	Names[RTLIB::SYNC_FETCH_AND_SUB_2] = "__sync_fetch_and_sub_2";
				279	Names[RTLIB::SYNC_FETCH_AND_SUB_4] = "__sync_fetch_and_sub_4";
				280	Names[RTLIB::SYNC_FETCH_AND_SUB_8] = "__sync_fetch_and_sub_8";
				281	Names[RTLIB::SYNC_FETCH_AND_AND_1] = "__sync_fetch_and_and_1";
				282	Names[RTLIB::SYNC_FETCH_AND_AND_2] = "__sync_fetch_and_and_2";
				283	Names[RTLIB::SYNC_FETCH_AND_AND_4] = "__sync_fetch_and_and_4";
				284	Names[RTLIB::SYNC_FETCH_AND_AND_8] = "__sync_fetch_and_and_8";
				285	Names[RTLIB::SYNC_FETCH_AND_OR_1] = "__sync_fetch_and_or_1";
				286	Names[RTLIB::SYNC_FETCH_AND_OR_2] = "__sync_fetch_and_or_2";
				287	Names[RTLIB::SYNC_FETCH_AND_OR_4] = "__sync_fetch_and_or_4";
				288	Names[RTLIB::SYNC_FETCH_AND_OR_8] = "__sync_fetch_and_or_8";
				289	Names[RTLIB::SYNC_FETCH_AND_XOR_1] = "__sync_fetch_and_xor_1";
				290	Names[RTLIB::SYNC_FETCH_AND_XOR_2] = "__sync_fetch_and_xor_2";
				291	Names[RTLIB::SYNC_FETCH_AND_XOR_4] = "__sync_fetch_and-xor_4";
				292	Names[RTLIB::SYNC_FETCH_AND_XOR_8] = "__sync_fetch_and_xor_8";
				293	Names[RTLIB::SYNC_FETCH_AND_NAND_1] = "__sync_fetch_and_nand_1";
				294	Names[RTLIB::SYNC_FETCH_AND_NAND_2] = "__sync_fetch_and_nand_2";
				295	Names[RTLIB::SYNC_FETCH_AND_NAND_4] = "__sync_fetch_and_nand_4";
				296	Names[RTLIB::SYNC_FETCH_AND_NAND_8] = "__sync_fetch_and_nand_8";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	297	}
				298
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	299	/// InitLibcallCallingConvs - Set default libcall CallingConvs.
				300	///
				301	static void InitLibcallCallingConvs(CallingConv::ID *CCs) {
				302	for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) {
				303	CCs[i] = CallingConv::C;
				304	}
				305	}
				306
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	307	/// getFPEXT - Return the FPEXT__ value for the given types, or
				308	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	309	RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	310	if (OpVT == MVT::f32) {
				311	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	312	return FPEXT_F32_F64;
				313	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	314
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	315	return UNKNOWN_LIBCALL;
				316	}
				317
				318	/// getFPROUND - Return the FPROUND__ value for the given types, or
				319	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	320	RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	321	if (RetVT == MVT::f32) {
				322	if (OpVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	323	return FPROUND_F64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	324	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	325	return FPROUND_F80_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	326	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	327	return FPROUND_PPCF128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	328	} else if (RetVT == MVT::f64) {
				329	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	330	return FPROUND_F80_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	331	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	332	return FPROUND_PPCF128_F64;
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	333	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	334
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	335	return UNKNOWN_LIBCALL;
				336	}
				337
				338	/// getFPTOSINT - Return the FPTOSINT__ value for the given types, or
				339	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	340	RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	341	if (OpVT == MVT::f32) {
				342	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	343	return FPTOSINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	344	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	345	return FPTOSINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	346	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	347	return FPTOSINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	348	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	349	return FPTOSINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	350	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	351	return FPTOSINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	352	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	353	if (RetVT == MVT::i8)
				354	return FPTOSINT_F64_I8;
				355	if (RetVT == MVT::i16)
				356	return FPTOSINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	357	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	358	return FPTOSINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	359	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	360	return FPTOSINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	361	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	362	return FPTOSINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	363	} else if (OpVT == MVT::f80) {
				364	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	365	return FPTOSINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	366	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	367	return FPTOSINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	368	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	369	return FPTOSINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	370	} else if (OpVT == MVT::ppcf128) {
				371	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	372	return FPTOSINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	373	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	374	return FPTOSINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	375	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	376	return FPTOSINT_PPCF128_I128;
				377	}
				378	return UNKNOWN_LIBCALL;
				379	}
				380
				381	/// getFPTOUINT - Return the FPTOUINT__ value for the given types, or
				382	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	383	RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	384	if (OpVT == MVT::f32) {
				385	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	386	return FPTOUINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	387	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	388	return FPTOUINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	389	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	390	return FPTOUINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	391	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	392	return FPTOUINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	393	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	394	return FPTOUINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	395	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	396	if (RetVT == MVT::i8)
				397	return FPTOUINT_F64_I8;
				398	if (RetVT == MVT::i16)
				399	return FPTOUINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	400	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	401	return FPTOUINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	402	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	403	return FPTOUINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	404	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	405	return FPTOUINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	406	} else if (OpVT == MVT::f80) {
				407	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	408	return FPTOUINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	409	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	410	return FPTOUINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	411	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	412	return FPTOUINT_F80_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	413	} else if (OpVT == MVT::ppcf128) {
				414	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	415	return FPTOUINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	416	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	417	return FPTOUINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	418	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	419	return FPTOUINT_PPCF128_I128;
				420	}
				421	return UNKNOWN_LIBCALL;
				422	}
				423
				424	/// getSINTTOFP - Return the SINTTOFP__ value for the given types, or
				425	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	426	RTLIB::Libcall RTLIB::getSINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	427	if (OpVT == MVT::i32) {
				428	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	429	return SINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	430	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	431	return SINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	432	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	433	return SINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	434	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	435	return SINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	436	} else if (OpVT == MVT::i64) {
				437	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	438	return SINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	439	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	440	return SINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	441	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	442	return SINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	443	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	444	return SINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	445	} else if (OpVT == MVT::i128) {
				446	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	447	return SINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	448	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	449	return SINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	450	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	451	return SINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	452	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	453	return SINTTOFP_I128_PPCF128;
				454	}
				455	return UNKNOWN_LIBCALL;
				456	}
				457
				458	/// getUINTTOFP - Return the UINTTOFP__ value for the given types, or
				459	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	460	RTLIB::Libcall RTLIB::getUINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	461	if (OpVT == MVT::i32) {
				462	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	463	return UINTTOFP_I32_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	464	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	465	return UINTTOFP_I32_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	466	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	467	return UINTTOFP_I32_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	468	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	469	return UINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	470	} else if (OpVT == MVT::i64) {
				471	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	472	return UINTTOFP_I64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	473	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	474	return UINTTOFP_I64_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	475	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	476	return UINTTOFP_I64_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	477	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	478	return UINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	479	} else if (OpVT == MVT::i128) {
				480	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	481	return UINTTOFP_I128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	482	else if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	483	return UINTTOFP_I128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	484	else if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	485	return UINTTOFP_I128_F80;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	486	else if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	487	return UINTTOFP_I128_PPCF128;
				488	}
				489	return UNKNOWN_LIBCALL;
				490	}
				491
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	492	/// InitCmpLibcallCCs - Set default comparison libcall CC.
				493	///
				494	static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
				495	memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
				496	CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
				497	CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
				498	CCs[RTLIB::UNE_F32] = ISD::SETNE;
				499	CCs[RTLIB::UNE_F64] = ISD::SETNE;
				500	CCs[RTLIB::OGE_F32] = ISD::SETGE;
				501	CCs[RTLIB::OGE_F64] = ISD::SETGE;
				502	CCs[RTLIB::OLT_F32] = ISD::SETLT;
				503	CCs[RTLIB::OLT_F64] = ISD::SETLT;
				504	CCs[RTLIB::OLE_F32] = ISD::SETLE;
				505	CCs[RTLIB::OLE_F64] = ISD::SETLE;
				506	CCs[RTLIB::OGT_F32] = ISD::SETGT;
				507	CCs[RTLIB::OGT_F64] = ISD::SETGT;
				508	CCs[RTLIB::UO_F32] = ISD::SETNE;
				509	CCs[RTLIB::UO_F64] = ISD::SETNE;
				510	CCs[RTLIB::O_F32] = ISD::SETEQ;
				511	CCs[RTLIB::O_F64] = ISD::SETEQ;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	512	}
				513
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	514	/// NOTE: The constructor takes ownership of TLOF.
Dan Gohman	f0757b0	2010-04-21 01:34:56 +0000	[diff] [blame]	515	TargetLowering::TargetLowering(const TargetMachine &tm,
				516	const TargetLoweringObjectFile *tlof)
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	517	: TM(tm), TD(TM.getTargetData()), TLOF(*tlof) {
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	518	// All operations default to being supported.
				519	memset(OpActions, 0, sizeof(OpActions));
Evan Cheng	0329466	2008-10-14 21:26:46 +0000	[diff] [blame]	520	memset(LoadExtActions, 0, sizeof(LoadExtActions));
Chris Lattner	ddf8956	2008-01-17 19:59:44 +0000	[diff] [blame]	521	memset(TruncStoreActions, 0, sizeof(TruncStoreActions));
Chris Lattner	c9133f9	2008-01-18 19:36:20 +0000	[diff] [blame]	522	memset(IndexedModeActions, 0, sizeof(IndexedModeActions));
Evan Cheng	7f04268	2008-10-15 02:05:31 +0000	[diff] [blame]	523	memset(CondCodeActions, 0, sizeof(CondCodeActions));
Dan Gohman	93f81e2	2007-07-09 20:49:44 +0000	[diff] [blame]	524
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	525	// Set default actions for various operations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	526	for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	527	// Default all indexed load / store to expand.
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	528	for (unsigned IM = (unsigned)ISD::PRE_INC;
				529	IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	530	setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
				531	setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	532	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	533
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	534	// These operations default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	535	setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
				536	setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	537	}
Evan Cheng	d2cde68	2008-03-10 19:38:10 +0000	[diff] [blame]	538
				539	// Most targets ignore the @llvm.prefetch intrinsic.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	540	setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	541
				542	// ConstantFP nodes default to expand. Targets can either change this to
Evan Cheng	eb2f969	2009-10-27 19:56:55 +0000	[diff] [blame]	543	// Legal, in which case all fp constants are legal, or use isFPImmLegal()
Nate Begeman	e179584	2008-02-14 08:57:00 +0000	[diff] [blame]	544	// to optimize expansions for certain constants.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	545	setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
				546	setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
				547	setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	548
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	549	// These library functions default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	550	setOperationAction(ISD::FLOG , MVT::f64, Expand);
				551	setOperationAction(ISD::FLOG2, MVT::f64, Expand);
				552	setOperationAction(ISD::FLOG10,MVT::f64, Expand);
				553	setOperationAction(ISD::FEXP , MVT::f64, Expand);
				554	setOperationAction(ISD::FEXP2, MVT::f64, Expand);
				555	setOperationAction(ISD::FLOG , MVT::f32, Expand);
				556	setOperationAction(ISD::FLOG2, MVT::f32, Expand);
				557	setOperationAction(ISD::FLOG10,MVT::f32, Expand);
				558	setOperationAction(ISD::FEXP , MVT::f32, Expand);
				559	setOperationAction(ISD::FEXP2, MVT::f32, Expand);
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	560
Chris Lattner	41bab0b	2008-01-15 21:58:08 +0000	[diff] [blame]	561	// Default ISD::TRAP to expand (which turns it into abort).
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	562	setOperationAction(ISD::TRAP, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	563
Owen Anderson	a69571c	2006-05-03 01:29:57 +0000	[diff] [blame]	564	IsLittleEndian = TD->isLittleEndian();
Owen Anderson	1d0be15	2009-08-13 21:58:54 +0000	[diff] [blame]	565	ShiftAmountTy = PointerTy = MVT::getIntegerVT(8*TD->getPointerSize());
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	566	memset(RegClassForVT, 0,MVT::LAST_VALUETYPEsizeof(TargetRegisterClass));
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	567	memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
Evan Cheng	a03a5dc	2006-02-14 08:38:30 +0000	[diff] [blame]	568	maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
Evan Cheng	6ebf7bc	2009-05-13 21:42:09 +0000	[diff] [blame]	569	benefitFromCodePlacementOpt = false;
Anton Korobeynikov	d27a258	2006-12-10 23:12:42 +0000	[diff] [blame]	570	UseUnderscoreSetJmp = false;
				571	UseUnderscoreLongJmp = false;
Chris Lattner	6618039	2007-02-25 01:28:05 +0000	[diff] [blame]	572	SelectIsExpensive = false;
Nate Begeman	405e3ec	2005-10-21 00:02:42 +0000	[diff] [blame]	573	IntDivIsCheap = false;
				574	Pow2DivIsCheap = false;
Chris Lattner	de189be	2010-11-30 18:12:52 +0000	[diff] [blame]	575	JumpIsExpensive = false;
Chris Lattner	ee4a765	2006-01-25 18:57:15 +0000	[diff] [blame]	576	StackPointerRegisterToSaveRestore = 0;
Jim Laskey	9bb3c93	2007-02-22 18:04:49 +0000	[diff] [blame]	577	ExceptionPointerRegister = 0;
				578	ExceptionSelectorRegister = 0;
Duncan Sands	0322808	2008-11-23 15:47:28 +0000	[diff] [blame]	579	BooleanContents = UndefinedBooleanContent;
Evan Cheng	211ffa1	2010-05-19 20:19:50 +0000	[diff] [blame]	580	SchedPreferenceInfo = Sched::Latency;
Chris Lattner	7acf5f3	2006-09-05 17:39:15 +0000	[diff] [blame]	581	JumpBufSize = 0;
Duraid Madina	0c9e0ff	2006-09-04 07:44:11 +0000	[diff] [blame]	582	JumpBufAlignment = 0;
Evan Cheng	fb8075d	2008-02-28 00:43:03 +0000	[diff] [blame]	583	PrefLoopAlignment = 0;
Rafael Espindola	cbeeae2	2010-07-11 04:01:49 +0000	[diff] [blame]	584	MinStackArgumentAlignment = 1;
Jim Grosbach	9a52649	2010-06-23 16:07:42 +0000	[diff] [blame]	585	ShouldFoldAtomicFences = false;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	586
				587	InitLibcallNames(LibcallRoutineNames);
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	588	InitCmpLibcallCCs(CmpLibcallCCs);
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	589	InitLibcallCallingConvs(LibcallCallingConvs);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	590	}
				591
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	592	TargetLowering::~TargetLowering() {
				593	delete &TLOF;
				594	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	595
Mon P Wang	f7ea6c3	2010-02-10 23:37:45 +0000	[diff] [blame]	596	/// canOpTrap - Returns true if the operation can trap for the value type.
				597	/// VT must be a legal type.
				598	bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const {
				599	assert(isTypeLegal(VT));
				600	switch (Op) {
				601	default:
				602	return false;
				603	case ISD::FDIV:
				604	case ISD::FREM:
				605	case ISD::SDIV:
				606	case ISD::UDIV:
				607	case ISD::SREM:
				608	case ISD::UREM:
				609	return true;
				610	}
				611	}
				612
				613
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	614	static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	615	unsigned &NumIntermediates,
				616	EVT &RegisterVT,
				617	TargetLowering *TLI) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	618	// Figure out the right, legal destination reg to copy into.
				619	unsigned NumElts = VT.getVectorNumElements();
				620	MVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	621
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	622	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	623
				624	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	625	// could break down into LHS/RHS like LegalizeDAG does.
				626	if (!isPowerOf2_32(NumElts)) {
				627	NumVectorRegs = NumElts;
				628	NumElts = 1;
				629	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	630
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	631	// Divide the input until we get to a supported size. This will always
				632	// end with a scalar if the target doesn't support vectors.
				633	while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) {
				634	NumElts >>= 1;
				635	NumVectorRegs <<= 1;
				636	}
				637
				638	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	639
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	640	MVT NewVT = MVT::getVectorVT(EltTy, NumElts);
				641	if (!TLI->isTypeLegal(NewVT))
				642	NewVT = EltTy;
				643	IntermediateVT = NewVT;
				644
				645	EVT DestVT = TLI->getRegisterType(NewVT);
				646	RegisterVT = DestVT;
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	647	if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	648	return NumVectorRegs*(NewVT.getSizeInBits()/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	649
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	650	// Otherwise, promotion or legal types use the same number of registers as
				651	// the vector decimated to the appropriate level.
				652	return NumVectorRegs;
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	653	}
				654
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	655	/// isLegalRC - Return true if the value types that can be represented by the
				656	/// specified register class are all legal.
				657	bool TargetLowering::isLegalRC(const TargetRegisterClass *RC) const {
				658	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				659	I != E; ++I) {
				660	if (isTypeLegal(*I))
				661	return true;
				662	}
				663	return false;
				664	}
				665
				666	/// hasLegalSuperRegRegClasses - Return true if the specified register class
				667	/// has one or more super-reg register classes that are legal.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	668	bool
				669	TargetLowering::hasLegalSuperRegRegClasses(const TargetRegisterClass *RC) const{
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	670	if (*RC->superregclasses_begin() == 0)
				671	return false;
				672	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				673	E = RC->superregclasses_end(); I != E; ++I) {
				674	const TargetRegisterClass RRC = I;
				675	if (isLegalRC(RRC))
				676	return true;
				677	}
				678	return false;
				679	}
				680
				681	/// findRepresentativeClass - Return the largest legal super-reg register class
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	682	/// of the register class for the specified type and its associated "cost".
				683	std::pair<const TargetRegisterClass*, uint8_t>
				684	TargetLowering::findRepresentativeClass(EVT VT) const {
				685	const TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy];
				686	if (!RC)
				687	return std::make_pair(RC, 0);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	688	const TargetRegisterClass *BestRC = RC;
				689	for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(),
				690	E = RC->superregclasses_end(); I != E; ++I) {
				691	const TargetRegisterClass RRC = I;
				692	if (RRC->isASubClass() \|\| !isLegalRC(RRC))
				693	continue;
				694	if (!hasLegalSuperRegRegClasses(RRC))
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	695	return std::make_pair(RRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	696	BestRC = RRC;
				697	}
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	698	return std::make_pair(BestRC, 1);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	699	}
				700
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	701
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	702	/// computeRegisterProperties - Once all of the register classes are added,
				703	/// this allows us to compute derived properties we expose.
				704	void TargetLowering::computeRegisterProperties() {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	705	assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE &&
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	706	"Too many value types for ValueTypeActions to hold!");
				707
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	708	// Everything defaults to needing one register.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	709	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	710	NumRegistersForVT[i] = 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	711	RegisterTypeForVT[i] = TransformToType[i] = (MVT::SimpleValueType)i;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	712	}
				713	// ...except isVoid, which doesn't need any registers.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	714	NumRegistersForVT[MVT::isVoid] = 0;
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	715
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	716	// Find the largest integer register class.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	717	unsigned LargestIntReg = MVT::LAST_INTEGER_VALUETYPE;
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	718	for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	719	assert(LargestIntReg != MVT::i1 && "No integer registers defined!");
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	720
				721	// Every integer value type larger than this largest register takes twice as
				722	// many registers to represent as the previous ValueType.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	723	for (unsigned ExpandedReg = LargestIntReg + 1; ; ++ExpandedReg) {
Dan Gohman	8a55ce4	2009-09-23 21:02:20 +0000	[diff] [blame]	724	EVT ExpandedVT = (MVT::SimpleValueType)ExpandedReg;
				725	if (!ExpandedVT.isInteger())
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	726	break;
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	727	NumRegistersForVT[ExpandedReg] = 2*NumRegistersForVT[ExpandedReg-1];
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	728	RegisterTypeForVT[ExpandedReg] = (MVT::SimpleValueType)LargestIntReg;
				729	TransformToType[ExpandedReg] = (MVT::SimpleValueType)(ExpandedReg - 1);
Dan Gohman	8a55ce4	2009-09-23 21:02:20 +0000	[diff] [blame]	730	ValueTypeActions.setTypeAction(ExpandedVT, Expand);
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	731	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	732
				733	// Inspect all of the ValueType's smaller than the largest integer
				734	// register to see which ones need promotion.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	735	unsigned LegalIntReg = LargestIntReg;
				736	for (unsigned IntReg = LargestIntReg - 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	737	IntReg >= (unsigned)MVT::i1; --IntReg) {
				738	EVT IVT = (MVT::SimpleValueType)IntReg;
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	739	if (isTypeLegal(IVT)) {
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	740	LegalIntReg = IntReg;
				741	} else {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	742	RegisterTypeForVT[IntReg] = TransformToType[IntReg] =
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	743	(MVT::SimpleValueType)LegalIntReg;
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	744	ValueTypeActions.setTypeAction(IVT, Promote);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	745	}
				746	}
				747
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	748	// ppcf128 type is really two f64's.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	749	if (!isTypeLegal(MVT::ppcf128)) {
				750	NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];
				751	RegisterTypeForVT[MVT::ppcf128] = MVT::f64;
				752	TransformToType[MVT::ppcf128] = MVT::f64;
				753	ValueTypeActions.setTypeAction(MVT::ppcf128, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	754	}
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	755
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	756	// Decide how to handle f64. If the target does not have native f64 support,
				757	// expand it to i64 and we will be generating soft float library calls.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	758	if (!isTypeLegal(MVT::f64)) {
				759	NumRegistersForVT[MVT::f64] = NumRegistersForVT[MVT::i64];
				760	RegisterTypeForVT[MVT::f64] = RegisterTypeForVT[MVT::i64];
				761	TransformToType[MVT::f64] = MVT::i64;
				762	ValueTypeActions.setTypeAction(MVT::f64, Expand);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	763	}
				764
				765	// Decide how to handle f32. If the target does not have native support for
				766	// f32, promote it to f64 if it is legal. Otherwise, expand it to i32.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	767	if (!isTypeLegal(MVT::f32)) {
				768	if (isTypeLegal(MVT::f64)) {
				769	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::f64];
				770	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::f64];
				771	TransformToType[MVT::f32] = MVT::f64;
				772	ValueTypeActions.setTypeAction(MVT::f32, Promote);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	773	} else {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	774	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::i32];
				775	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::i32];
				776	TransformToType[MVT::f32] = MVT::i32;
				777	ValueTypeActions.setTypeAction(MVT::f32, Expand);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	778	}
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	779	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	780
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	781	// Loop over all of the vector value types to see which need transformations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	782	for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE;
				783	i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	784	MVT VT = (MVT::SimpleValueType)i;
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	785	if (isTypeLegal(VT)) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	786
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	787	// Determine if there is a legal wider type. If so, we should promote to
				788	// that wider vector type.
				789	EVT EltVT = VT.getVectorElementType();
				790	unsigned NElts = VT.getVectorNumElements();
				791	if (NElts != 1) {
				792	bool IsLegalWiderType = false;
				793	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
				794	EVT SVT = (MVT::SimpleValueType)nVT;
				795	if (SVT.getVectorElementType() == EltVT &&
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	796	SVT.getVectorNumElements() > NElts &&
Dale Johannesen	e93d99c	2010-10-20 21:32:10 +0000	[diff] [blame]	797	isTypeLegal(SVT)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	798	TransformToType[i] = SVT;
				799	RegisterTypeForVT[i] = SVT;
				800	NumRegistersForVT[i] = 1;
				801	ValueTypeActions.setTypeAction(VT, Promote);
				802	IsLegalWiderType = true;
				803	break;
				804	}
				805	}
				806	if (IsLegalWiderType) continue;
				807	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	808
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	809	MVT IntermediateVT;
				810	EVT RegisterVT;
				811	unsigned NumIntermediates;
				812	NumRegistersForVT[i] =
				813	getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates,
				814	RegisterVT, this);
				815	RegisterTypeForVT[i] = RegisterVT;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	816
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	817	EVT NVT = VT.getPow2VectorType();
				818	if (NVT == VT) {
				819	// Type is already a power of 2. The default action is to split.
				820	TransformToType[i] = MVT::Other;
				821	ValueTypeActions.setTypeAction(VT, Expand);
				822	} else {
				823	TransformToType[i] = NVT;
				824	ValueTypeActions.setTypeAction(VT, Promote);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	825	}
Chris Lattner	3a593584	2006-03-16 19:50:01 +0000	[diff] [blame]	826	}
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	827
				828	// Determine the 'representative' register class for each value type.
				829	// An representative register class is the largest (meaning one which is
				830	// not a sub-register class / subreg register class) legal register class for
				831	// a group of value types. For example, on i386, i8, i16, and i32
				832	// representative would be GR32; while on x86_64 it's GR64.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	833	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	834	const TargetRegisterClass* RRC;
				835	uint8_t Cost;
				836	tie(RRC, Cost) = findRepresentativeClass((MVT::SimpleValueType)i);
				837	RepRegClassForVT[i] = RRC;
				838	RepRegClassCostForVT[i] = Cost;
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	839	}
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	840	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	841
Evan Cheng	7226158	2005-12-20 06:22:03 +0000	[diff] [blame]	842	const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
				843	return NULL;
				844	}
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	845
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	846
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	847	MVT::SimpleValueType TargetLowering::getSetCCResultType(EVT VT) const {
Owen Anderson	1d0be15	2009-08-13 21:58:54 +0000	[diff] [blame]	848	return PointerTy.SimpleTy;
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	849	}
				850
Sanjiv Gupta	8f17a36	2009-12-28 02:40:33 +0000	[diff] [blame]	851	MVT::SimpleValueType TargetLowering::getCmpLibcallReturnType() const {
				852	return MVT::i32; // return the default value
				853	}
				854
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	855	/// getVectorTypeBreakdown - Vector types are broken down into some number of
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	856	/// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32
				857	/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
				858	/// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	859	///
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	860	/// This method returns the number of registers needed, and the VT for each
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	861	/// register. It also returns the VT and quantity of the intermediate values
				862	/// before they are promoted/expanded.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	863	///
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	864	unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	865	EVT &IntermediateVT,
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	866	unsigned &NumIntermediates,
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	867	EVT &RegisterVT) const {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	868	unsigned NumElts = VT.getVectorNumElements();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	869
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	870	// If there is a wider vector type with the same element type as this one,
				871	// we should widen to that legal vector type. This handles things like
				872	// <2 x float> -> <4 x float>.
Chris Lattner	aafe626	2010-08-25 23:00:45 +0000	[diff] [blame]	873	if (NumElts != 1 && getTypeAction(VT) == Promote) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	874	RegisterVT = getTypeToTransformTo(Context, VT);
				875	if (isTypeLegal(RegisterVT)) {
				876	IntermediateVT = RegisterVT;
				877	NumIntermediates = 1;
				878	return 1;
				879	}
				880	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	881
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	882	// Figure out the right, legal destination reg to copy into.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	883	EVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	884
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	885	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	886
				887	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Nate Begeman	d73ab88	2007-11-27 19:28:48 +0000	[diff] [blame]	888	// could break down into LHS/RHS like LegalizeDAG does.
				889	if (!isPowerOf2_32(NumElts)) {
				890	NumVectorRegs = NumElts;
				891	NumElts = 1;
				892	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	893
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	894	// Divide the input until we get to a supported size. This will always
				895	// end with a scalar if the target doesn't support vectors.
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	896	while (NumElts > 1 && !isTypeLegal(
				897	EVT::getVectorVT(Context, EltTy, NumElts))) {
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	898	NumElts >>= 1;
				899	NumVectorRegs <<= 1;
				900	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	901
				902	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	903
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	904	EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	905	if (!isTypeLegal(NewVT))
				906	NewVT = EltTy;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	907	IntermediateVT = NewVT;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	908
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	909	EVT DestVT = getRegisterType(Context, NewVT);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	910	RegisterVT = DestVT;
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	911	if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	912	return NumVectorRegs*(NewVT.getSizeInBits()/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	913
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	914	// Otherwise, promotion or legal types use the same number of registers as
				915	// the vector decimated to the appropriate level.
				916	return NumVectorRegs;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	917	}
				918
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	919	/// Get the EVTs and ArgFlags collections that represent the legalized return
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	920	/// type of the given function. This does not require a DAG or a return value,
				921	/// and is suitable for use before any DAGs for the function are constructed.
				922	/// TODO: Move this out of TargetLowering.cpp.
				923	void llvm::GetReturnInfo(const Type* ReturnType, Attributes attr,
				924	SmallVectorImpl<ISD::OutputArg> &Outs,
				925	const TargetLowering &TLI,
				926	SmallVectorImpl<uint64_t> *Offsets) {
				927	SmallVector<EVT, 4> ValueVTs;
				928	ComputeValueVTs(TLI, ReturnType, ValueVTs);
				929	unsigned NumValues = ValueVTs.size();
				930	if (NumValues == 0) return;
				931	unsigned Offset = 0;
				932
				933	for (unsigned j = 0, f = NumValues; j != f; ++j) {
				934	EVT VT = ValueVTs[j];
				935	ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
				936
				937	if (attr & Attribute::SExt)
				938	ExtendKind = ISD::SIGN_EXTEND;
				939	else if (attr & Attribute::ZExt)
				940	ExtendKind = ISD::ZERO_EXTEND;
				941
				942	// FIXME: C calling convention requires the return type to be promoted to
				943	// at least 32-bit. But this is not necessary for non-C calling
				944	// conventions. The frontend should mark functions whose return values
				945	// require promoting with signext or zeroext attributes.
				946	if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
				947	EVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
				948	if (VT.bitsLT(MinVT))
				949	VT = MinVT;
				950	}
				951
				952	unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
				953	EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
				954	unsigned PartSize = TLI.getTargetData()->getTypeAllocSize(
				955	PartVT.getTypeForEVT(ReturnType->getContext()));
				956
				957	// 'inreg' on function refers to return value
				958	ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
				959	if (attr & Attribute::InReg)
				960	Flags.setInReg();
				961
				962	// Propagate extension type if any
				963	if (attr & Attribute::SExt)
				964	Flags.setSExt();
				965	else if (attr & Attribute::ZExt)
				966	Flags.setZExt();
				967
				968	for (unsigned i = 0; i < NumParts; ++i) {
				969	Outs.push_back(ISD::OutputArg(Flags, PartVT, /isFixed=/true));
				970	if (Offsets) {
				971	Offsets->push_back(Offset);
				972	Offset += PartSize;
				973	}
				974	}
				975	}
				976	}
				977
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	978	/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	979	/// function arguments in the caller parameter area. This is the actual
				980	/// alignment, not its logarithm.
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	981	unsigned TargetLowering::getByValTypeAlignment(const Type *Ty) const {
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	982	return TD->getCallFrameTypeAlignment(Ty);
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	983	}
				984
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	985	/// getJumpTableEncoding - Return the entry encoding for a jump table in the
				986	/// current function. The returned value is a member of the
				987	/// MachineJumpTableInfo::JTEntryKind enum.
				988	unsigned TargetLowering::getJumpTableEncoding() const {
				989	// In non-pic modes, just use the address of a block.
				990	if (getTargetMachine().getRelocationModel() != Reloc::PIC_)
				991	return MachineJumpTableInfo::EK_BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	992
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	993	// In PIC mode, if the target supports a GPRel32 directive, use it.
				994	if (getTargetMachine().getMCAsmInfo()->getGPRel32Directive() != 0)
				995	return MachineJumpTableInfo::EK_GPRel32BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	996
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	997	// Otherwise, use a label difference.
				998	return MachineJumpTableInfo::EK_LabelDifference32;
				999	}
				1000
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1001	SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
				1002	SelectionDAG &DAG) const {
Chris Lattner	f1214cb	2010-01-26 06:53:37 +0000	[diff] [blame]	1003	// If our PIC model is GP relative, use the global offset table as the base.
				1004	if (getJumpTableEncoding() == MachineJumpTableInfo::EK_GPRel32BlockAddress)
Dale Johannesen	b300d2a	2009-02-07 00:55:49 +0000	[diff] [blame]	1005	return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy());
Evan Cheng	cc41586	2007-11-09 01:32:10 +0000	[diff] [blame]	1006	return Table;
				1007	}
				1008
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1009	/// getPICJumpTableRelocBaseExpr - This returns the relocation base for the
				1010	/// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an
				1011	/// MCExpr.
				1012	const MCExpr *
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1013	TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
				1014	unsigned JTI,MCContext &Ctx) const{
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	1015	// The normal PIC reloc base is the label at the start of the jump table.
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1016	return MCSymbolRefExpr::Create(MF->getJTISymbol(JTI, Ctx), Ctx);
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1017	}
				1018
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1019	bool
				1020	TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
				1021	// Assume that everything is safe in static mode.
				1022	if (getTargetMachine().getRelocationModel() == Reloc::Static)
				1023	return true;
				1024
				1025	// In dynamic-no-pic mode, assume that known defined values are safe.
				1026	if (getTargetMachine().getRelocationModel() == Reloc::DynamicNoPIC &&
				1027	GA &&
				1028	!GA->getGlobal()->isDeclaration() &&
Duncan Sands	667d4b8	2009-03-07 15:45:40 +0000	[diff] [blame]	1029	!GA->getGlobal()->isWeakForLinker())
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1030	return true;
				1031
				1032	// Otherwise assume nothing is safe.
				1033	return false;
				1034	}
				1035
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	1036	//===----------------------------------------------------------------------===//
				1037	// Optimization Methods
				1038	//===----------------------------------------------------------------------===//
				1039
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1040	/// ShrinkDemandedConstant - Check to see if the specified operand of the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1041	/// specified instruction is a constant integer. If so, check to see if there
				1042	/// are any bits set in the constant that are not demanded. If so, shrink the
				1043	/// constant and return true.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1044	bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1045	const APInt &Demanded) {
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1046	DebugLoc dl = Op.getDebugLoc();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1047
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1048	// FIXME: ISD::SELECT, ISD::SELECT_CC
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1049	switch (Op.getOpcode()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1050	default: break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1051	case ISD::XOR:
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1052	case ISD::AND:
				1053	case ISD::OR: {
				1054	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				1055	if (!C) return false;
				1056
				1057	if (Op.getOpcode() == ISD::XOR &&
				1058	(C->getAPIntValue() \| (~Demanded)).isAllOnesValue())
				1059	return false;
				1060
				1061	// if we can expand it to have all bits set, do it
				1062	if (C->getAPIntValue().intersects(~Demanded)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1063	EVT VT = Op.getValueType();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1064	SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
				1065	DAG.getConstant(Demanded &
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1066	C->getAPIntValue(),
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1067	VT));
				1068	return CombineTo(Op, New);
				1069	}
				1070
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1071	break;
				1072	}
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1073	}
				1074
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1075	return false;
				1076	}
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1077
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1078	/// ShrinkDemandedOp - Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the
				1079	/// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening
				1080	/// cast, but it could be generalized for targets with other types of
				1081	/// implicit widening casts.
				1082	bool
				1083	TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(SDValue Op,
				1084	unsigned BitWidth,
				1085	const APInt &Demanded,
				1086	DebugLoc dl) {
				1087	assert(Op.getNumOperands() == 2 &&
				1088	"ShrinkDemandedOp only supports binary operators!");
				1089	assert(Op.getNode()->getNumValues() == 1 &&
				1090	"ShrinkDemandedOp only supports nodes with one result!");
				1091
				1092	// Don't do this if the node has another user, which may require the
				1093	// full value.
				1094	if (!Op.getNode()->hasOneUse())
				1095	return false;
				1096
				1097	// Search for the smallest integer type with free casts to and from
				1098	// Op's type. For expedience, just check power-of-2 integer types.
				1099	const TargetLowering &TLI = DAG.getTargetLoweringInfo();
				1100	unsigned SmallVTBits = BitWidth - Demanded.countLeadingZeros();
				1101	if (!isPowerOf2_32(SmallVTBits))
				1102	SmallVTBits = NextPowerOf2(SmallVTBits);
				1103	for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1104	EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits);
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1105	if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
				1106	TLI.isZExtFree(SmallVT, Op.getValueType())) {
				1107	// We found a type with free casts.
				1108	SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
				1109	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1110	Op.getNode()->getOperand(0)),
				1111	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1112	Op.getNode()->getOperand(1)));
				1113	SDValue Z = DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), X);
				1114	return CombineTo(Op, Z);
				1115	}
				1116	}
				1117	return false;
				1118	}
				1119
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1120	/// SimplifyDemandedBits - Look at Op. At this point, we know that only the
				1121	/// DemandedMask bits of the result of Op are ever used downstream. If we can
				1122	/// use this information to simplify Op, create a new simplified DAG node and
				1123	/// return true, returning the original and new nodes in Old and New. Otherwise,
				1124	/// analyze the expression and return a mask of KnownOne and KnownZero bits for
				1125	/// the expression (used to simplify the caller). The KnownZero/One bits may
				1126	/// only be accurate for those bits in the DemandedMask.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1127	bool TargetLowering::SimplifyDemandedBits(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1128	const APInt &DemandedMask,
				1129	APInt &KnownZero,
				1130	APInt &KnownOne,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1131	TargetLoweringOpt &TLO,
				1132	unsigned Depth) const {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1133	unsigned BitWidth = DemandedMask.getBitWidth();
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1134	assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth &&
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1135	"Mask size mismatches value type size!");
				1136	APInt NewMask = DemandedMask;
Dale Johannesen	6f38cb6	2009-02-07 19:59:05 +0000	[diff] [blame]	1137	DebugLoc dl = Op.getDebugLoc();
Chris Lattner	3fc5b01	2007-05-17 18:19:23 +0000	[diff] [blame]	1138
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1139	// Don't know anything.
				1140	KnownZero = KnownOne = APInt(BitWidth, 0);
				1141
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1142	// Other users may use these bits.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1143	if (!Op.getNode()->hasOneUse()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1144	if (Depth != 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1145	// If not at the root, Just compute the KnownZero/KnownOne bits to
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1146	// simplify things downstream.
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1147	TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth);
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1148	return false;
				1149	}
				1150	// If this is the root being simplified, allow it to have multiple uses,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1151	// just set the NewMask to all bits.
				1152	NewMask = APInt::getAllOnesValue(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1153	} else if (DemandedMask == 0) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1154	// Not demanding any bits from Op.
				1155	if (Op.getOpcode() != ISD::UNDEF)
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	1156	return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType()));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1157	return false;
				1158	} else if (Depth == 6) { // Limit search depth.
				1159	return false;
				1160	}
				1161
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1162	APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1163	switch (Op.getOpcode()) {
				1164	case ISD::Constant:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1165	// We know all of the bits for a constant!
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1166	KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & NewMask;
				1167	KnownZero = ~KnownOne & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1168	return false; // Don't fall through, will infinitely loop.
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1169	case ISD::AND:
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1170	// If the RHS is a constant, check to see if the LHS would be zero without
				1171	// using the bits from the RHS. Below, we use knowledge about the RHS to
				1172	// simplify the LHS, here we're using information from the LHS to simplify
				1173	// the RHS.
				1174	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1175	APInt LHSZero, LHSOne;
				1176	TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask,
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1177	LHSZero, LHSOne, Depth+1);
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1178	// If the LHS already has zeros where RHSC does, this and is dead.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1179	if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1180	return TLO.CombineTo(Op, Op.getOperand(0));
				1181	// If any of the set bits in the RHS are known zero on the LHS, shrink
				1182	// the constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1183	if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1184	return true;
				1185	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1186
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1187	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1188	KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1189	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1190	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1191	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1192	KnownZero2, KnownOne2, TLO, Depth+1))
				1193	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1194	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1195
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1196	// If all of the demanded bits are known one on one side, return the other.
				1197	// These bits cannot contribute to the result of the 'and'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1198	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1199	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1200	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1201	return TLO.CombineTo(Op, Op.getOperand(1));
				1202	// If all of the demanded bits in the inputs are known zeros, return zero.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1203	if ((NewMask & (KnownZero\|KnownZero2)) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1204	return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType()));
				1205	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1206	if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1207	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1208	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1209	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1210	return true;
				1211
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1212	// Output known-1 bits are only known if set in both the LHS & RHS.
				1213	KnownOne &= KnownOne2;
				1214	// Output known-0 are known to be clear if zero in either the LHS \| RHS.
				1215	KnownZero \|= KnownZero2;
				1216	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1217	case ISD::OR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1218	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1219	KnownOne, TLO, Depth+1))
				1220	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1221	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1222	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1223	KnownZero2, KnownOne2, TLO, Depth+1))
				1224	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1225	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1226
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1227	// If all of the demanded bits are known zero on one side, return the other.
				1228	// These bits cannot contribute to the result of the 'or'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1229	if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1230	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1231	if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1232	return TLO.CombineTo(Op, Op.getOperand(1));
				1233	// If all of the potentially set bits on one side are known to be set on
				1234	// the other side, just use the 'other' side.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1235	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1236	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1237	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1238	return TLO.CombineTo(Op, Op.getOperand(1));
				1239	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1240	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1241	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1242	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1243	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1244	return true;
				1245
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1246	// Output known-0 bits are only known if clear in both the LHS & RHS.
				1247	KnownZero &= KnownZero2;
				1248	// Output known-1 are known to be set if set in either the LHS \| RHS.
				1249	KnownOne \|= KnownOne2;
				1250	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1251	case ISD::XOR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1252	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1253	KnownOne, TLO, Depth+1))
				1254	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1255	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1256	if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1257	KnownOne2, TLO, Depth+1))
				1258	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1259	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1260
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1261	// If all of the demanded bits are known zero on one side, return the other.
				1262	// These bits cannot contribute to the result of the 'xor'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1263	if ((KnownZero & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1264	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1265	if ((KnownZero2 & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1266	return TLO.CombineTo(Op, Op.getOperand(1));
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1267	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1268	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1269	return true;
				1270
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1271	// If all of the unknown bits are known to be zero on one side or the other
				1272	// (but not both) turn this into an inclusive or.
				1273	// e.g. (A & C1)^(B & C2) -> (A & C1)\|(B & C2) iff C1&C2 == 0
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1274	if ((NewMask & ~KnownZero & ~KnownZero2) == 0)
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1275	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1276	Op.getOperand(0),
				1277	Op.getOperand(1)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1278
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1279	// Output known-0 bits are known if clear or set in both the LHS & RHS.
				1280	KnownZeroOut = (KnownZero & KnownZero2) \| (KnownOne & KnownOne2);
				1281	// Output known-1 are known to be set if set in only one of the LHS, RHS.
				1282	KnownOneOut = (KnownZero & KnownOne2) \| (KnownOne & KnownZero2);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1283
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1284	// If all of the demanded bits on one side are known, and all of the set
				1285	// bits on that side are also known to be set on the other side, turn this
				1286	// into an AND, as we know the bits will be cleared.
				1287	// e.g. (X \| C1) ^ C2 --> (X \| C1) & ~C2 iff (C1&C2) == C2
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1288	if ((NewMask & (KnownZero\|KnownOne)) == NewMask) { // all known
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1289	if ((KnownOne & KnownOne2) == KnownOne) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1290	EVT VT = Op.getValueType();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1291	SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1292	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1293	Op.getOperand(0), ANDC));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1294	}
				1295	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1296
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1297	// If the RHS is a constant, see if we can simplify it.
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1298	// for XOR, we prefer to force bits to 1 if they will make a -1.
				1299	// if we can't force bits, try to shrink constant
				1300	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
				1301	APInt Expanded = C->getAPIntValue() \| (~NewMask);
				1302	// if we can expand it to have all bits set, do it
				1303	if (Expanded.isAllOnesValue()) {
				1304	if (Expanded != C->getAPIntValue()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1305	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1306	SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1307	TLO.DAG.getConstant(Expanded, VT));
				1308	return TLO.CombineTo(Op, New);
				1309	}
				1310	// if it already has all the bits set, nothing to change
				1311	// but don't shrink either!
				1312	} else if (TLO.ShrinkDemandedConstant(Op, NewMask)) {
				1313	return true;
				1314	}
				1315	}
				1316
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1317	KnownZero = KnownZeroOut;
				1318	KnownOne = KnownOneOut;
				1319	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1320	case ISD::SELECT:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1321	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1322	KnownOne, TLO, Depth+1))
				1323	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1324	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1325	KnownOne2, TLO, Depth+1))
				1326	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1327	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1328	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1329
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1330	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1331	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1332	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1333
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1334	// Only known if known in both the LHS and RHS.
				1335	KnownOne &= KnownOne2;
				1336	KnownZero &= KnownZero2;
				1337	break;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1338	case ISD::SELECT_CC:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1339	if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1340	KnownOne, TLO, Depth+1))
				1341	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1342	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1343	KnownOne2, TLO, Depth+1))
				1344	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1345	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1346	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1347
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1348	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1349	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1350	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1351
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1352	// Only known if known in both the LHS and RHS.
				1353	KnownOne &= KnownOne2;
				1354	KnownZero &= KnownZero2;
				1355	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1356	case ISD::SHL:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1357	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1358	unsigned ShAmt = SA->getZExtValue();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1359	SDValue InOp = Op.getOperand(0);
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1360
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1361	// If the shift count is an invalid immediate, don't do anything.
				1362	if (ShAmt >= BitWidth)
				1363	break;
				1364
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1365	// If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
				1366	// single shift. We can do this if the bottom bits (which are shifted
				1367	// out) are never demanded.
				1368	if (InOp.getOpcode() == ISD::SRL &&
				1369	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1370	if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1371	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1372	unsigned Opc = ISD::SHL;
				1373	int Diff = ShAmt-C1;
				1374	if (Diff < 0) {
				1375	Diff = -Diff;
				1376	Opc = ISD::SRL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1377	}
				1378
				1379	SDValue NewSA =
Chris Lattner	4e7e6cd	2007-05-30 16:30:06 +0000	[diff] [blame]	1380	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1381	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1382	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1383	InOp.getOperand(0), NewSA));
				1384	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1385	}
				1386
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1387	if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1388	KnownZero, KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1389	return true;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1390
				1391	// Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
				1392	// are not demanded. This will likely allow the anyext to be folded away.
				1393	if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
				1394	SDValue InnerOp = InOp.getNode()->getOperand(0);
				1395	EVT InnerVT = InnerOp.getValueType();
				1396	if ((APInt::getHighBitsSet(BitWidth,
				1397	BitWidth - InnerVT.getSizeInBits()) &
				1398	DemandedMask) == 0 &&
				1399	isTypeDesirableForOp(ISD::SHL, InnerVT)) {
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1400	EVT ShTy = getShiftAmountTy();
				1401	if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
				1402	ShTy = InnerVT;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1403	SDValue NarrowShl =
				1404	TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1405	TLO.DAG.getConstant(ShAmt, ShTy));
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1406	return
				1407	TLO.CombineTo(Op,
				1408	TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
				1409	NarrowShl));
				1410	}
				1411	}
				1412
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1413	KnownZero <<= SA->getZExtValue();
				1414	KnownOne <<= SA->getZExtValue();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1415	// low bits known zero.
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1416	KnownZero \|= APInt::getLowBitsSet(BitWidth, SA->getZExtValue());
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1417	}
				1418	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1419	case ISD::SRL:
				1420	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1421	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1422	unsigned ShAmt = SA->getZExtValue();
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1423	unsigned VTSize = VT.getSizeInBits();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1424	SDValue InOp = Op.getOperand(0);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1425
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1426	// If the shift count is an invalid immediate, don't do anything.
				1427	if (ShAmt >= BitWidth)
				1428	break;
				1429
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1430	// If this is ((X << C1) >>u ShAmt), see if we can simplify this into a
				1431	// single shift. We can do this if the top bits (which are shifted out)
				1432	// are never demanded.
				1433	if (InOp.getOpcode() == ISD::SHL &&
				1434	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1435	if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1436	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1437	unsigned Opc = ISD::SRL;
				1438	int Diff = ShAmt-C1;
				1439	if (Diff < 0) {
				1440	Diff = -Diff;
				1441	Opc = ISD::SHL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1442	}
				1443
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1444	SDValue NewSA =
Chris Lattner	8c7d2d5	2007-04-17 22:53:02 +0000	[diff] [blame]	1445	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1446	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1447	InOp.getOperand(0), NewSA));
				1448	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1449	}
				1450
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1451	// Compute the new bits that are at the top now.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1452	if (SimplifyDemandedBits(InOp, (NewMask << ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1453	KnownZero, KnownOne, TLO, Depth+1))
				1454	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1455	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1456	KnownZero = KnownZero.lshr(ShAmt);
				1457	KnownOne = KnownOne.lshr(ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1458
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1459	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1460	KnownZero \|= HighBits; // High bits known zero.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1461	}
				1462	break;
				1463	case ISD::SRA:
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1464	// If this is an arithmetic shift right and only the low-bit is set, we can
				1465	// always convert this into a logical shr, even if the shift amount is
				1466	// variable. The low bit of the shift cannot be an input sign bit unless
				1467	// the shift amount is >= the size of the datatype, which is undefined.
				1468	if (DemandedMask == 1)
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1469	return TLO.CombineTo(Op,
				1470	TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
				1471	Op.getOperand(0), Op.getOperand(1)));
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1472
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1473	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1474	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1475	unsigned ShAmt = SA->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1476
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1477	// If the shift count is an invalid immediate, don't do anything.
				1478	if (ShAmt >= BitWidth)
				1479	break;
				1480
				1481	APInt InDemandedMask = (NewMask << ShAmt);
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1482
				1483	// If any of the demanded bits are produced by the sign extension, we also
				1484	// demand the input sign bit.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1485	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
				1486	if (HighBits.intersects(NewMask))
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1487	InDemandedMask \|= APInt::getSignBit(VT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1488
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1489	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1490	KnownZero, KnownOne, TLO, Depth+1))
				1491	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1492	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1493	KnownZero = KnownZero.lshr(ShAmt);
				1494	KnownOne = KnownOne.lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1495
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1496	// Handle the sign bit, adjusted to where it is now in the mask.
				1497	APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1498
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1499	// If the input sign bit is known to be zero, or if none of the top bits
				1500	// are demanded, turn this into an unsigned shift right.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1501	if (KnownZero.intersects(SignBit) \|\| (HighBits & ~NewMask) == HighBits) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1502	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1503	Op.getOperand(0),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1504	Op.getOperand(1)));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1505	} else if (KnownOne.intersects(SignBit)) { // New bits are known one.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1506	KnownOne \|= HighBits;
				1507	}
				1508	}
				1509	break;
				1510	case ISD::SIGN_EXTEND_INREG: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1511	EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1512
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1513	// Sign extension. Compute the demanded bits in the result that are not
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1514	// present in the input.
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1515	APInt NewBits =
				1516	APInt::getHighBitsSet(BitWidth,
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1517	BitWidth - EVT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1518
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1519	// If none of the extended bits are demanded, eliminate the sextinreg.
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1520	if ((NewBits & NewMask) == 0)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1521	return TLO.CombineTo(Op, Op.getOperand(0));
				1522
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1523	APInt InSignBit =
				1524	APInt::getSignBit(EVT.getScalarType().getSizeInBits()).zext(BitWidth);
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1525	APInt InputDemandedBits =
				1526	APInt::getLowBitsSet(BitWidth,
				1527	EVT.getScalarType().getSizeInBits()) &
				1528	NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1529
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1530	// Since the sign extended bits are demanded, we know that the sign
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1531	// bit is demanded.
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1532	InputDemandedBits \|= InSignBit;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1533
				1534	if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
				1535	KnownZero, KnownOne, TLO, Depth+1))
				1536	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1537	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1538
				1539	// If the sign bit of the input is known set or clear, then we know the
				1540	// top bits of the result.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1541
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1542	// If the input sign bit is known zero, convert this into a zero extension.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1543	if (KnownZero.intersects(InSignBit))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1544	return TLO.CombineTo(Op,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1545	TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,EVT));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1546
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1547	if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1548	KnownOne \|= NewBits;
				1549	KnownZero &= ~NewBits;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1550	} else { // Input sign bit unknown
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1551	KnownZero &= ~NewBits;
				1552	KnownOne &= ~NewBits;
				1553	}
				1554	break;
				1555	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1556	case ISD::ZERO_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1557	unsigned OperandBitWidth =
				1558	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1559	APInt InMask = NewMask.trunc(OperandBitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1560
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1561	// If none of the top bits are demanded, convert this into an any_extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1562	APInt NewBits =
				1563	APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask;
				1564	if (!NewBits.intersects(NewMask))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1565	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1566	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1567	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1568
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1569	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1570	KnownZero, KnownOne, TLO, Depth+1))
				1571	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1572	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1573	KnownZero = KnownZero.zext(BitWidth);
				1574	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1575	KnownZero \|= NewBits;
				1576	break;
				1577	}
				1578	case ISD::SIGN_EXTEND: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1579	EVT InVT = Op.getOperand(0).getValueType();
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1580	unsigned InBits = InVT.getScalarType().getSizeInBits();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1581	APInt InMask = APInt::getLowBitsSet(BitWidth, InBits);
Dan Gohman	9736028	2008-03-11 21:29:43 +0000	[diff] [blame]	1582	APInt InSignBit = APInt::getBitsSet(BitWidth, InBits - 1, InBits);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1583	APInt NewBits = ~InMask & NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1584
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1585	// If none of the top bits are demanded, convert this into an any_extend.
				1586	if (NewBits == 0)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1587	return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
				1588	Op.getValueType(),
				1589	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1590
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1591	// Since some of the sign extended bits are demanded, we know that the sign
				1592	// bit is demanded.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1593	APInt InDemandedBits = InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1594	InDemandedBits \|= InSignBit;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1595	InDemandedBits = InDemandedBits.trunc(InBits);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1596
				1597	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1598	KnownOne, TLO, Depth+1))
				1599	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1600	KnownZero = KnownZero.zext(BitWidth);
				1601	KnownOne = KnownOne.zext(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1602
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1603	// If the sign bit is known zero, convert this to a zero extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1604	if (KnownZero.intersects(InSignBit))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1605	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1606	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1607	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1608
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1609	// If the sign bit is known one, the top bits match.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1610	if (KnownOne.intersects(InSignBit)) {
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1611	KnownOne \|= NewBits;
				1612	KnownZero &= ~NewBits;
				1613	} else { // Otherwise, top bits aren't known.
				1614	KnownOne &= ~NewBits;
				1615	KnownZero &= ~NewBits;
				1616	}
				1617	break;
				1618	}
				1619	case ISD::ANY_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1620	unsigned OperandBitWidth =
				1621	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1622	APInt InMask = NewMask.trunc(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1623	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1624	KnownZero, KnownOne, TLO, Depth+1))
				1625	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1626	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1627	KnownZero = KnownZero.zext(BitWidth);
				1628	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1629	break;
				1630	}
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1631	case ISD::TRUNCATE: {
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1632	// Simplify the input, using demanded bit information, and compute the known
				1633	// zero/one bits live out.
Dan Gohman	042919c	2010-03-01 17:59:21 +0000	[diff] [blame]	1634	unsigned OperandBitWidth =
				1635	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1636	APInt TruncMask = NewMask.zext(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1637	if (SimplifyDemandedBits(Op.getOperand(0), TruncMask,
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1638	KnownZero, KnownOne, TLO, Depth+1))
				1639	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1640	KnownZero = KnownZero.trunc(BitWidth);
				1641	KnownOne = KnownOne.trunc(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1642
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1643	// If the input is only used by this truncate, see if we can shrink it based
				1644	// on the known demanded bits.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1645	if (Op.getOperand(0).getNode()->hasOneUse()) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1646	SDValue In = Op.getOperand(0);
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1647	switch (In.getOpcode()) {
				1648	default: break;
				1649	case ISD::SRL:
				1650	// Shrink SRL by a constant if none of the high bits shifted in are
				1651	// demanded.
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1652	if (TLO.LegalTypes() &&
				1653	!isTypeDesirableForOp(ISD::SRL, Op.getValueType()))
				1654	// Do not turn (vt1 truncate (vt2 srl)) into (vt1 srl) if vt1 is
				1655	// undesirable.
				1656	break;
				1657	ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1));
				1658	if (!ShAmt)
				1659	break;
				1660	APInt HighBits = APInt::getHighBitsSet(OperandBitWidth,
				1661	OperandBitWidth - BitWidth);
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1662	HighBits = HighBits.lshr(ShAmt->getZExtValue()).trunc(BitWidth);
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1663
				1664	if (ShAmt->getZExtValue() < BitWidth && !(HighBits & NewMask)) {
				1665	// None of the shifted in bits are needed. Add a truncate of the
				1666	// shift input, then shift it.
				1667	SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1668	Op.getValueType(),
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1669	In.getOperand(0));
				1670	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
				1671	Op.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1672	NewTrunc,
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1673	In.getOperand(1)));
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	1674	}
				1675	break;
				1676	}
				1677	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1678
				1679	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	1680	break;
				1681	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1682	case ISD::AssertZext: {
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	1683	// Demand all the bits of the input that are demanded in the output.
				1684	// The low bits are obvious; the high bits are demanded because we're
				1685	// asserting that they're zero here.
				1686	if (SimplifyDemandedBits(Op.getOperand(0), NewMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1687	KnownZero, KnownOne, TLO, Depth+1))
				1688	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1689	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	1690
				1691	EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1692	APInt InMask = APInt::getLowBitsSet(BitWidth,
				1693	VT.getSizeInBits());
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1694	KnownZero \|= ~InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1695	break;
				1696	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1697	case ISD::BITCAST:
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1698	#if 0
				1699	// If this is an FP->Int bitcast and if the sign bit is the only thing that
				1700	// is demanded, turn this into a FGETSIGN.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1701	if (NewMask == EVT::getIntegerVTSignBit(Op.getValueType()) &&
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	1702	MVT::isFloatingPoint(Op.getOperand(0).getValueType()) &&
				1703	!MVT::isVector(Op.getOperand(0).getValueType())) {
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1704	// Only do this xform if FGETSIGN is valid or if before legalize.
				1705	if (!TLO.AfterLegalize \|\|
				1706	isOperationLegal(ISD::FGETSIGN, Op.getValueType())) {
				1707	// Make a FGETSIGN + SHL to move the sign bit into the appropriate
				1708	// place. We expect the SHL to be eliminated by other optimizations.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1709	SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, Op.getValueType(),
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1710	Op.getOperand(0));
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1711	unsigned ShVal = Op.getValueType().getSizeInBits()-1;
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1712	SDValue ShAmt = TLO.DAG.getConstant(ShVal, getShiftAmountTy());
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	1713	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, Op.getValueType(),
				1714	Sign, ShAmt));
				1715	}
				1716	}
				1717	#endif
				1718	break;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1719	case ISD::ADD:
				1720	case ISD::MUL:
				1721	case ISD::SUB: {
				1722	// Add, Sub, and Mul don't demand any bits in positions beyond that
				1723	// of the highest bit demanded of them.
				1724	APInt LoMask = APInt::getLowBitsSet(BitWidth,
				1725	BitWidth - NewMask.countLeadingZeros());
				1726	if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
				1727	KnownOne2, TLO, Depth+1))
				1728	return true;
				1729	if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
				1730	KnownOne2, TLO, Depth+1))
				1731	return true;
				1732	// See if the operation should be performed at a smaller bit width.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1733	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1734	return true;
				1735	}
				1736	// FALL THROUGH
Dan Gohman	54eed37	2008-05-06 00:53:29 +0000	[diff] [blame]	1737	default:
Chris Lattner	1482b5f	2006-04-02 06:15:09 +0000	[diff] [blame]	1738	// Just use ComputeMaskedBits to compute output bits.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1739	TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth);
Chris Lattner	a6bc5a4	2006-02-27 01:00:42 +0000	[diff] [blame]	1740	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1741	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1742
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1743	// If we know the value of all of the demanded bits, return this as a
				1744	// constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1745	if ((NewMask & (KnownZero\|KnownOne)) == NewMask)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1746	return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType()));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1747
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1748	return false;
				1749	}
				1750
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1751	/// computeMaskedBitsForTargetNode - Determine which of the bits specified
				1752	/// in Mask are known to be either zero or one and return them in the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1753	/// KnownZero/KnownOne bitsets.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1754	void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
Dan Gohman	977a76f	2008-02-13 22:28:48 +0000	[diff] [blame]	1755	const APInt &Mask,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1756	APInt &KnownZero,
Dan Gohman	fd29e0e	2008-02-13 00:35:47 +0000	[diff] [blame]	1757	APInt &KnownOne,
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	1758	const SelectionDAG &DAG,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1759	unsigned Depth) const {
Chris Lattner	1b5232a	2006-04-02 06:19:46 +0000	[diff] [blame]	1760	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1761	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1762	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1763	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1764	"Should use MaskedValueIsZero if you don't know whether Op"
				1765	" is a target node!");
Dan Gohman	977a76f	2008-02-13 22:28:48 +0000	[diff] [blame]	1766	KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	1767	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	1768
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1769	/// ComputeNumSignBitsForTargetNode - This method can be implemented by
				1770	/// targets that want to expose additional information about sign bits to the
				1771	/// DAG Combiner.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1772	unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1773	unsigned Depth) const {
				1774	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				1775	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				1776	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				1777	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
				1778	"Should use ComputeNumSignBits if you don't know whether Op"
				1779	" is a target node!");
				1780	return 1;
				1781	}
				1782
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1783	/// ValueHasExactlyOneBitSet - Test if the given value is known to have exactly
				1784	/// one bit set. This differs from ComputeMaskedBits in that it doesn't need to
				1785	/// determine which bit is set.
				1786	///
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1787	static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1788	// A left-shift of a constant one will have exactly one bit set, because
				1789	// shifting the bit off the end is undefined.
				1790	if (Val.getOpcode() == ISD::SHL)
				1791	if (ConstantSDNode *C =
				1792	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1793	if (C->getAPIntValue() == 1)
				1794	return true;
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1795
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	1796	// Similarly, a right-shift of a constant sign-bit will have exactly
				1797	// one bit set.
				1798	if (Val.getOpcode() == ISD::SRL)
				1799	if (ConstantSDNode *C =
				1800	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				1801	if (C->getAPIntValue().isSignBit())
				1802	return true;
				1803
				1804	// More could be done here, though the above checks are enough
				1805	// to handle some common cases.
				1806
				1807	// Fall back to ComputeMaskedBits to catch other known cases.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1808	EVT OpVT = Val.getValueType();
Dan Gohman	5b870af	2010-03-02 02:14:38 +0000	[diff] [blame]	1809	unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1810	APInt Mask = APInt::getAllOnesValue(BitWidth);
				1811	APInt KnownZero, KnownOne;
				1812	DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	1813	return (KnownZero.countPopulation() == BitWidth - 1) &&
				1814	(KnownOne.countPopulation() == 1);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1815	}
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	1816
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1817	/// SimplifySetCC - Try to simplify a setcc built with the specified operands
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1818	/// and cc. If it is unable to simplify it, return a null SDValue.
				1819	SDValue
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1820	TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1821	ISD::CondCode Cond, bool foldBooleans,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1822	DAGCombinerInfo &DCI, DebugLoc dl) const {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1823	SelectionDAG &DAG = DCI.DAG;
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1824	LLVMContext &Context = *DAG.getContext();
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1825
				1826	// These setcc operations always fold.
				1827	switch (Cond) {
				1828	default: break;
				1829	case ISD::SETFALSE:
				1830	case ISD::SETFALSE2: return DAG.getConstant(0, VT);
				1831	case ISD::SETTRUE:
				1832	case ISD::SETTRUE2: return DAG.getConstant(1, VT);
				1833	}
				1834
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1835	if (isa<ConstantSDNode>(N0.getNode())) {
				1836	// Ensure that the constant occurs on the RHS, and fold constant
				1837	// comparisons.
				1838	return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
				1839	}
				1840
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	1841	if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
Dan Gohman	6c6cd1c	2008-03-03 22:22:56 +0000	[diff] [blame]	1842	const APInt &C1 = N1C->getAPIntValue();
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	1843
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1844	// If the LHS is '(srl (ctlz x), 5)', the RHS is 0/1, and this is an
				1845	// equality comparison, then we're just comparing whether X itself is
				1846	// zero.
				1847	if (N0.getOpcode() == ISD::SRL && (C1 == 0 \|\| C1 == 1) &&
				1848	N0.getOperand(0).getOpcode() == ISD::CTLZ &&
				1849	N0.getOperand(1).getOpcode() == ISD::Constant) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1850	const APInt &ShAmt
				1851	= cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1852	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
				1853	ShAmt == Log2_32(N0.getValueType().getSizeInBits())) {
				1854	if ((C1 == 0) == (Cond == ISD::SETEQ)) {
				1855	// (srl (ctlz x), 5) == 0 -> X != 0
				1856	// (srl (ctlz x), 5) != 1 -> X != 0
				1857	Cond = ISD::SETNE;
				1858	} else {
				1859	// (srl (ctlz x), 5) != 0 -> X == 0
				1860	// (srl (ctlz x), 5) == 1 -> X == 0
				1861	Cond = ISD::SETEQ;
				1862	}
				1863	SDValue Zero = DAG.getConstant(0, N0.getValueType());
				1864	return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
				1865	Zero, Cond);
				1866	}
				1867	}
				1868
				1869	// If the LHS is '(and load, const)', the RHS is 0,
				1870	// the test is for equality or unsigned, and all 1 bits of the const are
				1871	// in the same partial word, see if we can shorten the load.
				1872	if (DCI.isBeforeLegalize() &&
				1873	N0.getOpcode() == ISD::AND && C1 == 0 &&
				1874	N0.getNode()->hasOneUse() &&
				1875	isa<LoadSDNode>(N0.getOperand(0)) &&
				1876	N0.getOperand(0).getNode()->hasOneUse() &&
				1877	isa<ConstantSDNode>(N0.getOperand(1))) {
				1878	LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1879	APInt bestMask;
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1880	unsigned bestWidth = 0, bestOffset = 0;
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1881	if (!Lod->isVolatile() && Lod->isUnindexed()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1882	unsigned origWidth = N0.getValueType().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1883	unsigned maskWidth = origWidth;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1884	// We can narrow (e.g.) 16-bit extending loads on 32-bit target to
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1885	// 8 bits, but have to be careful...
				1886	if (Lod->getExtensionType() != ISD::NON_EXTLOAD)
				1887	origWidth = Lod->getMemoryVT().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1888	const APInt &Mask =
				1889	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1890	for (unsigned width = origWidth / 2; width>=8; width /= 2) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1891	APInt newMask = APInt::getLowBitsSet(maskWidth, width);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1892	for (unsigned offset=0; offset<origWidth/width; offset++) {
				1893	if ((newMask & Mask) == Mask) {
				1894	if (!TD->isLittleEndian())
				1895	bestOffset = (origWidth/width - offset - 1) * (width/8);
				1896	else
				1897	bestOffset = (uint64_t)offset * (width/8);
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1898	bestMask = Mask.lshr(offset * (width/8) * 8);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1899	bestWidth = width;
				1900	break;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	1901	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1902	newMask = newMask << width;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	1903	}
				1904	}
				1905	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1906	if (bestWidth) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1907	EVT newVT = EVT::getIntegerVT(Context, bestWidth);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1908	if (newVT.isRound()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1909	EVT PtrType = Lod->getOperand(1).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1910	SDValue Ptr = Lod->getBasePtr();
				1911	if (bestOffset != 0)
				1912	Ptr = DAG.getNode(ISD::ADD, dl, PtrType, Lod->getBasePtr(),
				1913	DAG.getConstant(bestOffset, PtrType));
				1914	unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
				1915	SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
Chris Lattner	ecf42c4	2010-09-21 16:36:31 +0000	[diff] [blame]	1916	Lod->getPointerInfo().getWithOffset(bestOffset),
David Greene	1e55944	2010-02-15 17:00:31 +0000	[diff] [blame]	1917	false, false, NewAlign);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1918	return DAG.getSetCC(dl, VT,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1919	DAG.getNode(ISD::AND, dl, newVT, NewLoad,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	1920	DAG.getConstant(bestMask.trunc(bestWidth),
				1921	newVT)),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1922	DAG.getConstant(0LL, newVT), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1923	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1924	}
				1925	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1926
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1927	// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
				1928	if (N0.getOpcode() == ISD::ZERO_EXTEND) {
				1929	unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits();
				1930
				1931	// If the comparison constant has bits in the upper part, the
				1932	// zero-extended value could never match.
				1933	if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(),
				1934	C1.getBitWidth() - InSize))) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1935	switch (Cond) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1936	case ISD::SETUGT:
				1937	case ISD::SETUGE:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1938	case ISD::SETEQ: return DAG.getConstant(0, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1939	case ISD::SETULT:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1940	case ISD::SETULE:
				1941	case ISD::SETNE: return DAG.getConstant(1, VT);
				1942	case ISD::SETGT:
				1943	case ISD::SETGE:
				1944	// True if the sign bit of C1 is set.
				1945	return DAG.getConstant(C1.isNegative(), VT);
				1946	case ISD::SETLT:
				1947	case ISD::SETLE:
				1948	// True if the sign bit of C1 isn't set.
				1949	return DAG.getConstant(C1.isNonNegative(), VT);
				1950	default:
Jakob Stoklund Olesen	78d1264	2009-07-24 18:22:59 +0000	[diff] [blame]	1951	break;
				1952	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1953	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	1954
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1955	// Otherwise, we can perform the comparison with the low bits.
				1956	switch (Cond) {
				1957	case ISD::SETEQ:
				1958	case ISD::SETNE:
				1959	case ISD::SETUGT:
				1960	case ISD::SETUGE:
				1961	case ISD::SETULT:
				1962	case ISD::SETULE: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1963	EVT newVT = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1964	if (DCI.isBeforeLegalizeOps() \|\|
				1965	(isOperationLegal(ISD::SETCC, newVT) &&
				1966	getCondCodeAction(Cond, newVT)==Legal))
				1967	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame^]	1968	DAG.getConstant(C1.trunc(InSize), newVT),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1969	Cond);
				1970	break;
				1971	}
				1972	default:
				1973	break; // todo, be more careful with signed comparisons
				1974	}
				1975	} else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	1976	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1977	EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1978	unsigned ExtSrcTyBits = ExtSrcTy.getSizeInBits();
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1979	EVT ExtDstTy = N0.getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1980	unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
				1981
Eli Friedman	ad78a88	2010-07-30 06:44:31 +0000	[diff] [blame]	1982	// If the constant doesn't fit into the number of bits for the source of
				1983	// the sign extension, it is impossible for both sides to be equal.
				1984	if (C1.getMinSignedBits() > ExtSrcTyBits)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1985	return DAG.getConstant(Cond == ISD::SETNE, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1986
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1987	SDValue ZextOp;
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1988	EVT Op0Ty = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	1989	if (Op0Ty == ExtSrcTy) {
				1990	ZextOp = N0.getOperand(0);
				1991	} else {
				1992	APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
				1993	ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
				1994	DAG.getConstant(Imm, Op0Ty));
				1995	}
				1996	if (!DCI.isCalledByLegalizer())
				1997	DCI.AddToWorklist(ZextOp.getNode());
				1998	// Otherwise, make this a use of a zext.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1999	return DAG.getSetCC(dl, VT, ZextOp,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2000	DAG.getConstant(C1 & APInt::getLowBitsSet(
				2001	ExtDstTyBits,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2002	ExtSrcTyBits),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2003	ExtDstTy),
				2004	Cond);
				2005	} else if ((N1C->isNullValue() \|\| N1C->getAPIntValue() == 1) &&
				2006	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2007	// SETCC (SETCC), [0\|1], [EQ\|NE] -> SETCC
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2008	if (N0.getOpcode() == ISD::SETCC &&
				2009	isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2010	bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (N1C->getAPIntValue() != 1);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2011	if (TrueWhenTrue)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2012	return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2013	// Invert the condition.
				2014	ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2015	CC = ISD::getSetCCInverse(CC,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2016	N0.getOperand(0).getValueType().isInteger());
				2017	return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2018	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2019
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2020	if ((N0.getOpcode() == ISD::XOR \|\|
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2021	(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2022	N0.getOperand(0).getOpcode() == ISD::XOR &&
				2023	N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
				2024	isa<ConstantSDNode>(N0.getOperand(1)) &&
				2025	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue() == 1) {
				2026	// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
				2027	// can only do this if the top bits are known zero.
				2028	unsigned BitWidth = N0.getValueSizeInBits();
				2029	if (DAG.MaskedValueIsZero(N0,
				2030	APInt::getHighBitsSet(BitWidth,
				2031	BitWidth-1))) {
				2032	// Okay, get the un-inverted input value.
				2033	SDValue Val;
				2034	if (N0.getOpcode() == ISD::XOR)
				2035	Val = N0.getOperand(0);
				2036	else {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2037	assert(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2038	N0.getOperand(0).getOpcode() == ISD::XOR);
				2039	// ((X^1)&1)^1 -> X & 1
				2040	Val = DAG.getNode(ISD::AND, dl, N0.getValueType(),
				2041	N0.getOperand(0).getOperand(0),
				2042	N0.getOperand(1));
				2043	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2044
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2045	return DAG.getSetCC(dl, VT, Val, N1,
				2046	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2047	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2048	} else if (N1C->getAPIntValue() == 1 &&
				2049	(VT == MVT::i1 \|\|
				2050	getBooleanContents() == ZeroOrOneBooleanContent)) {
				2051	SDValue Op0 = N0;
				2052	if (Op0.getOpcode() == ISD::TRUNCATE)
				2053	Op0 = Op0.getOperand(0);
				2054
				2055	if ((Op0.getOpcode() == ISD::XOR) &&
				2056	Op0.getOperand(0).getOpcode() == ISD::SETCC &&
				2057	Op0.getOperand(1).getOpcode() == ISD::SETCC) {
				2058	// (xor (setcc), (setcc)) == / != 1 -> (setcc) != / == (setcc)
				2059	Cond = (Cond == ISD::SETEQ) ? ISD::SETNE : ISD::SETEQ;
				2060	return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
				2061	Cond);
				2062	} else if (Op0.getOpcode() == ISD::AND &&
				2063	isa<ConstantSDNode>(Op0.getOperand(1)) &&
				2064	cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) {
				2065	// If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2066	if (Op0.getValueType().bitsGT(VT))
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2067	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2068	DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
				2069	DAG.getConstant(1, VT));
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2070	else if (Op0.getValueType().bitsLT(VT))
				2071	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2072	DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
				2073	DAG.getConstant(1, VT));
				2074
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2075	return DAG.getSetCC(dl, VT, Op0,
				2076	DAG.getConstant(0, Op0.getValueType()),
				2077	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2078	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2079	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2080	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2081
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2082	APInt MinVal, MaxVal;
				2083	unsigned OperandBitSize = N1C->getValueType(0).getSizeInBits();
				2084	if (ISD::isSignedIntSetCC(Cond)) {
				2085	MinVal = APInt::getSignedMinValue(OperandBitSize);
				2086	MaxVal = APInt::getSignedMaxValue(OperandBitSize);
				2087	} else {
				2088	MinVal = APInt::getMinValue(OperandBitSize);
				2089	MaxVal = APInt::getMaxValue(OperandBitSize);
				2090	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2091
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2092	// Canonicalize GE/LE comparisons to use GT/LT comparisons.
				2093	if (Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) {
				2094	if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
				2095	// X >= C0 --> X > (C0-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2096	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2097	DAG.getConstant(C1-1, N1.getValueType()),
				2098	(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
				2099	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2100
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2101	if (Cond == ISD::SETLE \|\| Cond == ISD::SETULE) {
				2102	if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
				2103	// X <= C0 --> X < (C0+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2104	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2105	DAG.getConstant(C1+1, N1.getValueType()),
				2106	(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
				2107	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2108
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2109	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal)
				2110	return DAG.getConstant(0, VT); // X < MIN --> false
				2111	if ((Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) && C1 == MinVal)
				2112	return DAG.getConstant(1, VT); // X >= MIN --> true
				2113	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal)
				2114	return DAG.getConstant(0, VT); // X > MAX --> false
				2115	if ((Cond == ISD::SETLE \|\| Cond == ISD::SETULE) && C1 == MaxVal)
				2116	return DAG.getConstant(1, VT); // X <= MAX --> true
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2117
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2118	// Canonicalize setgt X, Min --> setne X, Min
				2119	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MinVal)
				2120	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
				2121	// Canonicalize setlt X, Max --> setne X, Max
				2122	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MaxVal)
				2123	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2124
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2125	// If we have setult X, 1, turn it into seteq X, 0
				2126	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2127	return DAG.getSetCC(dl, VT, N0,
				2128	DAG.getConstant(MinVal, N0.getValueType()),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2129	ISD::SETEQ);
				2130	// If we have setugt X, Max-1, turn it into seteq X, Max
				2131	else if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2132	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2133	DAG.getConstant(MaxVal, N0.getValueType()),
				2134	ISD::SETEQ);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2135
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2136	// If we have "setcc X, C0", check to see if we can shrink the immediate
				2137	// by changing cc.
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2138
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2139	// SETUGT X, SINTMAX -> SETLT X, 0
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2140	if (Cond == ISD::SETUGT &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2141	C1 == APInt::getSignedMaxValue(OperandBitSize))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2142	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2143	DAG.getConstant(0, N1.getValueType()),
				2144	ISD::SETLT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2145
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2146	// SETULT X, SINTMIN -> SETGT X, -1
				2147	if (Cond == ISD::SETULT &&
				2148	C1 == APInt::getSignedMinValue(OperandBitSize)) {
				2149	SDValue ConstMinusOne =
				2150	DAG.getConstant(APInt::getAllOnesValue(OperandBitSize),
				2151	N1.getValueType());
				2152	return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT);
				2153	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2154
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2155	// Fold bit comparisons when we can.
				2156	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2157	(VT == N0.getValueType() \|\|
				2158	(isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
				2159	N0.getOpcode() == ISD::AND)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2160	if (ConstantSDNode *AndRHS =
				2161	dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2162	EVT ShiftTy = DCI.isBeforeLegalize() ?
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2163	getPointerTy() : getShiftAmountTy();
				2164	if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
				2165	// Perform the xform if the AND RHS is a single bit.
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2166	if (AndRHS->getAPIntValue().isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2167	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2168	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2169	DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy)));
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2170	}
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2171	} else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2172	// (X & 8) == 8 --> (X & 8) >> 3
				2173	// Perform the xform if C1 is a single bit.
				2174	if (C1.isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2175	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2176	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
				2177	DAG.getConstant(C1.logBase2(), ShiftTy)));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2178	}
				2179	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2180	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2181	}
				2182
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2183	if (isa<ConstantFPSDNode>(N0.getNode())) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2184	// Constant fold or commute setcc.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2185	SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond, dl);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2186	if (O.getNode()) return O;
				2187	} else if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2188	// If the RHS of an FP comparison is a constant, simplify it away in
				2189	// some cases.
				2190	if (CFP->getValueAPF().isNaN()) {
				2191	// If an operand is known to be a nan, we can fold it.
				2192	switch (ISD::getUnorderedFlavor(Cond)) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2193	default: llvm_unreachable("Unknown flavor!");
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2194	case 0: // Known false.
				2195	return DAG.getConstant(0, VT);
				2196	case 1: // Known true.
				2197	return DAG.getConstant(1, VT);
Chris Lattner	1c3e1e2	2007-12-30 21:21:10 +0000	[diff] [blame]	2198	case 2: // Undefined.
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	2199	return DAG.getUNDEF(VT);
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2200	}
				2201	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2202
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2203	// Otherwise, we know the RHS is not a NaN. Simplify the node to drop the
				2204	// constant if knowing that the operand is non-nan is enough. We prefer to
				2205	// have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to
				2206	// materialize 0.0.
				2207	if (Cond == ISD::SETO \|\| Cond == ISD::SETUO)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2208	return DAG.getSetCC(dl, VT, N0, N0, Cond);
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2209
				2210	// If the condition is not legal, see if we can find an equivalent one
				2211	// which is legal.
				2212	if (!isCondCodeLegal(Cond, N0.getValueType())) {
				2213	// If the comparison was an awkward floating-point == or != and one of
				2214	// the comparison operands is infinity or negative infinity, convert the
				2215	// condition to a less-awkward <= or >=.
				2216	if (CFP->getValueAPF().isInfinity()) {
				2217	if (CFP->getValueAPF().isNegative()) {
				2218	if (Cond == ISD::SETOEQ &&
				2219	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2220	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
				2221	if (Cond == ISD::SETUEQ &&
				2222	isCondCodeLegal(ISD::SETOLE, N0.getValueType()))
				2223	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
				2224	if (Cond == ISD::SETUNE &&
				2225	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2226	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGT);
				2227	if (Cond == ISD::SETONE &&
				2228	isCondCodeLegal(ISD::SETUGT, N0.getValueType()))
				2229	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
				2230	} else {
				2231	if (Cond == ISD::SETOEQ &&
				2232	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2233	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
				2234	if (Cond == ISD::SETUEQ &&
				2235	isCondCodeLegal(ISD::SETOGE, N0.getValueType()))
				2236	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
				2237	if (Cond == ISD::SETUNE &&
				2238	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2239	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULT);
				2240	if (Cond == ISD::SETONE &&
				2241	isCondCodeLegal(ISD::SETULT, N0.getValueType()))
				2242	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLT);
				2243	}
				2244	}
				2245	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2246	}
				2247
				2248	if (N0 == N1) {
				2249	// We can always fold X == X for integer setcc's.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2250	if (N0.getValueType().isInteger())
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2251	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2252	unsigned UOF = ISD::getUnorderedFlavor(Cond);
				2253	if (UOF == 2) // FP operators that are undefined on NaNs.
				2254	return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
				2255	if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
				2256	return DAG.getConstant(UOF, VT);
				2257	// Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
				2258	// if it is not already.
				2259	ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
				2260	if (NewCond != Cond)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2261	return DAG.getSetCC(dl, VT, N0, N1, NewCond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2262	}
				2263
				2264	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2265	N0.getValueType().isInteger()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2266	if (N0.getOpcode() == ISD::ADD \|\| N0.getOpcode() == ISD::SUB \|\|
				2267	N0.getOpcode() == ISD::XOR) {
				2268	// Simplify (X+Y) == (X+Z) --> Y == Z
				2269	if (N0.getOpcode() == N1.getOpcode()) {
				2270	if (N0.getOperand(0) == N1.getOperand(0))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2271	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2272	if (N0.getOperand(1) == N1.getOperand(1))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2273	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2274	if (DAG.isCommutativeBinOp(N0.getOpcode())) {
				2275	// If X op Y == Y op X, try other combinations.
				2276	if (N0.getOperand(0) == N1.getOperand(1))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2277	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2278	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2279	if (N0.getOperand(1) == N1.getOperand(0))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2280	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2281	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2282	}
				2283	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2284
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2285	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
				2286	if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
				2287	// Turn (X+C1) == C2 --> X == C2-C1
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2288	if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2289	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2290	DAG.getConstant(RHSC->getAPIntValue()-
				2291	LHSR->getAPIntValue(),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2292	N0.getValueType()), Cond);
				2293	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2294
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2295	// Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
				2296	if (N0.getOpcode() == ISD::XOR)
				2297	// If we know that all of the inverted bits are zero, don't bother
				2298	// performing the inversion.
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2299	if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue()))
				2300	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2301	DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2302	DAG.getConstant(LHSR->getAPIntValue() ^
				2303	RHSC->getAPIntValue(),
				2304	N0.getValueType()),
				2305	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2306	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2307
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2308	// Turn (C1-X) == C2 --> X == C1-C2
				2309	if (ConstantSDNode *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2310	if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) {
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2311	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2312	DAG.getSetCC(dl, VT, N0.getOperand(1),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2313	DAG.getConstant(SUBC->getAPIntValue() -
				2314	RHSC->getAPIntValue(),
				2315	N0.getValueType()),
				2316	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2317	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2318	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2319	}
				2320
				2321	// Simplify (X+Z) == X --> Z == 0
				2322	if (N0.getOperand(0) == N1)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2323	return DAG.getSetCC(dl, VT, N0.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2324	DAG.getConstant(0, N0.getValueType()), Cond);
				2325	if (N0.getOperand(1) == N1) {
				2326	if (DAG.isCommutativeBinOp(N0.getOpcode()))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2327	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2328	DAG.getConstant(0, N0.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2329	else if (N0.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2330	assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
				2331	// (Z-X) == X --> Z == X<<1
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2332	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2333	N1,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2334	DAG.getConstant(1, getShiftAmountTy()));
				2335	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2336	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2337	return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2338	}
				2339	}
				2340	}
				2341
				2342	if (N1.getOpcode() == ISD::ADD \|\| N1.getOpcode() == ISD::SUB \|\|
				2343	N1.getOpcode() == ISD::XOR) {
				2344	// Simplify X == (X+Z) --> Z == 0
				2345	if (N1.getOperand(0) == N0) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2346	return DAG.getSetCC(dl, VT, N1.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2347	DAG.getConstant(0, N1.getValueType()), Cond);
				2348	} else if (N1.getOperand(1) == N0) {
				2349	if (DAG.isCommutativeBinOp(N1.getOpcode())) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2350	return DAG.getSetCC(dl, VT, N1.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2351	DAG.getConstant(0, N1.getValueType()), Cond);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2352	} else if (N1.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2353	assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
				2354	// X == (Z-X) --> X<<1 == Z
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2355	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2356	DAG.getConstant(1, getShiftAmountTy()));
				2357	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2358	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2359	return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2360	}
				2361	}
				2362	}
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2363
Dan Gohman	2c65c3d	2009-01-29 16:18:12 +0000	[diff] [blame]	2364	// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2365	// Note that where y is variable and is known to have at most
				2366	// one bit set (for example, if it is z&1) we cannot do this;
				2367	// the expressions are not equivalent when y==0.
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2368	if (N0.getOpcode() == ISD::AND)
				2369	if (N0.getOperand(0) == N1 \|\| N0.getOperand(1) == N1) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2370	if (ValueHasExactlyOneBitSet(N1, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2371	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2372	SDValue Zero = DAG.getConstant(0, N1.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2373	return DAG.getSetCC(dl, VT, N0, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2374	}
				2375	}
				2376	if (N1.getOpcode() == ISD::AND)
				2377	if (N1.getOperand(0) == N0 \|\| N1.getOperand(1) == N0) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2378	if (ValueHasExactlyOneBitSet(N0, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2379	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2380	SDValue Zero = DAG.getConstant(0, N0.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2381	return DAG.getSetCC(dl, VT, N1, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2382	}
				2383	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2384	}
				2385
				2386	// Fold away ALL boolean setcc's.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2387	SDValue Temp;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2388	if (N0.getValueType() == MVT::i1 && foldBooleans) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2389	switch (Cond) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2390	default: llvm_unreachable("Unknown integer setcc!");
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2391	case ISD::SETEQ: // X == Y -> ~(X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2392	Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
				2393	N0 = DAG.getNOT(dl, Temp, MVT::i1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2394	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2395	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2396	break;
				2397	case ISD::SETNE: // X != Y --> (X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2398	N0 = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2399	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2400	case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y
				2401	case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> ~X & Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2402	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2403	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2404	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2405	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2406	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2407	case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X
				2408	case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> ~Y & X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2409	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2410	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2411	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2412	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2413	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2414	case ISD::SETULE: // X <=u Y --> X == 0 \| Y == 1 --> ~X \| Y
				2415	case ISD::SETGE: // X >=s Y --> X == 0 \| Y == 1 --> ~X \| Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2416	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2417	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2418	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2419	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2420	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2421	case ISD::SETUGE: // X >=u Y --> X == 1 \| Y == 0 --> ~Y \| X
				2422	case ISD::SETLE: // X <=s Y --> X == 1 \| Y == 0 --> ~Y \| X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2423	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2424	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2425	break;
				2426	}
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2427	if (VT != MVT::i1) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2428	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2429	DCI.AddToWorklist(N0.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2430	// FIXME: If running after legalize, we probably can't do this.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2431	N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2432	}
				2433	return N0;
				2434	}
				2435
				2436	// Could not fold it.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2437	return SDValue();
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2438	}
				2439
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2440	/// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
				2441	/// node is a GlobalAddress + offset.
Dan Gohman	46510a7	2010-04-15 01:51:59 +0000	[diff] [blame]	2442	bool TargetLowering::isGAPlusOffset(SDNode N, const GlobalValue &GA,
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2443	int64_t &Offset) const {
				2444	if (isa<GlobalAddressSDNode>(N)) {
Dan Gohman	9ea3f56	2008-06-09 22:05:52 +0000	[diff] [blame]	2445	GlobalAddressSDNode *GASD = cast<GlobalAddressSDNode>(N);
				2446	GA = GASD->getGlobal();
				2447	Offset += GASD->getOffset();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2448	return true;
				2449	}
				2450
				2451	if (N->getOpcode() == ISD::ADD) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2452	SDValue N1 = N->getOperand(0);
				2453	SDValue N2 = N->getOperand(1);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2454	if (isGAPlusOffset(N1.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2455	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2);
				2456	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2457	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2458	return true;
				2459	}
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2460	} else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2461	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1);
				2462	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	2463	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	2464	return true;
				2465	}
				2466	}
				2467	}
				2468	return false;
				2469	}
				2470
				2471
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2472	SDValue TargetLowering::
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2473	PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
				2474	// Default implementation: no optimization.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2475	return SDValue();
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	2476	}
				2477
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2478	//===----------------------------------------------------------------------===//
				2479	// Inline Assembler Implementation Methods
				2480	//===----------------------------------------------------------------------===//
				2481
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2482
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2483	TargetLowering::ConstraintType
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2484	TargetLowering::getConstraintType(const std::string &Constraint) const {
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2485	// FIXME: lots more standard ones to handle.
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2486	if (Constraint.size() == 1) {
				2487	switch (Constraint[0]) {
				2488	default: break;
				2489	case 'r': return C_RegisterClass;
				2490	case 'm': // memory
				2491	case 'o': // offsetable
				2492	case 'V': // not offsetable
				2493	return C_Memory;
				2494	case 'i': // Simple Integer or Relocatable Constant
				2495	case 'n': // Simple Integer
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2496	case 'E': // Floating Point Constant
				2497	case 'F': // Floating Point Constant
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2498	case 's': // Relocatable Constant
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2499	case 'p': // Address.
Chris Lattner	c13dd1c	2007-03-25 04:35:41 +0000	[diff] [blame]	2500	case 'X': // Allow ANY value.
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2501	case 'I': // Target registers.
				2502	case 'J':
				2503	case 'K':
				2504	case 'L':
				2505	case 'M':
				2506	case 'N':
				2507	case 'O':
				2508	case 'P':
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2509	case '<':
				2510	case '>':
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2511	return C_Other;
				2512	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2513	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2514
				2515	if (Constraint.size() > 1 && Constraint[0] == '{' &&
Chris Lattner	065421f	2007-03-25 02:18:14 +0000	[diff] [blame]	2516	Constraint[Constraint.size()-1] == '}')
				2517	return C_Register;
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	2518	return C_Unknown;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2519	}
				2520
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2521	/// LowerXConstraint - try to replace an X constraint, which matches anything,
				2522	/// with another that has more specific requirements based on the type of the
				2523	/// corresponding operand.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2524	const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const{
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2525	if (ConstraintVT.isInteger())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2526	return "r";
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2527	if (ConstraintVT.isFloatingPoint())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2528	return "f"; // works for many targets
				2529	return 0;
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	2530	}
				2531
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2532	/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
				2533	/// vector. If it is invalid, don't add anything to Ops.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2534	void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2535	char ConstraintLetter,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2536	std::vector<SDValue> &Ops,
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	2537	SelectionDAG &DAG) const {
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2538	switch (ConstraintLetter) {
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2539	default: break;
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2540	case 'X': // Allows any operand; labels (basic block) use this.
				2541	if (Op.getOpcode() == ISD::BasicBlock) {
				2542	Ops.push_back(Op);
				2543	return;
				2544	}
				2545	// fall through
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2546	case 'i': // Simple Integer or Relocatable Constant
				2547	case 'n': // Simple Integer
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	2548	case 's': { // Relocatable Constant
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2549	// These operands are interested in values of the form (GV+C), where C may
				2550	// be folded in as an offset of GV, or it may be explicitly added. Also, it
				2551	// is possible and fine if either GV or C are missing.
				2552	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op);
				2553	GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2554
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2555	// If we have "(add GV, C)", pull out GV/C
				2556	if (Op.getOpcode() == ISD::ADD) {
				2557	C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				2558	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0));
				2559	if (C == 0 \|\| GA == 0) {
				2560	C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
				2561	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
				2562	}
				2563	if (C == 0 \|\| GA == 0)
				2564	C = 0, GA = 0;
				2565	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2566
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2567	// If we find a valid operand, map to the TargetXXX version so that the
				2568	// value itself doesn't get selected.
				2569	if (GA) { // Either &GV or &GV+C
				2570	if (ConstraintLetter != 'n') {
				2571	int64_t Offs = GA->getOffset();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2572	if (C) Offs += C->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2573	Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(),
Devang Patel	07538ad	2010-07-15 18:45:27 +0000	[diff] [blame]	2574	C ? C->getDebugLoc() : DebugLoc(),
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2575	Op.getValueType(), Offs));
				2576	return;
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2577	}
				2578	}
				2579	if (C) { // just C, no GV.
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2580	// Simple constants are not allowed for 's'.
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2581	if (ConstraintLetter != 's') {
Dale Johannesen	78e3e52	2009-02-12 20:58:09 +0000	[diff] [blame]	2582	// gcc prints these as sign extended. Sign extend value to 64 bits
				2583	// now; without this it would get ZExt'd later in
				2584	// ScheduleDAGSDNodes::EmitNode, which is very generic.
				2585	Ops.push_back(DAG.getTargetConstant(C->getAPIntValue().getSExtValue(),
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2586	MVT::i64));
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	2587	return;
				2588	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2589	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	2590	break;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2591	}
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	2592	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	2593	}
				2594
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2595	std::vector<unsigned> TargetLowering::
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2596	getRegClassForInlineAsmConstraint(const std::string &Constraint,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2597	EVT VT) const {
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2598	return std::vector<unsigned>();
				2599	}
				2600
				2601
				2602	std::pair<unsigned, const TargetRegisterClass*> TargetLowering::
Chris Lattner	4217ca8dc	2006-02-21 23:11:00 +0000	[diff] [blame]	2603	getRegForInlineAsmConstraint(const std::string &Constraint,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2604	EVT VT) const {
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2605	if (Constraint[0] != '{')
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2606	return std::make_pair(0u, static_cast<TargetRegisterClass*>(0));
Chris Lattner	a55079a	2006-02-01 01:29:47 +0000	[diff] [blame]	2607	assert(*(Constraint.end()-1) == '}' && "Not a brace enclosed constraint?");
				2608
				2609	// Remove the braces from around the name.
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2610	StringRef RegName(Constraint.data()+1, Constraint.size()-2);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2611
				2612	// Figure out which register class contains this reg.
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	2613	const TargetRegisterInfo *RI = TM.getRegisterInfo();
				2614	for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2615	E = RI->regclass_end(); RCI != E; ++RCI) {
				2616	const TargetRegisterClass RC = RCI;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2617
				2618	// If none of the value types for this register class are valid, we
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	2619	// can't use it. For example, 64-bit reg classes on 32-bit targets.
				2620	bool isLegal = false;
				2621	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				2622	I != E; ++I) {
				2623	if (isTypeLegal(*I)) {
				2624	isLegal = true;
				2625	break;
				2626	}
				2627	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2628
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	2629	if (!isLegal) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2630
				2631	for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2632	I != E; ++I) {
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	2633	if (RegName.equals_lower(RI->getName(*I)))
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2634	return std::make_pair(*I, RC);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	2635	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2636	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2637
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	2638	return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2639	}
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	2640
				2641	//===----------------------------------------------------------------------===//
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2642	// Constraint Selection.
				2643
Chris Lattner	6bdcda3	2008-10-17 16:47:46 +0000	[diff] [blame]	2644	/// isMatchingInputConstraint - Return true of this is an input operand that is
				2645	/// a matching constraint like "4".
				2646	bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	2647	assert(!ConstraintCode.empty() && "No known constraint!");
				2648	return isdigit(ConstraintCode[0]);
				2649	}
				2650
				2651	/// getMatchedOperand - If this is an input matching constraint, this method
				2652	/// returns the output operand it matches.
				2653	unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
				2654	assert(!ConstraintCode.empty() && "No known constraint!");
				2655	return atoi(ConstraintCode.c_str());
				2656	}
				2657
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2658
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2659	/// ParseConstraints - Split up the constraint string from the inline
				2660	/// assembly value into the specific constraints and their prefixes,
				2661	/// and also tie in the associated operand values.
				2662	/// If this returns an empty vector, and if the constraint string itself
				2663	/// isn't empty, there was an error parsing.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2664	TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2665	ImmutableCallSite CS) const {
				2666	/// ConstraintOperands - Information about all of the constraints.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2667	AsmOperandInfoVector ConstraintOperands;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2668	const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2669	unsigned maCount = 0; // Largest number of multiple alternative constraints.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2670
				2671	// Do a prepass over the constraints, canonicalizing them, and building up the
				2672	// ConstraintOperands list.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2673	InlineAsm::ConstraintInfoVector
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2674	ConstraintInfos = IA->ParseConstraints();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2675
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2676	unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
				2677	unsigned ResNo = 0; // ResNo - The result number of the next output.
				2678
				2679	for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
				2680	ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
				2681	AsmOperandInfo &OpInfo = ConstraintOperands.back();
				2682
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2683	// Update multiple alternative constraint count.
				2684	if (OpInfo.multipleAlternatives.size() > maCount)
				2685	maCount = OpInfo.multipleAlternatives.size();
				2686
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2687	OpInfo.ConstraintVT = MVT::Other;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2688
				2689	// Compute the value type for each operand.
				2690	switch (OpInfo.Type) {
				2691	case InlineAsm::isOutput:
				2692	// Indirect outputs just consume an argument.
				2693	if (OpInfo.isIndirect) {
				2694	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2695	break;
				2696	}
				2697
				2698	// The return value of the call is this value. As such, there is no
				2699	// corresponding argument.
				2700	assert(!CS.getType()->isVoidTy() &&
				2701	"Bad inline asm!");
				2702	if (const StructType *STy = dyn_cast<StructType>(CS.getType())) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2703	OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo));
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2704	} else {
				2705	assert(ResNo == 0 && "Asm only has one result!");
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2706	OpInfo.ConstraintVT = getValueType(CS.getType());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2707	}
				2708	++ResNo;
				2709	break;
				2710	case InlineAsm::isInput:
				2711	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				2712	break;
				2713	case InlineAsm::isClobber:
				2714	// Nothing to do.
				2715	break;
				2716	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2717
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2718	if (OpInfo.CallOperandVal) {
				2719	const llvm::Type *OpTy = OpInfo.CallOperandVal->getType();
				2720	if (OpInfo.isIndirect) {
				2721	const llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
				2722	if (!PtrTy)
				2723	report_fatal_error("Indirect operand for inline asm not a pointer!");
				2724	OpTy = PtrTy->getElementType();
				2725	}
				2726	// If OpTy is not a single value, it may be a struct/union that we
				2727	// can tile with integers.
				2728	if (!OpTy->isSingleValueType() && OpTy->isSized()) {
				2729	unsigned BitSize = TD->getTypeSizeInBits(OpTy);
				2730	switch (BitSize) {
				2731	default: break;
				2732	case 1:
				2733	case 8:
				2734	case 16:
				2735	case 32:
				2736	case 64:
				2737	case 128:
Dale Johannesen	71365d3	2010-11-09 01:15:07 +0000	[diff] [blame]	2738	OpInfo.ConstraintVT =
				2739	EVT::getEVT(IntegerType::get(OpTy->getContext(), BitSize), true);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2740	break;
				2741	}
				2742	} else if (dyn_cast<PointerType>(OpTy)) {
				2743	OpInfo.ConstraintVT = MVT::getIntegerVT(8*TD->getPointerSize());
				2744	} else {
				2745	OpInfo.ConstraintVT = EVT::getEVT(OpTy, true);
				2746	}
				2747	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2748	}
				2749
				2750	// If we have multiple alternative constraints, select the best alternative.
				2751	if (ConstraintInfos.size()) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2752	if (maCount) {
				2753	unsigned bestMAIndex = 0;
				2754	int bestWeight = -1;
				2755	// weight: -1 = invalid match, and 0 = so-so match to 5 = good match.
				2756	int weight = -1;
				2757	unsigned maIndex;
				2758	// Compute the sums of the weights for each alternative, keeping track
				2759	// of the best (highest weight) one so far.
				2760	for (maIndex = 0; maIndex < maCount; ++maIndex) {
				2761	int weightSum = 0;
				2762	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2763	cIndex != eIndex; ++cIndex) {
				2764	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
				2765	if (OpInfo.Type == InlineAsm::isClobber)
				2766	continue;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2767
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2768	// If this is an output operand with a matching input operand,
				2769	// look up the matching input. If their types mismatch, e.g. one
				2770	// is an integer, the other is floating point, or their sizes are
				2771	// different, flag it as an maCantMatch.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2772	if (OpInfo.hasMatchingInput()) {
				2773	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2774	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				2775	if ((OpInfo.ConstraintVT.isInteger() !=
				2776	Input.ConstraintVT.isInteger()) \|\|
				2777	(OpInfo.ConstraintVT.getSizeInBits() !=
				2778	Input.ConstraintVT.getSizeInBits())) {
				2779	weightSum = -1; // Can't match.
				2780	break;
				2781	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2782	}
				2783	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2784	weight = getMultipleConstraintMatchWeight(OpInfo, maIndex);
				2785	if (weight == -1) {
				2786	weightSum = -1;
				2787	break;
				2788	}
				2789	weightSum += weight;
				2790	}
				2791	// Update best.
				2792	if (weightSum > bestWeight) {
				2793	bestWeight = weightSum;
				2794	bestMAIndex = maIndex;
				2795	}
				2796	}
				2797
				2798	// Now select chosen alternative in each constraint.
				2799	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2800	cIndex != eIndex; ++cIndex) {
				2801	AsmOperandInfo& cInfo = ConstraintOperands[cIndex];
				2802	if (cInfo.Type == InlineAsm::isClobber)
				2803	continue;
				2804	cInfo.selectAlternative(bestMAIndex);
				2805	}
				2806	}
				2807	}
				2808
				2809	// Check and hook up tied operands, choose constraint code to use.
				2810	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				2811	cIndex != eIndex; ++cIndex) {
				2812	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2813
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2814	// If this is an output operand with a matching input operand, look up the
				2815	// matching input. If their types mismatch, e.g. one is an integer, the
				2816	// other is floating point, or their sizes are different, flag it as an
				2817	// error.
				2818	if (OpInfo.hasMatchingInput()) {
				2819	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2820
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2821	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				2822	if ((OpInfo.ConstraintVT.isInteger() !=
				2823	Input.ConstraintVT.isInteger()) \|\|
				2824	(OpInfo.ConstraintVT.getSizeInBits() !=
				2825	Input.ConstraintVT.getSizeInBits())) {
				2826	report_fatal_error("Unsupported asm: input constraint"
				2827	" with a matching output constraint of"
				2828	" incompatible type!");
				2829	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2830	}
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2831
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2832	}
				2833	}
				2834
				2835	return ConstraintOperands;
				2836	}
				2837
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	2838
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2839	/// getConstraintGenerality - Return an integer indicating how general CT
				2840	/// is.
				2841	static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
				2842	switch (CT) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2843	default: llvm_unreachable("Unknown constraint type!");
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2844	case TargetLowering::C_Other:
				2845	case TargetLowering::C_Unknown:
				2846	return 0;
				2847	case TargetLowering::C_Register:
				2848	return 1;
				2849	case TargetLowering::C_RegisterClass:
				2850	return 2;
				2851	case TargetLowering::C_Memory:
				2852	return 3;
				2853	}
				2854	}
				2855
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2856	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2857	/// This object must already have been set up with the operand type
				2858	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2859	TargetLowering::ConstraintWeight
				2860	TargetLowering::getMultipleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2861	AsmOperandInfo &info, int maIndex) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2862	InlineAsm::ConstraintCodeVector *rCodes;
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2863	if (maIndex >= (int)info.multipleAlternatives.size())
				2864	rCodes = &info.Codes;
				2865	else
				2866	rCodes = &info.multipleAlternatives[maIndex].Codes;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2867	ConstraintWeight BestWeight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2868
				2869	// Loop over the options, keeping track of the most general one.
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	2870	for (unsigned i = 0, e = rCodes->size(); i != e; ++i) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2871	ConstraintWeight weight =
				2872	getSingleConstraintMatchWeight(info, (*rCodes)[i].c_str());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2873	if (weight > BestWeight)
				2874	BestWeight = weight;
				2875	}
				2876
				2877	return BestWeight;
				2878	}
				2879
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2880	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2881	/// This object must already have been set up with the operand type
				2882	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2883	TargetLowering::ConstraintWeight
				2884	TargetLowering::getSingleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2885	AsmOperandInfo &info, const char *constraint) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2886	ConstraintWeight weight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2887	Value *CallOperandVal = info.CallOperandVal;
				2888	// If we don't have a value, we can't do a match,
				2889	// but allow it at the lowest weight.
				2890	if (CallOperandVal == NULL)
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2891	return CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2892	// Look at the constraint type.
				2893	switch (*constraint) {
				2894	case 'i': // immediate integer.
				2895	case 'n': // immediate integer with a known value.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2896	if (isa<ConstantInt>(CallOperandVal))
				2897	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2898	break;
				2899	case 's': // non-explicit intregal immediate.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2900	if (isa<GlobalValue>(CallOperandVal))
				2901	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2902	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2903	case 'E': // immediate float if host format.
				2904	case 'F': // immediate float.
				2905	if (isa<ConstantFP>(CallOperandVal))
				2906	weight = CW_Constant;
				2907	break;
				2908	case '<': // memory operand with autodecrement.
				2909	case '>': // memory operand with autoincrement.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2910	case 'm': // memory operand.
				2911	case 'o': // offsettable memory operand
				2912	case 'V': // non-offsettable memory operand
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2913	weight = CW_Memory;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2914	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2915	case 'r': // general register.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2916	case 'g': // general register, memory operand or immediate integer.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2917	// note: Clang converts "g" to "imr".
				2918	if (CallOperandVal->getType()->isIntegerTy())
				2919	weight = CW_Register;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2920	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2921	case 'X': // any operand.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2922	default:
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	2923	weight = CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	2924	break;
				2925	}
				2926	return weight;
				2927	}
				2928
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2929	/// ChooseConstraint - If there are multiple different constraints that we
				2930	/// could pick for this operand (e.g. "imr") try to pick the 'best' one.
Chris Lattner	24e1a9d	2008-04-27 01:49:46 +0000	[diff] [blame]	2931	/// This is somewhat tricky: constraints fall into four classes:
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2932	/// Other -> immediates and magic values
				2933	/// Register -> one specific register
				2934	/// RegisterClass -> a group of regs
				2935	/// Memory -> memory
				2936	/// Ideally, we would pick the most specific constraint possible: if we have
				2937	/// something that fits into a register, we would pick it. The problem here
				2938	/// is that if we have something that could either be in a register or in
				2939	/// memory that use of the register could cause selection of other
				2940	/// operands to fail: they might only succeed if we pick memory. Because of
				2941	/// this the heuristic we use is:
				2942	///
				2943	/// 1) If there is an 'other' constraint, and if the operand is valid for
				2944	/// that constraint, use it. This makes us take advantage of 'i'
				2945	/// constraints when available.
				2946	/// 2) Otherwise, pick the most general constraint present. This prefers
				2947	/// 'm' over 'r', for example.
				2948	///
				2949	static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo,
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	2950	const TargetLowering &TLI,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2951	SDValue Op, SelectionDAG *DAG) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2952	assert(OpInfo.Codes.size() > 1 && "Doesn't have multiple constraint options");
				2953	unsigned BestIdx = 0;
				2954	TargetLowering::ConstraintType BestType = TargetLowering::C_Unknown;
				2955	int BestGenerality = -1;
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	2956
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2957	// Loop over the options, keeping track of the most general one.
				2958	for (unsigned i = 0, e = OpInfo.Codes.size(); i != e; ++i) {
				2959	TargetLowering::ConstraintType CType =
				2960	TLI.getConstraintType(OpInfo.Codes[i]);
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	2961
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	2962	// If this is an 'other' constraint, see if the operand is valid for it.
				2963	// For example, on X86 we might have an 'rI' constraint. If the operand
				2964	// is an integer in the range [0..31] we want to use I (saving a load
				2965	// of a register), otherwise we must use 'r'.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2966	if (CType == TargetLowering::C_Other && Op.getNode()) {
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	2967	assert(OpInfo.Codes[i].size() == 1 &&
				2968	"Unhandled multi-letter 'other' constraint");
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2969	std::vector<SDValue> ResultOps;
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	2970	TLI.LowerAsmOperandForConstraint(Op, OpInfo.Codes[i][0],
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	2971	ResultOps, *DAG);
				2972	if (!ResultOps.empty()) {
				2973	BestType = CType;
				2974	BestIdx = i;
				2975	break;
				2976	}
				2977	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2978
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	2979	// Things with matching constraints can only be registers, per gcc
				2980	// documentation. This mainly affects "g" constraints.
				2981	if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
				2982	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2983
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2984	// This constraint letter is more general than the previous one, use it.
				2985	int Generality = getConstraintGenerality(CType);
				2986	if (Generality > BestGenerality) {
				2987	BestType = CType;
				2988	BestIdx = i;
				2989	BestGenerality = Generality;
				2990	}
				2991	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2992
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	2993	OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
				2994	OpInfo.ConstraintType = BestType;
				2995	}
				2996
				2997	/// ComputeConstraintToUse - Determines the constraint code and constraint
				2998	/// type to use for the specific AsmOperandInfo, setting
				2999	/// OpInfo.ConstraintCode and OpInfo.ConstraintType.
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3000	void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3001	SDValue Op,
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3002	SelectionDAG *DAG) const {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3003	assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3004
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3005	// Single-letter constraints ('r') are very common.
				3006	if (OpInfo.Codes.size() == 1) {
				3007	OpInfo.ConstraintCode = OpInfo.Codes[0];
				3008	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3009	} else {
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3010	ChooseConstraint(OpInfo, *this, Op, DAG);
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3011	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3012
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3013	// 'X' matches anything.
				3014	if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) {
				3015	// Labels and constants are handled elsewhere ('X' is the only thing
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3016	// that matches labels). For Functions, the type here is the type of
Dale Johannesen	5339c55	2009-07-20 23:27:39 +0000	[diff] [blame]	3017	// the result, which is not what we want to look at; leave them alone.
				3018	Value *v = OpInfo.CallOperandVal;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3019	if (isa<BasicBlock>(v) \|\| isa<ConstantInt>(v) \|\| isa<Function>(v)) {
				3020	OpInfo.CallOperandVal = v;
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3021	return;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3022	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3023
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3024	// Otherwise, try to resolve it to something we know about by looking at
				3025	// the actual operand type.
				3026	if (const char *Repl = LowerXConstraint(OpInfo.ConstraintVT)) {
				3027	OpInfo.ConstraintCode = Repl;
				3028	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3029	}
				3030	}
				3031	}
				3032
				3033	//===----------------------------------------------------------------------===//
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	3034	// Loop Strength Reduction hooks
				3035	//===----------------------------------------------------------------------===//
				3036
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3037	/// isLegalAddressingMode - Return true if the addressing mode represented
				3038	/// by AM is legal for this target, for a load/store of the specified type.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3039	bool TargetLowering::isLegalAddressingMode(const AddrMode &AM,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3040	const Type *Ty) const {
				3041	// The default implementation of this implements a conservative RISCy, r+r and
				3042	// r+i addr mode.
				3043
				3044	// Allows a sign-extended 16-bit immediate field.
				3045	if (AM.BaseOffs <= -(1LL << 16) \|\| AM.BaseOffs >= (1LL << 16)-1)
				3046	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3047
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3048	// No global is ever allowed as a base.
				3049	if (AM.BaseGV)
				3050	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3051
				3052	// Only support r+r,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3053	switch (AM.Scale) {
				3054	case 0: // "r+i" or just "i", depending on HasBaseReg.
				3055	break;
				3056	case 1:
				3057	if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
				3058	return false;
				3059	// Otherwise we have r+r or r+i.
				3060	break;
				3061	case 2:
				3062	if (AM.HasBaseReg \|\| AM.BaseOffs) // 2r+r or 2r+i is not allowed.
				3063	return false;
				3064	// Allow 2*r as r+r.
				3065	break;
				3066	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3067
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3068	return true;
				3069	}
				3070
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3071	/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
				3072	/// return a DAG expression to select that will generate the same value by
				3073	/// multiplying by a magic number. See:
				3074	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3075	SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3076	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3077	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3078	DebugLoc dl= N->getDebugLoc();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3079
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3080	// Check to see if we can do this.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3081	// FIXME: We should be more aggressive here.
				3082	if (!isTypeLegal(VT))
				3083	return SDValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3084
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3085	APInt d = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
Jay Foad	4e5ea55	2009-04-30 10:15:35 +0000	[diff] [blame]	3086	APInt::ms magics = d.magic();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3087
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3088	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3089	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3090	SDValue Q;
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3091	if (isOperationLegalOrCustom(ISD::MULHS, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3092	Q = DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3093	DAG.getConstant(magics.m, VT));
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3094	else if (isOperationLegalOrCustom(ISD::SMUL_LOHI, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3095	Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3096	N->getOperand(0),
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3097	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3098	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3099	return SDValue(); // No mulhs or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3100	// If d > 0 and m < 0, add the numerator
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3101	if (d.isStrictlyPositive() && magics.m.isNegative()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3102	Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3103	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3104	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3105	}
				3106	// If d < 0 and m > 0, subtract the numerator.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3107	if (d.isNegative() && magics.m.isStrictlyPositive()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3108	Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3109	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3110	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3111	}
				3112	// Shift right algebraic if shift value is nonzero
				3113	if (magics.s > 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3114	Q = DAG.getNode(ISD::SRA, dl, VT, Q,
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3115	DAG.getConstant(magics.s, getShiftAmountTy()));
				3116	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3117	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3118	}
				3119	// Extract the sign bit and add it to the quotient
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3120	SDValue T =
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3121	DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1,
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3122	getShiftAmountTy()));
				3123	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3124	Created->push_back(T.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3125	return DAG.getNode(ISD::ADD, dl, VT, Q, T);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3126	}
				3127
				3128	/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
				3129	/// return a DAG expression to select that will generate the same value by
				3130	/// multiplying by a magic number. See:
				3131	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3132	SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
				3133	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3134	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3135	DebugLoc dl = N->getDebugLoc();
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3136
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3137	// Check to see if we can do this.
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3138	// FIXME: We should be more aggressive here.
				3139	if (!isTypeLegal(VT))
				3140	return SDValue();
				3141
				3142	// FIXME: We should use a narrower constant when the upper
				3143	// bits are known to be zero.
				3144	ConstantSDNode *N1C = cast<ConstantSDNode>(N->getOperand(1));
Jay Foad	4e5ea55	2009-04-30 10:15:35 +0000	[diff] [blame]	3145	APInt::mu magics = N1C->getAPIntValue().magicu();
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3146
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3147	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3148	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3149	SDValue Q;
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3150	if (isOperationLegalOrCustom(ISD::MULHU, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3151	Q = DAG.getNode(ISD::MULHU, dl, VT, N->getOperand(0),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3152	DAG.getConstant(magics.m, VT));
Dan Gohman	f560ffa	2009-01-28 17:46:25 +0000	[diff] [blame]	3153	else if (isOperationLegalOrCustom(ISD::UMUL_LOHI, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3154	Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3155	N->getOperand(0),
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3156	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3157	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3158	return SDValue(); // No mulhu or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3159	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3160	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3161
				3162	if (magics.a == 0) {
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3163	assert(magics.s < N1C->getAPIntValue().getBitWidth() &&
				3164	"We shouldn't generate an undefined shift!");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3165	return DAG.getNode(ISD::SRL, dl, VT, Q,
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3166	DAG.getConstant(magics.s, getShiftAmountTy()));
				3167	} else {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3168	SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3169	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3170	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3171	NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ,
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3172	DAG.getConstant(1, getShiftAmountTy()));
				3173	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3174	Created->push_back(NPQ.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3175	NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3176	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3177	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3178	return DAG.getNode(ISD::SRL, dl, VT, NPQ,
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3179	DAG.getConstant(magics.s-1, getShiftAmountTy()));
				3180	}
				3181	}