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Wesley Peck4e9141f2010-10-21 03:57:26 +00001//===-- MBlazeAsmPrinter.cpp - MBlaze LLVM assembly writer ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format MBlaze assembly language.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "mblaze-asm-printer"
16
17#include "MBlaze.h"
18#include "MBlazeSubtarget.h"
19#include "MBlazeInstrInfo.h"
20#include "MBlazeTargetMachine.h"
21#include "MBlazeMachineFunction.h"
22#include "MBlazeMCInstLower.h"
23#include "InstPrinter/MBlazeInstPrinter.h"
24#include "llvm/Constants.h"
25#include "llvm/DerivedTypes.h"
26#include "llvm/Module.h"
27#include "llvm/CodeGen/AsmPrinter.h"
28#include "llvm/CodeGen/MachineFunctionPass.h"
29#include "llvm/CodeGen/MachineConstantPool.h"
30#include "llvm/CodeGen/MachineFrameInfo.h"
31#include "llvm/CodeGen/MachineInstr.h"
32#include "llvm/MC/MCInst.h"
33#include "llvm/MC/MCStreamer.h"
34#include "llvm/MC/MCAsmInfo.h"
35#include "llvm/MC/MCSymbol.h"
36#include "llvm/Target/Mangler.h"
37#include "llvm/Target/TargetData.h"
38#include "llvm/Target/TargetLoweringObjectFile.h"
39#include "llvm/Target/TargetMachine.h"
40#include "llvm/Target/TargetOptions.h"
Wesley Peck4e9141f2010-10-21 03:57:26 +000041#include "llvm/Support/ErrorHandling.h"
Evan Cheng3e74d6f2011-08-24 18:08:43 +000042#include "llvm/Support/TargetRegistry.h"
Wesley Peck4e9141f2010-10-21 03:57:26 +000043#include "llvm/Support/raw_ostream.h"
44#include <cctype>
45
46using namespace llvm;
47
48namespace {
49 class MBlazeAsmPrinter : public AsmPrinter {
50 const MBlazeSubtarget *Subtarget;
51 public:
52 explicit MBlazeAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
53 : AsmPrinter(TM, Streamer) {
54 Subtarget = &TM.getSubtarget<MBlazeSubtarget>();
55 }
56
57 virtual const char *getPassName() const {
58 return "MBlaze Assembly Printer";
59 }
60
Wesley Peck42e75a32010-11-24 16:32:35 +000061 void printSavedRegsBitmask();
Wesley Peck82dc0402010-11-24 15:39:32 +000062 void emitFrameDirective();
63 virtual void EmitFunctionBodyStart();
64 virtual void EmitFunctionBodyEnd();
65 virtual void EmitFunctionEntryLabel();
66
67 virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
68 const;
69
Wesley Peck4e9141f2010-10-21 03:57:26 +000070 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
71 unsigned AsmVariant, const char *ExtraCode,
72 raw_ostream &O);
73 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
74 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
75 void printFSLImm(const MachineInstr *MI, int opNum, raw_ostream &O);
76 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
77 const char *Modifier = 0);
Wesley Peck4e9141f2010-10-21 03:57:26 +000078
Wesley Peck0a67d922010-11-08 19:40:01 +000079 void EmitInstruction(const MachineInstr *MI);
Wesley Peck4e9141f2010-10-21 03:57:26 +000080 };
81} // end of anonymous namespace
82
83// #include "MBlazeGenAsmWriter.inc"
84
85//===----------------------------------------------------------------------===//
86//
87// MBlaze Asm Directives
88//
89// -- Frame directive "frame Stackpointer, Stacksize, RARegister"
90// Describe the stack frame.
91//
92// -- Mask directives "mask bitmask, offset"
93// Tells the assembler which registers are saved and where.
94// bitmask - contain a little endian bitset indicating which registers are
95// saved on function prologue (e.g. with a 0x80000000 mask, the
96// assembler knows the register 31 (RA) is saved at prologue.
97// offset - the position before stack pointer subtraction indicating where
98// the first saved register on prologue is located. (e.g. with a
99//
100// Consider the following function prologue:
101//
102// .frame R19,48,R15
103// .mask 0xc0000000,-8
104// addiu R1, R1, -48
105// sw R15, 40(R1)
106// sw R19, 36(R1)
107//
108// With a 0xc0000000 mask, the assembler knows the register 15 (R15) and
109// 19 (R19) are saved at prologue. As the save order on prologue is from
110// left to right, R15 is saved first. A -8 offset means that after the
111// stack pointer subtration, the first register in the mask (R15) will be
112// saved at address 48-8=40.
113//
114//===----------------------------------------------------------------------===//
115
Wesley Peck82dc0402010-11-24 15:39:32 +0000116// Print a 32 bit hex number with all numbers.
117static void printHex32(unsigned int Value, raw_ostream &O) {
118 O << "0x";
119 for (int i = 7; i >= 0; i--)
Benjamin Kramer70be28a2011-11-07 21:00:59 +0000120 O.write_hex((Value & (0xF << (i*4))) >> (i*4));
Wesley Peck82dc0402010-11-24 15:39:32 +0000121}
122
123// Create a bitmask with all callee saved registers for CPU or Floating Point
124// registers. For CPU registers consider RA, GP and FP for saving if necessary.
Wesley Peck42e75a32010-11-24 16:32:35 +0000125void MBlazeAsmPrinter::printSavedRegsBitmask() {
Anton Korobeynikov16c29b52011-01-10 12:39:04 +0000126 const TargetFrameLowering *TFI = TM.getFrameLowering();
Wesley Peck82dc0402010-11-24 15:39:32 +0000127 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
Wesley Peck82dc0402010-11-24 15:39:32 +0000128
129 // CPU Saved Registers Bitmasks
130 unsigned int CPUBitmask = 0;
131
132 // Set the CPU Bitmasks
133 const MachineFrameInfo *MFI = MF->getFrameInfo();
134 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
135 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
136 unsigned Reg = CSI[i].getReg();
Evan Cheng8cb2d612011-07-25 20:18:18 +0000137 unsigned RegNum = getMBlazeRegisterNumbering(Reg);
Craig Topper420761a2012-04-20 07:30:17 +0000138 if (MBlaze::GPRRegClass.contains(Reg))
Wesley Peck82dc0402010-11-24 15:39:32 +0000139 CPUBitmask |= (1 << RegNum);
140 }
141
142 // Return Address and Frame registers must also be set in CPUBitmask.
143 if (TFI->hasFP(*MF))
Evan Cheng8cb2d612011-07-25 20:18:18 +0000144 CPUBitmask |= (1 << getMBlazeRegisterNumbering(RI.getFrameRegister(*MF)));
Wesley Peck82dc0402010-11-24 15:39:32 +0000145
146 if (MFI->adjustsStack())
Evan Cheng8cb2d612011-07-25 20:18:18 +0000147 CPUBitmask |= (1 << getMBlazeRegisterNumbering(RI.getRARegister()));
Wesley Peck82dc0402010-11-24 15:39:32 +0000148
149 // Print CPUBitmask
Wesley Peck42e75a32010-11-24 16:32:35 +0000150 OutStreamer.EmitRawText("\t.mask\t0x" + Twine::utohexstr(CPUBitmask));
Wesley Peck82dc0402010-11-24 15:39:32 +0000151}
152
153/// Frame Directive
154void MBlazeAsmPrinter::emitFrameDirective() {
Wesley Peck42e75a32010-11-24 16:32:35 +0000155 if (!OutStreamer.hasRawTextSupport())
156 return;
Wesley Peck82dc0402010-11-24 15:39:32 +0000157
Wesley Peck42e75a32010-11-24 16:32:35 +0000158 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
Wesley Peck82dc0402010-11-24 15:39:32 +0000159 unsigned stkReg = RI.getFrameRegister(*MF);
160 unsigned retReg = RI.getRARegister();
161 unsigned stkSze = MF->getFrameInfo()->getStackSize();
162
163 OutStreamer.EmitRawText("\t.frame\t" +
164 Twine(MBlazeInstPrinter::getRegisterName(stkReg)) +
165 "," + Twine(stkSze) + "," +
166 Twine(MBlazeInstPrinter::getRegisterName(retReg)));
167}
168
169void MBlazeAsmPrinter::EmitFunctionEntryLabel() {
Wesley Peck42e75a32010-11-24 16:32:35 +0000170 if (OutStreamer.hasRawTextSupport())
171 OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
Wesley Peck82dc0402010-11-24 15:39:32 +0000172 AsmPrinter::EmitFunctionEntryLabel();
173}
174
175void MBlazeAsmPrinter::EmitFunctionBodyStart() {
Wesley Peck42e75a32010-11-24 16:32:35 +0000176 if (!OutStreamer.hasRawTextSupport())
177 return;
Wesley Peck82dc0402010-11-24 15:39:32 +0000178
Wesley Peck42e75a32010-11-24 16:32:35 +0000179 emitFrameDirective();
180 printSavedRegsBitmask();
Wesley Peck82dc0402010-11-24 15:39:32 +0000181}
182
183void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
Wesley Peck42e75a32010-11-24 16:32:35 +0000184 if (OutStreamer.hasRawTextSupport())
185 OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
Wesley Peck82dc0402010-11-24 15:39:32 +0000186}
187
Wesley Peck4e9141f2010-10-21 03:57:26 +0000188//===----------------------------------------------------------------------===//
189void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
190 MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
191
192 MCInst TmpInst;
193 MCInstLowering.Lower(MI, TmpInst);
194 OutStreamer.EmitInstruction(TmpInst);
195}
196
Wesley Peck4e9141f2010-10-21 03:57:26 +0000197// Print out an operand for an inline asm expression.
198bool MBlazeAsmPrinter::
199PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
200 unsigned AsmVariant,const char *ExtraCode, raw_ostream &O) {
201 // Does this asm operand have a single letter operand modifier?
202 if (ExtraCode && ExtraCode[0])
203 return true; // Unknown modifier.
204
205 printOperand(MI, OpNo, O);
206 return false;
207}
208
209void MBlazeAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
210 raw_ostream &O) {
211 const MachineOperand &MO = MI->getOperand(opNum);
212
213 switch (MO.getType()) {
214 case MachineOperand::MO_Register:
215 O << MBlazeInstPrinter::getRegisterName(MO.getReg());
216 break;
217
218 case MachineOperand::MO_Immediate:
Wesley Peck6e749f32010-11-21 21:39:46 +0000219 O << (int32_t)MO.getImm();
Wesley Peck4e9141f2010-10-21 03:57:26 +0000220 break;
221
222 case MachineOperand::MO_FPImmediate: {
223 const ConstantFP *fp = MO.getFPImm();
224 printHex32(fp->getValueAPF().bitcastToAPInt().getZExtValue(), O);
225 O << ";\t# immediate = " << *fp;
226 break;
227 }
228
229 case MachineOperand::MO_MachineBasicBlock:
230 O << *MO.getMBB()->getSymbol();
231 return;
232
233 case MachineOperand::MO_GlobalAddress:
234 O << *Mang->getSymbol(MO.getGlobal());
235 break;
236
237 case MachineOperand::MO_ExternalSymbol:
238 O << *GetExternalSymbolSymbol(MO.getSymbolName());
239 break;
240
241 case MachineOperand::MO_JumpTableIndex:
242 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
243 << '_' << MO.getIndex();
244 break;
245
246 case MachineOperand::MO_ConstantPoolIndex:
247 O << MAI->getPrivateGlobalPrefix() << "CPI"
248 << getFunctionNumber() << "_" << MO.getIndex();
249 if (MO.getOffset())
250 O << "+" << MO.getOffset();
251 break;
252
253 default:
254 llvm_unreachable("<unknown operand type>");
255 }
256}
257
258void MBlazeAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
259 raw_ostream &O) {
260 const MachineOperand &MO = MI->getOperand(opNum);
261 if (MO.isImm())
Wesley Peck6e749f32010-11-21 21:39:46 +0000262 O << (uint32_t)MO.getImm();
Wesley Peck4e9141f2010-10-21 03:57:26 +0000263 else
264 printOperand(MI, opNum, O);
265}
266
267void MBlazeAsmPrinter::printFSLImm(const MachineInstr *MI, int opNum,
268 raw_ostream &O) {
269 const MachineOperand &MO = MI->getOperand(opNum);
270 if (MO.isImm())
271 O << "rfsl" << (unsigned int)MO.getImm();
272 else
273 printOperand(MI, opNum, O);
274}
275
276void MBlazeAsmPrinter::
277printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
278 const char *Modifier) {
Wesley Peck4e9141f2010-10-21 03:57:26 +0000279 printOperand(MI, opNum, O);
Wesley Peck41400da2010-11-12 23:30:17 +0000280 O << ", ";
281 printOperand(MI, opNum+1, O);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000282}
283
Wesley Peck82dc0402010-11-24 15:39:32 +0000284/// isBlockOnlyReachableByFallthough - Return true if the basic block has
285/// exactly one predecessor and the control transfer mechanism between
286/// the predecessor and this block is a fall-through.
287bool MBlazeAsmPrinter::
288isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
289 // If this is a landing pad, it isn't a fall through. If it has no preds,
290 // then nothing falls through to it.
291 if (MBB->isLandingPad() || MBB->pred_empty())
292 return false;
293
294 // If there isn't exactly one predecessor, it can't be a fall through.
295 MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
296 ++PI2;
297 if (PI2 != MBB->pred_end())
298 return false;
299
300 // The predecessor has to be immediately before this block.
301 const MachineBasicBlock *Pred = *PI;
302
303 if (!Pred->isLayoutSuccessor(MBB))
304 return false;
305
306 // If the block is completely empty, then it definitely does fall through.
307 if (Pred->empty())
308 return true;
309
310 // Check if the last terminator is an unconditional branch.
311 MachineBasicBlock::const_iterator I = Pred->end();
Evan Cheng5a96b3d2011-12-07 07:15:52 +0000312 while (I != Pred->begin() && !(--I)->isTerminator())
Wesley Peck82dc0402010-11-24 15:39:32 +0000313 ; // Noop
Evan Cheng5a96b3d2011-12-07 07:15:52 +0000314 return I == Pred->end() || !I->isBarrier();
Wesley Peck82dc0402010-11-24 15:39:32 +0000315}
316
Wesley Peck4e9141f2010-10-21 03:57:26 +0000317// Force static initialization.
318extern "C" void LLVMInitializeMBlazeAsmPrinter() {
319 RegisterAsmPrinter<MBlazeAsmPrinter> X(TheMBlazeTarget);
Wesley Peck4e9141f2010-10-21 03:57:26 +0000320}