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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Reid Spencer551ccae2004-09-01 22:55:40 +000024#include "llvm/Support/CommandLine.h"
25#include "llvm/Support/Debug.h"
26#include "llvm/ADT/DenseMap.h"
27#include "llvm/ADT/Statistic.h"
Chris Lattner27f29162004-10-26 15:35:58 +000028#include <algorithm>
Chris Lattneref09c632004-01-31 21:27:19 +000029using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000030
Chris Lattnerb74e83c2002-12-16 16:15:28 +000031namespace {
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +000032 Statistic<> NumStores("ra-local", "Number of stores added");
33 Statistic<> NumLoads ("ra-local", "Number of loads added");
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +000034 Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
35 "instructions");
Chris Lattner580f9be2002-12-28 20:40:43 +000036 class RA : public MachineFunctionPass {
37 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000038 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000039 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000040 LiveVariables *LV;
Chris Lattner0648b162005-01-23 22:51:56 +000041 bool *PhysRegsEverUsed;
Chris Lattnerff863ba2002-12-25 05:05:46 +000042
Chris Lattnerb8822ad2003-08-04 23:36:39 +000043 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
44 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000045 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000046
47 // Virt2PhysRegMap - This map contains entries for each virtual register
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000048 // that is currently available in a physical register.
49 DenseMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
Chris Lattnerecea5632004-02-09 02:12:04 +000050
51 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000052 return Virt2PhysRegMap[VirtReg];
Chris Lattnerecea5632004-02-09 02:12:04 +000053 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000054
Chris Lattner64667b62004-02-09 01:26:13 +000055 // PhysRegsUsed - This array is effectively a map, containing entries for
56 // each physical register that currently has a value (ie, it is in
57 // Virt2PhysRegMap). The value mapped to is the virtual register
58 // corresponding to the physical register (the inverse of the
59 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
60 // because it is used by a future instruction. If the entry for a physical
61 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000062 //
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000063 std::vector<int> PhysRegsUsed;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000064
65 // PhysRegsUseOrder - This contains a list of the physical registers that
66 // currently have a virtual register value in them. This list provides an
67 // ordering of registers, imposing a reallocation order. This list is only
68 // used if all registers are allocated and we have to spill one, in which
69 // case we spill the least recently used register. Entries at the front of
70 // the list are the least recently used registers, entries at the back are
71 // the most recently used.
72 //
73 std::vector<unsigned> PhysRegsUseOrder;
74
Chris Lattner91a452b2003-01-13 00:25:40 +000075 // VirtRegModified - This bitset contains information about which virtual
76 // registers need to be spilled back to memory when their registers are
77 // scavenged. If a virtual register has simply been rematerialized, there
78 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000079 //
Chris Lattner91a452b2003-01-13 00:25:40 +000080 std::vector<bool> VirtRegModified;
81
82 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000083 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000084 Reg -= MRegisterInfo::FirstVirtualRegister;
85 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
86 VirtRegModified[Reg] = Val;
87 }
88
89 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +000090 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000091 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000092 && "Illegal virtual register!");
Chris Lattner91a452b2003-01-13 00:25:40 +000093 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
94 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000095
Chris Lattnerb74e83c2002-12-16 16:15:28 +000096 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattneraebcce82004-06-16 06:57:29 +000097 if(PhysRegsUseOrder.empty() ||
98 PhysRegsUseOrder.back() == Reg) return; // Already most recently used
Chris Lattner0eb172c2002-12-24 00:04:55 +000099
100 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000101 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
102 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
103 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
104 // Add it to the end of the list
105 PhysRegsUseOrder.push_back(RegMatch);
106 if (RegMatch == Reg)
107 return; // Found an exact match, exit early
108 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000109 }
110
111 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000112 virtual const char *getPassName() const {
113 return "Local Register Allocator";
114 }
115
Chris Lattner91a452b2003-01-13 00:25:40 +0000116 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
Chris Lattner56ddada2004-02-17 17:49:10 +0000117 AU.addRequired<LiveVariables>();
Chris Lattner91a452b2003-01-13 00:25:40 +0000118 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000119 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000120 MachineFunctionPass::getAnalysisUsage(AU);
121 }
122
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000123 private:
124 /// runOnMachineFunction - Register allocate the whole function
125 bool runOnMachineFunction(MachineFunction &Fn);
126
127 /// AllocateBasicBlock - Register allocate the specified basic block.
128 void AllocateBasicBlock(MachineBasicBlock &MBB);
129
Chris Lattner82bee0f2002-12-18 08:14:26 +0000130
Chris Lattner82bee0f2002-12-18 08:14:26 +0000131 /// areRegsEqual - This method returns true if the specified registers are
132 /// related to each other. To do this, it checks to see if they are equal
133 /// or if the first register is in the alias set of the second register.
134 ///
135 bool areRegsEqual(unsigned R1, unsigned R2) const {
136 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000137 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
138 *AliasSet; ++AliasSet) {
139 if (*AliasSet == R1) return true;
140 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000141 return false;
142 }
143
Chris Lattner580f9be2002-12-28 20:40:43 +0000144 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000145 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000146 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000147
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000148 /// removePhysReg - This method marks the specified physical register as no
149 /// longer being in use.
150 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000151 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000152
153 /// spillVirtReg - This method spills the value specified by PhysReg into
154 /// the virtual register slot specified by VirtReg. It then updates the RA
155 /// data structures to indicate the fact that PhysReg is now available.
156 ///
Chris Lattner688c8252004-02-22 19:08:15 +0000157 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000158 unsigned VirtReg, unsigned PhysReg);
159
Chris Lattnerc21be922002-12-16 17:44:42 +0000160 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000161 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
162 /// true, then the request is ignored if the physical register does not
163 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000164 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000165 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000166 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000167
Chris Lattner91a452b2003-01-13 00:25:40 +0000168 /// assignVirtToPhysReg - This method updates local state so that we know
169 /// that PhysReg is the proper container for VirtReg now. The physical
170 /// register must not be used for anything else when this is called.
171 ///
172 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
173
174 /// liberatePhysReg - Make sure the specified physical register is available
175 /// for use. If there is currently a value in it, it is either moved out of
176 /// the way or spilled to memory.
177 ///
178 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000179 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000180
Chris Lattnerae640432002-12-17 02:50:10 +0000181 /// isPhysRegAvailable - Return true if the specified physical register is
182 /// free and available for use. This also includes checking to see if
183 /// aliased registers are all free...
184 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000185 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000186
187 /// getFreeReg - Look to see if there is a free register available in the
188 /// specified register class. If not, return 0.
189 ///
190 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000191
Chris Lattner91a452b2003-01-13 00:25:40 +0000192 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000193 /// register. If all compatible physical registers are used, this method
194 /// spills the last used virtual register to the stack, and uses that
195 /// register.
196 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000197 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000198 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000199
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000200 /// reloadVirtReg - This method transforms the specified specified virtual
201 /// register use to refer to a physical register. This method may do this
202 /// in one of several ways: if the register is available in a physical
203 /// register already, it uses that physical register. If the value is not
204 /// in a physical register, and if there are physical registers available,
205 /// it loads it into a register. If register pressure is high, and it is
206 /// possible, it tries to fold the load of the virtual register into the
207 /// instruction itself. It avoids doing this if register pressure is low to
208 /// improve the chance that subsequent instructions can use the reloaded
209 /// value. This method returns the modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000210 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000211 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
212 unsigned OpNum);
Misha Brukmanedf128a2005-04-21 22:36:52 +0000213
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000214
215 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
216 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000217 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000218}
219
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000220/// getStackSpaceFor - This allocates space for the specified virtual register
221/// to be held on the stack.
222int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
223 // Find the location Reg would belong...
224 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000225
Chris Lattner580f9be2002-12-28 20:40:43 +0000226 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000227 return I->second; // Already has space allocated?
228
Chris Lattner580f9be2002-12-28 20:40:43 +0000229 // Allocate a new stack object for this spill location...
Chris Lattner26eb14b2004-08-15 22:02:22 +0000230 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
231 RC->getAlignment());
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000232
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000233 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000234 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
235 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000236}
237
Chris Lattnerae640432002-12-17 02:50:10 +0000238
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000239/// removePhysReg - This method marks the specified physical register as no
Chris Lattner82bee0f2002-12-18 08:14:26 +0000240/// longer being in use.
241///
242void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000243 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000244
245 std::vector<unsigned>::iterator It =
246 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000247 if (It != PhysRegsUseOrder.end())
248 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000249}
250
Chris Lattner91a452b2003-01-13 00:25:40 +0000251
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000252/// spillVirtReg - This method spills the value specified by PhysReg into the
253/// virtual register slot specified by VirtReg. It then updates the RA data
254/// structures to indicate the fact that PhysReg is now available.
255///
Chris Lattner688c8252004-02-22 19:08:15 +0000256void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000257 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000258 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000259 " Must not have appropriate kill for the register or use exists beyond"
260 " the intended one.");
261 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
262 std::cerr << " containing %reg" << VirtReg;
263 if (!isVirtRegModified(VirtReg))
264 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000265
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000266 // Otherwise, there is a virtual register corresponding to this physical
267 // register. We only need to spill it into its stack slot if it has been
268 // modified.
269 if (isVirtRegModified(VirtReg)) {
270 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
271 int FrameIndex = getStackSpaceFor(VirtReg, RC);
272 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
Chris Lattner57f1b672004-08-15 21:56:44 +0000273 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000274 ++NumStores; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000275 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000276
277 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000278
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000279 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000280 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000281}
282
Chris Lattnerae640432002-12-17 02:50:10 +0000283
Chris Lattner91a452b2003-01-13 00:25:40 +0000284/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000285/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
286/// then the request is ignored if the physical register does not contain a
287/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000288///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000289void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000290 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000291 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
292 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
293 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000294 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000295 // If the selected register aliases any other registers, we must make
296 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000297 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000298 *AliasSet; ++AliasSet)
299 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
300 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
301 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000302 }
303}
304
305
306/// assignVirtToPhysReg - This method updates local state so that we know
307/// that PhysReg is the proper container for VirtReg now. The physical
308/// register must not be used for anything else when this is called.
309///
310void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000311 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000312 // Update information to note the fact that this register was just used, and
313 // it holds VirtReg.
314 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000315 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000316 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
317}
318
319
Chris Lattnerae640432002-12-17 02:50:10 +0000320/// isPhysRegAvailable - Return true if the specified physical register is free
321/// and available for use. This also includes checking to see if aliased
322/// registers are all free...
323///
324bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000325 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000326
327 // If the selected register aliases any other allocated registers, it is
328 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000329 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
330 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000331 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000332 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000333 return true;
334}
335
336
Chris Lattner91a452b2003-01-13 00:25:40 +0000337/// getFreeReg - Look to see if there is a free register available in the
338/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000339///
Chris Lattner91a452b2003-01-13 00:25:40 +0000340unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000341 // Get iterators defining the range of registers that are valid to allocate in
342 // this class, which also specifies the preferred allocation order.
343 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
344 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000345
Chris Lattner91a452b2003-01-13 00:25:40 +0000346 for (; RI != RE; ++RI)
347 if (isPhysRegAvailable(*RI)) { // Is reg unused?
348 assert(*RI != 0 && "Cannot use register!");
349 return *RI; // Found an unused register!
350 }
351 return 0;
352}
353
354
355/// liberatePhysReg - Make sure the specified physical register is available for
356/// use. If there is currently a value in it, it is either moved out of the way
357/// or spilled to memory.
358///
359void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000360 unsigned PhysReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000361 spillPhysReg(MBB, I, PhysReg);
362}
363
364
365/// getReg - Find a physical register to hold the specified virtual
366/// register. If all compatible physical registers are used, this method spills
367/// the last used virtual register to the stack, and uses that register.
368///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000369unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000370 unsigned VirtReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000371 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
372
373 // First check to see if we have a free register of the requested type...
374 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000375
Chris Lattnerae640432002-12-17 02:50:10 +0000376 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000377 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000378 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000379
380 // Loop over all of the preallocated registers from the least recently used
381 // to the most recently used. When we find one that is capable of holding
382 // our register, use it.
383 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000384 assert(i != PhysRegsUseOrder.size() &&
385 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000386
Chris Lattnerae640432002-12-17 02:50:10 +0000387 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000388
389 // We can only use this register if it holds a virtual register (ie, it
390 // can be spilled). Do not use it if it is an explicitly allocated
391 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000392 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000393 "PhysReg in PhysRegsUseOrder, but is not allocated?");
394 if (PhysRegsUsed[R]) {
395 // If the current register is compatible, use it.
Chris Lattner3bba0262004-08-15 22:23:09 +0000396 if (RC->contains(R)) {
Chris Lattner41822c72003-08-23 23:49:42 +0000397 PhysReg = R;
398 break;
399 } else {
400 // If one of the registers aliased to the current register is
401 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000402 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
403 *AliasSet; ++AliasSet) {
Chris Lattner3bba0262004-08-15 22:23:09 +0000404 if (RC->contains(*AliasSet)) {
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000405 PhysReg = *AliasSet; // Take an aliased register
406 break;
407 }
408 }
Chris Lattner41822c72003-08-23 23:49:42 +0000409 }
Chris Lattnerae640432002-12-17 02:50:10 +0000410 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000411 }
412
Chris Lattnerae640432002-12-17 02:50:10 +0000413 assert(PhysReg && "Physical register not assigned!?!?");
414
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000415 // At this point PhysRegsUseOrder[i] is the least recently used register of
416 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000417 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000418 }
419
420 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000421 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000422 return PhysReg;
423}
424
Chris Lattnerae640432002-12-17 02:50:10 +0000425
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000426/// reloadVirtReg - This method transforms the specified specified virtual
427/// register use to refer to a physical register. This method may do this in
428/// one of several ways: if the register is available in a physical register
429/// already, it uses that physical register. If the value is not in a physical
430/// register, and if there are physical registers available, it loads it into a
431/// register. If register pressure is high, and it is possible, it tries to
432/// fold the load of the virtual register into the instruction itself. It
433/// avoids doing this if register pressure is low to improve the chance that
434/// subsequent instructions can use the reloaded value. This method returns the
435/// modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000436///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000437MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
438 unsigned OpNum) {
439 unsigned VirtReg = MI->getOperand(OpNum).getReg();
440
441 // If the virtual register is already available, just update the instruction
442 // and return.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000443 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000444 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
445 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
446 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000447 }
448
Chris Lattner1e3812c2004-02-17 04:08:37 +0000449 // Otherwise, we need to fold it into the current instruction, or reload it.
450 // If we have registers available to hold the value, use them.
Chris Lattnerff863ba2002-12-25 05:05:46 +0000451 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000452 unsigned PhysReg = getFreeReg(RC);
Chris Lattner11390e72004-02-17 08:09:40 +0000453 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000454
Chris Lattner11390e72004-02-17 08:09:40 +0000455 if (PhysReg) { // Register is available, allocate it!
456 assignVirtToPhysReg(VirtReg, PhysReg);
457 } else { // No registers available.
458 // If we can fold this spill into this instruction, do so now.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000459 if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +0000460 ++NumFolded;
Chris Lattnerd368c612004-02-19 18:34:02 +0000461 // Since we changed the address of MI, make sure to update live variables
462 // to know that the new instruction has the properties of the old one.
Alkis Evlogimenos39354c92004-03-14 07:19:51 +0000463 LV->instructionChanged(MI, FMI);
464 return MBB.insert(MBB.erase(MI), FMI);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000465 }
466
467 // It looks like we can't fold this virtual register load into this
468 // instruction. Force some poor hapless value out of the register file to
469 // make room for the new register, and reload it.
470 PhysReg = getReg(MBB, MI, VirtReg);
471 }
472
Chris Lattner91a452b2003-01-13 00:25:40 +0000473 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
474
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000475 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
476 << RegInfo->getName(PhysReg) << "\n");
477
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000478 // Add move instruction(s)
Chris Lattner57f1b672004-08-15 21:56:44 +0000479 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000480 ++NumLoads; // Update statistics
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000481
Chris Lattner0648b162005-01-23 22:51:56 +0000482 PhysRegsEverUsed[PhysReg] = true;
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000483 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
484 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000485}
486
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000487
488
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000489void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
490 // loop over each instruction
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000491 MachineBasicBlock::iterator MI = MBB.begin();
492 for (; MI != MBB.end(); ++MI) {
Chris Lattner9bcdcd12004-06-02 05:57:12 +0000493 const TargetInstrDescriptor &TID = TM->getInstrInfo()->get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000494 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
495 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000496 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
497 if (PhysRegsUsed[i] != -1)
498 std::cerr << "[" << RegInfo->getName(i)
499 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000500 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000501
Chris Lattnerae640432002-12-17 02:50:10 +0000502 // Loop over the implicit uses, making sure that they are at the head of the
503 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000504 for (const unsigned *ImplicitUses = TID.ImplicitUses;
505 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000506 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000507
Brian Gaeke53b99a02003-08-15 21:19:25 +0000508 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000509 // incoming values if we are out of registers. Note that we completely
510 // ignore physical register uses here. We assume that if an explicit
511 // physical register is referenced by the instruction, that it is guaranteed
512 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000513 //
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000514 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
515 MachineOperand& MO = MI->getOperand(i);
516 // here we are looking for only used operands (never def&use)
517 if (!MO.isDef() && MO.isRegister() && MO.getReg() &&
518 MRegisterInfo::isVirtualRegister(MO.getReg()))
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000519 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000520 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000521
Chris Lattner56ddada2004-02-17 17:49:10 +0000522 // If this instruction is the last user of anything in registers, kill the
523 // value, freeing the register being used, so it doesn't need to be
524 // spilled to memory.
525 //
526 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
527 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattner44b94c22005-08-23 23:42:17 +0000528 unsigned VirtReg = *KI;
Chris Lattner56ddada2004-02-17 17:49:10 +0000529 unsigned PhysReg = VirtReg;
530 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
531 // If the virtual register was never materialized into a register, it
532 // might not be in the map, but it won't hurt to zero it out anyway.
533 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
534 PhysReg = PhysRegSlot;
535 PhysRegSlot = 0;
536 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000537
Chris Lattner56ddada2004-02-17 17:49:10 +0000538 if (PhysReg) {
539 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
540 << "[%reg" << VirtReg <<"], removing it from live set\n");
541 removePhysReg(PhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000542 }
543 }
544
545 // Loop over all of the operands of the instruction, spilling registers that
546 // are defined, and marking explicit destinations in the PhysRegsUsed map.
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000547 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
548 MachineOperand& MO = MI->getOperand(i);
549 if (MO.isDef() && MO.isRegister() && MO.getReg() &&
550 MRegisterInfo::isPhysicalRegister(MO.getReg())) {
551 unsigned Reg = MO.getReg();
Chris Lattner0648b162005-01-23 22:51:56 +0000552 PhysRegsEverUsed[Reg] = true;
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000553 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000554 PhysRegsUsed[Reg] = 0; // It is free and reserved now
555 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000556 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
557 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000558 PhysRegsUseOrder.push_back(*AliasSet);
559 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Chris Lattner0648b162005-01-23 22:51:56 +0000560 PhysRegsEverUsed[*AliasSet] = true;
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000561 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000562 }
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000563 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000564
565 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000566 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
567 *ImplicitDefs; ++ImplicitDefs) {
568 unsigned Reg = *ImplicitDefs;
Chris Lattner11390e72004-02-17 08:09:40 +0000569 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000570 PhysRegsUseOrder.push_back(Reg);
571 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Chris Lattner0648b162005-01-23 22:51:56 +0000572 PhysRegsEverUsed[Reg] = true;
573
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000574 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
575 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000576 PhysRegsUseOrder.push_back(*AliasSet);
577 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Chris Lattner0648b162005-01-23 22:51:56 +0000578 PhysRegsEverUsed[*AliasSet] = true;
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000579 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000580 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000581
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000582 // Okay, we have allocated all of the source operands and spilled any values
583 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner0648b162005-01-23 22:51:56 +0000584 // explicit defs and assign them to a register, spilling incoming values if
Chris Lattner91a452b2003-01-13 00:25:40 +0000585 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000586 //
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000587 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
588 MachineOperand& MO = MI->getOperand(i);
589 if (MO.isDef() && MO.isRegister() && MO.getReg() &&
590 MRegisterInfo::isVirtualRegister(MO.getReg())) {
591 unsigned DestVirtReg = MO.getReg();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000592 unsigned DestPhysReg;
593
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000594 // If DestVirtReg already has a value, use it.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000595 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000596 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattner0648b162005-01-23 22:51:56 +0000597 PhysRegsEverUsed[DestPhysReg] = true;
Chris Lattnerd5725632003-05-12 03:54:14 +0000598 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000599 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
600 }
Alkis Evlogimenos71e353e2004-02-26 22:00:20 +0000601 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000602
Chris Lattner56ddada2004-02-17 17:49:10 +0000603 // If this instruction defines any registers that are immediately dead,
604 // kill them now.
605 //
606 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
607 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattner44b94c22005-08-23 23:42:17 +0000608 unsigned VirtReg = *KI;
Chris Lattner56ddada2004-02-17 17:49:10 +0000609 unsigned PhysReg = VirtReg;
610 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
611 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
612 PhysReg = PhysRegSlot;
613 assert(PhysReg != 0);
614 PhysRegSlot = 0;
615 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000616
Chris Lattner56ddada2004-02-17 17:49:10 +0000617 if (PhysReg) {
618 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
619 << " [%reg" << VirtReg
620 << "] is never used, removing it frame live list\n");
621 removePhysReg(PhysReg);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000622 }
623 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000624 }
625
Alkis Evlogimenos743d0a12004-02-23 18:14:48 +0000626 MI = MBB.getFirstTerminator();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000627
628 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000629 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
630 if (PhysRegsUsed[i] != -1)
631 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000632 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner64667b62004-02-09 01:26:13 +0000633 else
634 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000635
Chris Lattnerecea5632004-02-09 02:12:04 +0000636#ifndef NDEBUG
637 bool AllOk = true;
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000638 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
639 e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
Chris Lattnerecea5632004-02-09 02:12:04 +0000640 if (unsigned PR = Virt2PhysRegMap[i]) {
641 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
642 AllOk = false;
643 }
644 assert(AllOk && "Virtual registers still in phys regs?");
645#endif
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000646
Chris Lattner128c2aa2003-08-17 18:01:15 +0000647 // Clear any physical register which appear live at the end of the basic
648 // block, but which do not hold any virtual registers. e.g., the stack
649 // pointer.
650 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000651}
652
Chris Lattner86c69a62002-12-17 03:16:10 +0000653
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000654/// runOnMachineFunction - Register allocate the whole function
655///
656bool RA::runOnMachineFunction(MachineFunction &Fn) {
657 DEBUG(std::cerr << "Machine Function " << "\n");
658 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000659 TM = &Fn.getTarget();
660 RegInfo = TM->getRegisterInfo();
Chris Lattner56ddada2004-02-17 17:49:10 +0000661 LV = &getAnalysis<LiveVariables>();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000662
Chris Lattner0648b162005-01-23 22:51:56 +0000663 PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
664 std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
665 Fn.setUsedPhysRegs(PhysRegsEverUsed);
666
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000667 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner64667b62004-02-09 01:26:13 +0000668
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000669 // initialize the virtual->physical register map to have a 'null'
670 // mapping for all virtual registers
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000671 Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg());
Chris Lattnerecea5632004-02-09 02:12:04 +0000672
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000673 // Loop over all of the basic blocks, eliminating virtual register references
674 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
675 MBB != MBBe; ++MBB)
676 AllocateBasicBlock(*MBB);
677
Chris Lattner580f9be2002-12-28 20:40:43 +0000678 StackSlotForVirtReg.clear();
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000679 PhysRegsUsed.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000680 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000681 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000682 return true;
683}
684
Chris Lattneref09c632004-01-31 21:27:19 +0000685FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000686 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000687}